40 		dev_err(dev->mt76.dev,  in mt76x0_efuse_physical_size_check()
54 	dev_dbg(dev->mt76.dev, "2GHz %d 5GHz %d\n",  in mt76x0_set_chip_cap()
55 		dev->mt76.cap.has_2ghz, dev->mt76.cap.has_5ghz);  in mt76x0_set_chip_cap()
58 		dev->mt76.cap.has_2ghz = false;  in mt76x0_set_chip_cap()
59 		dev_dbg(dev->mt76.dev, "mask out 2GHz support\n");  in mt76x0_set_chip_cap()
63 		dev->mt76.cap.has_5ghz = false;  in mt76x0_set_chip_cap()
64 		dev_dbg(dev->mt76.dev, "mask out 5GHz support\n");  in mt76x0_set_chip_cap()
71 		dev_err(dev->mt76.dev,  in mt76x0_set_chip_cap()
79 		dev_err(dev->mt76.dev, "invalid tx-rx stream\n");  in mt76x0_set_chip_cap()
112 	struct ieee80211_channel *chan = dev->mt76.chandef.chan;  in mt76x0_read_rx_gain()
132 	struct cfg80211_chan_def *chandef = &dev->mt76.chandef;  in mt76x0_get_delta()
238 		target_power = (data & 0xff) - dev->mt76.rate_power.ofdm[7];  in mt76x0_get_power_info()
289 	val = get_unaligned_le16(dev->mt76.eeprom.data);  in mt76x0_check_eeprom()
291 		val = get_unaligned_le16(dev->mt76.eeprom.data +  in mt76x0_check_eeprom()
299 		dev_err(dev->mt76.dev, "EEPROM data check failed: %04x\n",  in mt76x0_check_eeprom()
309 	found = mt76_eeprom_init(&dev->mt76, MT76X0_EEPROM_SIZE);  in mt76x0_load_eeprom()
320 	return mt76x02_get_efuse_data(dev, 0, dev->mt76.eeprom.data,  in mt76x0_load_eeprom()
339 		dev_warn(dev->mt76.dev,  in mt76x0_eeprom_init()
342 	dev_info(dev->mt76.dev, "EEPROM ver:%02hhx fae:%02hhx\n",  in mt76x0_eeprom_init()
345 	mt76x02_mac_setaddr(dev, dev->mt76.eeprom.data + MT_EE_MAC_ADDR);  in mt76x0_eeprom_init()