21 	q->ndesc = n_desc;  in mt76_dma_alloc_queue()
25 	size = q->ndesc * sizeof(struct mt76_desc);  in mt76_dma_alloc_queue()
30 	size = q->ndesc * sizeof(*q->entry);  in mt76_dma_alloc_queue()
36 	for (i = 0; i < q->ndesc; i++)  in mt76_dma_alloc_queue()
42 	writel(q->ndesc, &q->regs->ring_size);  in mt76_dma_alloc_queue()
76 		q->head = (q->head + 1) % q->ndesc;  in mt76_dma_add_buf()
132 	writel(q->ndesc, &q->regs->ring_size);  in mt76_dma_sync_idx()
162 		q->tail = (q->tail + 1) % q->ndesc;  in mt76_dma_tx_cleanup()
192 	       qid < IEEE80211_NUM_ACS && q->queued < q->ndesc - 8;  in mt76_dma_tx_cleanup()
244 	q->tail = (q->tail + 1) % q->ndesc;  in mt76_dma_dequeue()
339 	if (q->queued + (tx_info.nbuf + 1) / 2 >= q->ndesc - 1) {  in mt76_dma_tx_queue_skb()
372 	while (q->queued < q->ndesc - 1) {  in mt76_dma_rx_fill()
430 	for (i = 0; i < q->ndesc; i++)  in mt76_dma_rx_reset()