Lines Matching refs:rxon

3683 	struct il_rxon_cmd *rxon = &il->staging;  in il_set_rxon_hwcrypto()  local
3686 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK; in il_set_rxon_hwcrypto()
3688 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK; in il_set_rxon_hwcrypto()
3697 struct il_rxon_cmd *rxon = &il->staging; in il_check_rxon_cmd() local
3700 if (rxon->flags & RXON_FLG_BAND_24G_MSK) { in il_check_rxon_cmd()
3701 if (rxon->flags & RXON_FLG_TGJ_NARROW_BAND_MSK) { in il_check_rxon_cmd()
3705 if (rxon->flags & RXON_FLG_RADAR_DETECT_MSK) { in il_check_rxon_cmd()
3710 if (!(rxon->flags & RXON_FLG_SHORT_SLOT_MSK)) { in il_check_rxon_cmd()
3714 if (rxon->flags & RXON_FLG_CCK_MSK) { in il_check_rxon_cmd()
3719 if ((rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1) { in il_check_rxon_cmd()
3725 if ((rxon->ofdm_basic_rates & RATE_6M_MASK) == 0 && in il_check_rxon_cmd()
3726 (rxon->cck_basic_rates & RATE_1M_MASK) == 0) { in il_check_rxon_cmd()
3731 if (le16_to_cpu(rxon->assoc_id) > 2007) { in il_check_rxon_cmd()
3736 if ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)) == in il_check_rxon_cmd()
3742 if ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)) == in il_check_rxon_cmd()
3748 if ((rxon-> in il_check_rxon_cmd()
3756 IL_WARN("Tuning to channel %d\n", le16_to_cpu(rxon->channel)); in il_check_rxon_cmd()
3845 struct il_rxon_cmd *rxon = &il->staging; in _il_set_rxon_ht() local
3848 rxon->flags &= in _il_set_rxon_ht()
3855 rxon->flags |= in _il_set_rxon_ht()
3861 rxon->flags &= in _il_set_rxon_ht()
3866 rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40; in _il_set_rxon_ht()
3870 rxon->flags &= in _il_set_rxon_ht()
3874 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK; in _il_set_rxon_ht()
3881 rxon->flags &= in _il_set_rxon_ht()
3883 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED; in _il_set_rxon_ht()
3886 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK; in _il_set_rxon_ht()
3887 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED; in _il_set_rxon_ht()
3897 rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY; in _il_set_rxon_ht()
3904 "extension channel offset 0x%x\n", le32_to_cpu(rxon->flags), in _il_set_rxon_ht()
4111 struct il_rxon_cmd *rxon = (void *)&il->active; in il_hdl_csa() local
4117 rxon->channel = csa->channel; in il_hdl_csa()
4133 struct il_rxon_cmd *rxon = &il->staging; in il_print_rx_config_cmd() local
4136 il_print_hex_dump(il, IL_DL_RADIO, (u8 *) rxon, sizeof(*rxon)); in il_print_rx_config_cmd()
4137 D_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel)); in il_print_rx_config_cmd()
4138 D_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags)); in il_print_rx_config_cmd()
4139 D_RADIO("u32 filter_flags: 0x%08x\n", le32_to_cpu(rxon->filter_flags)); in il_print_rx_config_cmd()
4140 D_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type); in il_print_rx_config_cmd()
4141 D_RADIO("u8 ofdm_basic_rates: 0x%02x\n", rxon->ofdm_basic_rates); in il_print_rx_config_cmd()
4142 D_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates); in il_print_rx_config_cmd()
4143 D_RADIO("u8[6] node_addr: %pM\n", rxon->node_addr); in il_print_rx_config_cmd()
4144 D_RADIO("u8[6] bssid_addr: %pM\n", rxon->bssid_addr); in il_print_rx_config_cmd()
4145 D_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id)); in il_print_rx_config_cmd()