774 struct ath_hw {  struct
775 	struct ath_ops reg_ops;
777 	struct device *dev;
778 	struct ieee80211_hw *hw;
779 	struct ath_common common;
780 	struct ath9k_hw_version hw_version;
781 	struct ath9k_ops_config config;
782 	struct ath9k_hw_capabilities caps;
783 	struct ath9k_channel channels[ATH9K_NUM_CHANNELS];
784 	struct ath9k_channel *curchan;
786 	union {
791 	} eeprom;
792 	const struct eeprom_ops *eep_ops;
794 	bool sw_mgmt_crypto_tx;
795 	bool sw_mgmt_crypto_rx;
796 	bool is_pciexpress;
797 	bool aspm_enabled;
798 	bool is_monitoring;
799 	bool need_an_top2_fixup;
800 	u16 tx_trig_level;
802 	u32 nf_regs[6];
803 	struct ath_nf_limits nf_2g;
804 	struct ath_nf_limits nf_5g;
805 	u16 rfsilent;
806 	u32 rfkill_gpio;
807 	u32 rfkill_polarity;
808 	u32 ah_flags;
809 	s16 nf_override;
811 	bool reset_power_on;
812 	bool htc_reset_init;
814 	enum nl80211_iftype opmode;
815 	enum ath9k_power_mode power_mode;
817 	s8 noise;
818 	struct ath9k_hw_cal_data *caldata;
819 	struct ath9k_pacal_info pacal_info;
820 	struct ar5416Stats stats;
821 	struct ath9k_tx_queue_info txq[ATH9K_NUM_TX_QUEUES];
823 	enum ath9k_int imask;
824 	u32 imrs2_reg;
825 	u32 txok_interrupt_mask;
826 	u32 txerr_interrupt_mask;
827 	u32 txdesc_interrupt_mask;
828 	u32 txeol_interrupt_mask;
829 	u32 txurn_interrupt_mask;
830 	atomic_t intr_ref_cnt;
831 	bool chip_fullsleep;
832 	u32 modes_index;
835 	u32 supp_cals;
836 	struct ath9k_cal_list iq_caldata;
837 	struct ath9k_cal_list adcgain_caldata;
838 	struct ath9k_cal_list adcdc_caldata;
839 	struct ath9k_cal_list *cal_list;
840 	struct ath9k_cal_list *cal_list_last;
841 	struct ath9k_cal_list *cal_list_curr;
876 	struct ath_hw_private_ops private_ops;  argument
878 	struct ath_hw_ops ops;  argument
901 	struct ath_hw_radar_conf radar_conf;  argument
903 	u32 originalGain[22];
904 	int initPDADC;
905 	int PDADCdelta;
906 	int led_pin;
907 	u32 gpio_mask;
908 	u32 gpio_val;
910 	struct ar5416IniArray ini_dfs;
911 	struct ar5416IniArray iniModes;
912 	struct ar5416IniArray iniCommon;
913 	struct ar5416IniArray iniBB_RfGain;
914 	struct ar5416IniArray iniBank6;
915 	struct ar5416IniArray iniAddac;
916 	struct ar5416IniArray iniPcieSerdes;
917 	struct ar5416IniArray iniPcieSerdesLowPower;
918 	struct ar5416IniArray iniModesFastClock;
919 	struct ar5416IniArray iniAdditional;
920 	struct ar5416IniArray iniModesRxGain;
921 	struct ar5416IniArray ini_modes_rx_gain_bounds;
922 	struct ar5416IniArray iniModesTxGain;
923 	struct ar5416IniArray iniCckfirNormal;
924 	struct ar5416IniArray iniCckfirJapan2484;
925 	struct ar5416IniArray iniModes_9271_ANI_reg;
926 	struct ar5416IniArray ini_radio_post_sys2ant;
927 	struct ar5416IniArray ini_modes_rxgain_xlna;
928 	struct ar5416IniArray ini_modes_rxgain_bb_core;
929 	struct ar5416IniArray ini_modes_rxgain_bb_postamble;
931 	struct ar5416IniArray iniMac[ATH_INI_NUM_SPLIT];
932 	struct ar5416IniArray iniBB[ATH_INI_NUM_SPLIT];
933 	struct ar5416IniArray iniRadio[ATH_INI_NUM_SPLIT];
934 	struct ar5416IniArray iniSOC[ATH_INI_NUM_SPLIT];
936 	u32 intr_gen_timer_trigger;
937 	u32 intr_gen_timer_thresh;
938 	struct ath_gen_timer_table hw_gen_timers;
940 	struct ar9003_txs *ts_ring;
941 	u32 ts_paddr_start;
942 	u32 ts_paddr_end;
943 	u16 ts_tail;
944 	u16 ts_size;
946 	u32 bb_watchdog_last_status;
947 	u32 bb_watchdog_timeout_ms; /* in ms, 0 to disable */
948 	u8 bb_hang_rx_ofdm; /* true if bb hang due to rx_ofdm */
950 	unsigned int paprd_target_power;
951 	unsigned int paprd_training_power;
952 	unsigned int paprd_ratemask;
953 	unsigned int paprd_ratemask_ht40;
954 	bool paprd_table_write_done;
955 	u32 paprd_gain_table_entries[PAPRD_GAIN_TABLE_ENTRIES];
956 	u8 paprd_gain_table_index[PAPRD_GAIN_TABLE_ENTRIES];
962 	u32 WARegVal;
965 	u32 ent_mode;
968 	struct ath9k_hw_wow wow;
970 	bool is_clk_25mhz;
971 	int (*get_mac_revision)(void);
972 	int (*external_reset)(void);
996 static inline struct ath_common *ath9k_hw_common(struct ath_hw *ah)  in ath9k_hw_common()  argument