3297 	lockdep_assert_held(&ar->htt.tx_lock);  in ath10k_mac_tx_lock()
3318 	lockdep_assert_held(&ar->htt.tx_lock);  in ath10k_mac_tx_unlock()
3338 	lockdep_assert_held(&ar->htt.tx_lock);  in ath10k_mac_vif_tx_lock()
3349 	lockdep_assert_held(&ar->htt.tx_lock);  in ath10k_mac_vif_tx_unlock()
3369 	lockdep_assert_held(&ar->htt.tx_lock);  in ath10k_mac_vif_handle_tx_pause()
3414 	spin_lock_bh(&ar->htt.tx_lock);  in ath10k_mac_handle_tx_pause_vdev()
3419 	spin_unlock_bh(&ar->htt.tx_lock);  in ath10k_mac_handle_tx_pause_vdev()
3454 	if (ar->htt.target_version_major < 3 &&  in ath10k_mac_tx_h_get_txmode()
3619 	return (ar->htt.target_version_major >= 3 &&  in ath10k_mac_tx_frm_has_freq()
3620 		ar->htt.target_version_minor >= 4 &&  in ath10k_mac_tx_frm_has_freq()
3662 		else if (ar->htt.target_version_major >= 3)  in ath10k_mac_tx_h_get_txpath()
3676 	struct ath10k_htt *htt = &ar->htt;  in ath10k_mac_tx_submit()  local
3681 		ret = ath10k_htt_tx(htt, txmode, skb);  in ath10k_mac_tx_submit()
3684 		ret = ath10k_htt_mgmt_tx(htt, skb);  in ath10k_mac_tx_submit()
3947 	spin_lock_bh(&ar->htt.tx_lock);  in ath10k_mac_txq_unref()
3948 	idr_for_each_entry(&ar->htt.pending_tx, msdu, msdu_id) {  in ath10k_mac_txq_unref()
3953 	spin_unlock_bh(&ar->htt.tx_lock);  in ath10k_mac_txq_unref()
3986 	if (ar->htt.tx_q_state.mode == HTT_TX_MODE_SWITCH_PUSH)  in ath10k_mac_tx_can_push()
3989 	if (ar->htt.num_pending_tx < ar->htt.tx_q_state.num_push_allowed)  in ath10k_mac_tx_can_push()
4048 	struct ath10k_htt *htt = &ar->htt;  in ath10k_mac_tx_push_txq()  local
4061 	spin_lock_bh(&ar->htt.tx_lock);  in ath10k_mac_tx_push_txq()
4062 	ret = ath10k_htt_tx_inc_pending(htt);  in ath10k_mac_tx_push_txq()
4063 	spin_unlock_bh(&ar->htt.tx_lock);  in ath10k_mac_tx_push_txq()
4070 		spin_lock_bh(&ar->htt.tx_lock);  in ath10k_mac_tx_push_txq()
4071 		ath10k_htt_tx_dec_pending(htt);  in ath10k_mac_tx_push_txq()
4072 		spin_unlock_bh(&ar->htt.tx_lock);  in ath10k_mac_tx_push_txq()
4089 		spin_lock_bh(&ar->htt.tx_lock);  in ath10k_mac_tx_push_txq()
4090 		ret = ath10k_htt_tx_mgmt_inc_pending(htt, is_mgmt, is_presp);  in ath10k_mac_tx_push_txq()
4093 			ath10k_htt_tx_dec_pending(htt);  in ath10k_mac_tx_push_txq()
4094 			spin_unlock_bh(&ar->htt.tx_lock);  in ath10k_mac_tx_push_txq()
4097 		spin_unlock_bh(&ar->htt.tx_lock);  in ath10k_mac_tx_push_txq()
4104 		spin_lock_bh(&ar->htt.tx_lock);  in ath10k_mac_tx_push_txq()
4105 		ath10k_htt_tx_dec_pending(htt);  in ath10k_mac_tx_push_txq()
4107 			ath10k_htt_tx_mgmt_dec_pending(htt);  in ath10k_mac_tx_push_txq()
4108 		spin_unlock_bh(&ar->htt.tx_lock);  in ath10k_mac_tx_push_txq()
4113 	spin_lock_bh(&ar->htt.tx_lock);  in ath10k_mac_tx_push_txq()
4115 	spin_unlock_bh(&ar->htt.tx_lock);  in ath10k_mac_tx_push_txq()
4147 	if (ar->htt.tx_q_state.mode != HTT_TX_MODE_SWITCH_PUSH)  in ath10k_mac_tx_push_pending()
4150 	if (ar->htt.num_pending_tx >= (ar->htt.max_num_pending_tx / 2))  in ath10k_mac_tx_push_pending()
4333 	struct ath10k_htt *htt = &ar->htt;  in ath10k_mac_op_tx()  local
4357 		spin_lock_bh(&ar->htt.tx_lock);  in ath10k_mac_op_tx()
4360 		ret = ath10k_htt_tx_inc_pending(htt);  in ath10k_mac_op_tx()
4364 			spin_unlock_bh(&ar->htt.tx_lock);  in ath10k_mac_op_tx()
4369 		ret = ath10k_htt_tx_mgmt_inc_pending(htt, is_mgmt, is_presp);  in ath10k_mac_op_tx()
4373 			ath10k_htt_tx_dec_pending(htt);  in ath10k_mac_op_tx()
4374 			spin_unlock_bh(&ar->htt.tx_lock);  in ath10k_mac_op_tx()
4378 		spin_unlock_bh(&ar->htt.tx_lock);  in ath10k_mac_op_tx()
4385 			spin_lock_bh(&ar->htt.tx_lock);  in ath10k_mac_op_tx()
4386 			ath10k_htt_tx_dec_pending(htt);  in ath10k_mac_op_tx()
4388 				ath10k_htt_tx_mgmt_dec_pending(htt);  in ath10k_mac_op_tx()
4389 			spin_unlock_bh(&ar->htt.tx_lock);  in ath10k_mac_op_tx()
4403 	if (ar->htt.tx_q_state.mode != HTT_TX_MODE_SWITCH_PUSH)  in ath10k_mac_op_wake_tx_queue()
5448 	spin_lock_bh(&ar->htt.tx_lock);  in ath10k_add_interface()
5451 	spin_unlock_bh(&ar->htt.tx_lock);  in ath10k_add_interface()
5595 	spin_lock_bh(&ar->htt.tx_lock);  in ath10k_remove_interface()
5597 	spin_unlock_bh(&ar->htt.tx_lock);  in ath10k_remove_interface()
7049 	time_left = wait_event_timeout(ar->htt.empty_tx_wq, ({  in ath10k_mac_wait_tx_complete()
7052 			spin_lock_bh(&ar->htt.tx_lock);  in ath10k_mac_wait_tx_complete()
7053 			empty = (ar->htt.num_pending_tx == 0);  in ath10k_mac_wait_tx_complete()
7054 			spin_unlock_bh(&ar->htt.tx_lock);  in ath10k_mac_wait_tx_complete()