348 static int ax88772_hw_reset(struct usbnet *dev, int in_pm)  in ax88772_hw_reset()  argument
355 			      AX_GPIO_GPO2EN, 5, in_pm);  in ax88772_hw_reset()
362 			     0, 0, NULL, in_pm);  in ax88772_hw_reset()
369 		ret = asix_sw_reset(dev, AX_SWRESET_IPPD, in_pm);  in ax88772_hw_reset()
375 		ret = asix_sw_reset(dev, AX_SWRESET_CLEAR, in_pm);  in ax88772_hw_reset()
382 				    in_pm);  in ax88772_hw_reset()
387 				    in_pm);  in ax88772_hw_reset()
394 	if (in_pm && (!asix_mdio_read_nopm(dev->net, dev->mii.phy_id,  in ax88772_hw_reset()
400 	ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL, in_pm);  in ax88772_hw_reset()
404 	ret = asix_write_medium_mode(dev, AX88772_MEDIUM_DEFAULT, in_pm);  in ax88772_hw_reset()
410 			     AX88772_IPG2_DEFAULT, 0, NULL, in_pm);  in ax88772_hw_reset()
419 			     ETH_ALEN, data->mac_addr, in_pm);  in ax88772_hw_reset()
424 	ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL, in_pm);  in ax88772_hw_reset()
428 	rx_ctl = asix_read_rx_ctl(dev, in_pm);  in ax88772_hw_reset()
432 	rx_ctl = asix_read_medium_status(dev, in_pm);  in ax88772_hw_reset()
443 static int ax88772a_hw_reset(struct usbnet *dev, int in_pm)  in ax88772a_hw_reset()  argument
450 	ret = asix_write_gpio(dev, AX_GPIO_RSE, 5, in_pm);  in ax88772a_hw_reset()
457 			     AX_PHYSEL_SSEN, 0, 0, NULL, in_pm);  in ax88772a_hw_reset()
464 	ret = asix_sw_reset(dev, AX_SWRESET_IPPD | AX_SWRESET_IPRL, in_pm);  in ax88772a_hw_reset()
470 	ret = asix_sw_reset(dev, AX_SWRESET_IPRL, in_pm);  in ax88772a_hw_reset()
476 	ret = asix_sw_reset(dev, AX_SWRESET_CLEAR, in_pm);  in ax88772a_hw_reset()
480 	ret = asix_sw_reset(dev, AX_SWRESET_IPRL, in_pm);  in ax88772a_hw_reset()
486 	if (in_pm && (!asix_mdio_read_nopm(dev->net, dev->mii.phy_id,  in ax88772a_hw_reset()
493 			    0, 1, &chipcode, in_pm);  in ax88772a_hw_reset()
499 				     0, NULL, in_pm);  in ax88772a_hw_reset()
535 				AX88772_IPG2_DEFAULT, 0, NULL, in_pm);  in ax88772a_hw_reset()
544 							data->mac_addr, in_pm);  in ax88772a_hw_reset()
549 	ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL, in_pm);  in ax88772a_hw_reset()
553 	ret = asix_write_medium_mode(dev, AX88772_MEDIUM_DEFAULT, in_pm);  in ax88772a_hw_reset()
558 	ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL, in_pm);  in ax88772a_hw_reset()
562 	rx_ctl = asix_read_rx_ctl(dev, in_pm);  in ax88772a_hw_reset()
566 	rx_ctl = asix_read_medium_status(dev, in_pm);  in ax88772a_hw_reset()