994 static int phy_base_read(struct phy_device *phydev, u32 regnum)  in phy_base_read()  function
1027 		reg_val = phy_base_read(phydev, MSCC_PHY_PROC_CMD);  in vsc8584_cmd()
1089 	reg = phy_base_read(phydev, MSCC_INT_MEM_CNTL);  in vsc8584_micro_assert_reset()
1096 	reg = phy_base_read(phydev, MSCC_INT_MEM_CNTL);  in vsc8584_micro_assert_reset()
1102 	reg = phy_base_read(phydev, MSCC_DW8051_CNTL_STATUS);  in vsc8584_micro_assert_reset()
1110 	reg = phy_base_read(phydev, MSCC_INT_MEM_CNTL);  in vsc8584_micro_assert_reset()
1137 	*crc = phy_base_read(phydev, MSCC_PHY_VERIPHY_CNTL_2);  in vsc8584_get_fw_crc()
1192 	reg = phy_base_read(phydev, MSCC_TRAP_ROM_ADDR(1));  in vsc8574_is_serdes_init()
1198 	reg = phy_base_read(phydev, MSCC_PATCH_RAM_ADDR(1));  in vsc8574_is_serdes_init()
1204 	reg = phy_base_read(phydev, MSCC_INT_MEM_CNTL);  in vsc8574_is_serdes_init()
1210 	reg = phy_base_read(phydev, MSCC_DW8051_CNTL_STATUS);  in vsc8574_is_serdes_init()
1301 	reg = phy_base_read(phydev, MSCC_PHY_EXT_CNTL_STATUS);  in vsc8574_config_pre_init()
1321 	reg = phy_base_read(phydev, MSCC_PHY_TEST_PAGE_8);  in vsc8574_config_pre_init()
1341 	reg = phy_base_read(phydev, MSCC_PHY_TEST_PAGE_8);  in vsc8574_config_pre_init()
1348 	reg = phy_base_read(phydev, MSCC_PHY_EXT_CNTL_STATUS);  in vsc8574_config_pre_init()
1468 	reg = phy_base_read(phydev, MSCC_PHY_EXT_CNTL_STATUS);  in vsc8584_config_pre_init()
1474 	reg = phy_base_read(phydev,  MSCC_PHY_BYPASS_CONTROL);  in vsc8584_config_pre_init()
1491 	reg = phy_base_read(phydev, MSCC_PHY_TEST_PAGE_8);  in vsc8584_config_pre_init()
1499 	reg = phy_base_read(phydev, MSCC_PHY_TR_MSB);  in vsc8584_config_pre_init()
1520 	reg = phy_base_read(phydev, MSCC_PHY_TEST_PAGE_8);  in vsc8584_config_pre_init()
1527 	reg = phy_base_read(phydev, MSCC_PHY_EXT_CNTL_STATUS);  in vsc8584_config_pre_init()
1668 	val = phy_base_read(phydev, MSCC_PHY_MAC_CFG_FASTLINK);  in vsc8584_config_init()
1817 	reg = phy_base_read(phydev, MSCC_PHY_EXT_CNTL_STATUS);  in vsc8514_config_pre_init()
1823 	reg = phy_base_read(phydev, MSCC_PHY_TEST_PAGE_8);  in vsc8514_config_pre_init()
1834 	reg = phy_base_read(phydev, MSCC_PHY_TEST_PAGE_8);  in vsc8514_config_pre_init()
1840 	reg = phy_base_read(phydev, MSCC_PHY_EXT_CNTL_STATUS);  in vsc8514_config_pre_init()
1876 		val = phy_base_read(phydev, MSCC_EXT_PAGE_CSR_CNTL_19);  in vsc85xx_csr_ctrl_phy_read()
1884 	val_l = phy_base_read(phydev, MSCC_EXT_PAGE_CSR_CNTL_17);  in vsc85xx_csr_ctrl_phy_read()
1887 	val_h = phy_base_read(phydev, MSCC_EXT_PAGE_CSR_CNTL_18);  in vsc85xx_csr_ctrl_phy_read()
1929 		val = phy_base_read(phydev, MSCC_EXT_PAGE_CSR_CNTL_19);  in vsc85xx_csr_ctrl_phy_write()
2025 	val = phy_base_read(phydev, MSCC_PHY_MAC_CFG_FASTLINK);  in vsc8514_config_init()