Lines Matching refs:phydev

78 static int dp83811_ack_interrupt(struct phy_device *phydev)  in dp83811_ack_interrupt()  argument
82 err = phy_read(phydev, MII_DP83811_INT_STAT1); in dp83811_ack_interrupt()
86 err = phy_read(phydev, MII_DP83811_INT_STAT2); in dp83811_ack_interrupt()
90 err = phy_read(phydev, MII_DP83811_INT_STAT3); in dp83811_ack_interrupt()
97 static int dp83811_set_wol(struct phy_device *phydev, in dp83811_set_wol() argument
100 struct net_device *ndev = phydev->attached_dev; in dp83811_set_wol()
113 phy_write_mmd(phydev, DP83811_DEVADDR, MII_DP83811_WOL_DA1, in dp83811_set_wol()
115 phy_write_mmd(phydev, DP83811_DEVADDR, MII_DP83811_WOL_DA2, in dp83811_set_wol()
117 phy_write_mmd(phydev, DP83811_DEVADDR, MII_DP83811_WOL_DA3, in dp83811_set_wol()
120 value = phy_read_mmd(phydev, DP83811_DEVADDR, in dp83811_set_wol()
128 phy_write_mmd(phydev, DP83811_DEVADDR, in dp83811_set_wol()
131 phy_write_mmd(phydev, DP83811_DEVADDR, in dp83811_set_wol()
134 phy_write_mmd(phydev, DP83811_DEVADDR, in dp83811_set_wol()
144 phy_write_mmd(phydev, DP83811_DEVADDR, MII_DP83811_WOL_CFG, in dp83811_set_wol()
147 phy_clear_bits_mmd(phydev, DP83811_DEVADDR, MII_DP83811_WOL_CFG, in dp83811_set_wol()
154 static void dp83811_get_wol(struct phy_device *phydev, in dp83811_get_wol() argument
163 value = phy_read_mmd(phydev, DP83811_DEVADDR, MII_DP83811_WOL_CFG); in dp83811_get_wol()
169 sopass_val = phy_read_mmd(phydev, DP83811_DEVADDR, in dp83811_get_wol()
174 sopass_val = phy_read_mmd(phydev, DP83811_DEVADDR, in dp83811_get_wol()
179 sopass_val = phy_read_mmd(phydev, DP83811_DEVADDR, in dp83811_get_wol()
192 static int dp83811_config_intr(struct phy_device *phydev) in dp83811_config_intr() argument
196 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) { in dp83811_config_intr()
197 misr_status = phy_read(phydev, MII_DP83811_INT_STAT1); in dp83811_config_intr()
210 err = phy_write(phydev, MII_DP83811_INT_STAT1, misr_status); in dp83811_config_intr()
214 misr_status = phy_read(phydev, MII_DP83811_INT_STAT2); in dp83811_config_intr()
225 err = phy_write(phydev, MII_DP83811_INT_STAT2, misr_status); in dp83811_config_intr()
229 misr_status = phy_read(phydev, MII_DP83811_INT_STAT3); in dp83811_config_intr()
237 err = phy_write(phydev, MII_DP83811_INT_STAT3, misr_status); in dp83811_config_intr()
240 err = phy_write(phydev, MII_DP83811_INT_STAT1, 0); in dp83811_config_intr()
244 err = phy_write(phydev, MII_DP83811_INT_STAT2, 0); in dp83811_config_intr()
248 err = phy_write(phydev, MII_DP83811_INT_STAT3, 0); in dp83811_config_intr()
254 static int dp83811_config_aneg(struct phy_device *phydev) in dp83811_config_aneg() argument
258 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { in dp83811_config_aneg()
259 value = phy_read(phydev, MII_DP83811_SGMII_CTRL); in dp83811_config_aneg()
260 if (phydev->autoneg == AUTONEG_ENABLE) { in dp83811_config_aneg()
261 err = phy_write(phydev, MII_DP83811_SGMII_CTRL, in dp83811_config_aneg()
266 err = phy_write(phydev, MII_DP83811_SGMII_CTRL, in dp83811_config_aneg()
273 return genphy_config_aneg(phydev); in dp83811_config_aneg()
276 static int dp83811_config_init(struct phy_device *phydev) in dp83811_config_init() argument
280 value = phy_read(phydev, MII_DP83811_SGMII_CTRL); in dp83811_config_init()
281 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { in dp83811_config_init()
282 err = phy_write(phydev, MII_DP83811_SGMII_CTRL, in dp83811_config_init()
285 err = phy_write(phydev, MII_DP83811_SGMII_CTRL, in dp83811_config_init()
295 return phy_write_mmd(phydev, DP83811_DEVADDR, MII_DP83811_WOL_CFG, in dp83811_config_init()
299 static int dp83811_phy_reset(struct phy_device *phydev) in dp83811_phy_reset() argument
303 err = phy_write(phydev, MII_DP83811_RESET_CTRL, DP83811_HW_RESET); in dp83811_phy_reset()
310 static int dp83811_suspend(struct phy_device *phydev) in dp83811_suspend() argument
314 value = phy_read_mmd(phydev, DP83811_DEVADDR, MII_DP83811_WOL_CFG); in dp83811_suspend()
317 genphy_suspend(phydev); in dp83811_suspend()
322 static int dp83811_resume(struct phy_device *phydev) in dp83811_resume() argument
324 genphy_resume(phydev); in dp83811_resume()
326 phy_set_bits_mmd(phydev, DP83811_DEVADDR, MII_DP83811_WOL_CFG, in dp83811_resume()