Lines Matching refs:phydev
19 #define BRCM_PHY_MODEL(phydev) \ argument
20 ((phydev)->drv->phy_id & (phydev)->drv->phy_id_mask)
22 #define BRCM_PHY_REV(phydev) \ argument
23 ((phydev)->drv->phy_id & ~((phydev)->drv->phy_id_mask))
29 static int bcm54210e_config_init(struct phy_device *phydev) in bcm54210e_config_init() argument
33 val = bcm54xx_auxctl_read(phydev, MII_BCM54XX_AUXCTL_SHDWSEL_MISC); in bcm54210e_config_init()
36 bcm54xx_auxctl_write(phydev, MII_BCM54XX_AUXCTL_SHDWSEL_MISC, val); in bcm54210e_config_init()
38 val = bcm_phy_read_shadow(phydev, BCM54810_SHD_CLK_CTL); in bcm54210e_config_init()
40 bcm_phy_write_shadow(phydev, BCM54810_SHD_CLK_CTL, val); in bcm54210e_config_init()
42 if (phydev->dev_flags & PHY_BRCM_EN_MASTER_MODE) { in bcm54210e_config_init()
43 val = phy_read(phydev, MII_CTRL1000); in bcm54210e_config_init()
45 phy_write(phydev, MII_CTRL1000, val); in bcm54210e_config_init()
51 static int bcm54612e_config_init(struct phy_device *phydev) in bcm54612e_config_init() argument
56 if ((phydev->interface != PHY_INTERFACE_MODE_RGMII_ID) && in bcm54612e_config_init()
57 (phydev->interface != PHY_INTERFACE_MODE_RGMII_TXID)) { in bcm54612e_config_init()
60 bcm_phy_write_shadow(phydev, 0x03, 0); in bcm54612e_config_init()
64 if ((phydev->interface != PHY_INTERFACE_MODE_RGMII_ID) && in bcm54612e_config_init()
65 (phydev->interface != PHY_INTERFACE_MODE_RGMII_RXID)) { in bcm54612e_config_init()
66 reg = bcm54xx_auxctl_read(phydev, in bcm54612e_config_init()
72 bcm54xx_auxctl_write(phydev, MII_BCM54XX_AUXCTL_SHDWSEL_MISC, in bcm54612e_config_init()
77 if (!(phydev->dev_flags & PHY_BRCM_RX_REFCLK_UNUSED)) { in bcm54612e_config_init()
80 reg = bcm_phy_read_exp(phydev, BCM54612E_EXP_SPARE0); in bcm54612e_config_init()
81 err = bcm_phy_write_exp(phydev, BCM54612E_EXP_SPARE0, in bcm54612e_config_init()
91 static int bcm54xx_config_clock_delay(struct phy_device *phydev) in bcm54xx_config_clock_delay() argument
96 val = bcm54xx_auxctl_read(phydev, MII_BCM54XX_AUXCTL_SHDWSEL_MISC); in bcm54xx_config_clock_delay()
98 if (phydev->interface == PHY_INTERFACE_MODE_RGMII || in bcm54xx_config_clock_delay()
99 phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) { in bcm54xx_config_clock_delay()
103 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID || in bcm54xx_config_clock_delay()
104 phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) { in bcm54xx_config_clock_delay()
108 rc = bcm54xx_auxctl_write(phydev, MII_BCM54XX_AUXCTL_SHDWSEL_MISC, in bcm54xx_config_clock_delay()
114 val = bcm_phy_read_shadow(phydev, BCM54810_SHD_CLK_CTL); in bcm54xx_config_clock_delay()
115 if (phydev->interface == PHY_INTERFACE_MODE_RGMII || in bcm54xx_config_clock_delay()
116 phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) { in bcm54xx_config_clock_delay()
120 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID || in bcm54xx_config_clock_delay()
121 phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) { in bcm54xx_config_clock_delay()
125 rc = bcm_phy_write_shadow(phydev, BCM54810_SHD_CLK_CTL, val); in bcm54xx_config_clock_delay()
133 static int bcm50610_a0_workaround(struct phy_device *phydev) in bcm50610_a0_workaround() argument
137 err = bcm_phy_write_exp(phydev, MII_BCM54XX_EXP_AADJ1CH0, in bcm50610_a0_workaround()
143 err = bcm_phy_write_exp(phydev, MII_BCM54XX_EXP_AADJ1CH3, in bcm50610_a0_workaround()
148 err = bcm_phy_write_exp(phydev, MII_BCM54XX_EXP_EXP75, in bcm50610_a0_workaround()
153 err = bcm_phy_write_exp(phydev, MII_BCM54XX_EXP_EXP96, in bcm50610_a0_workaround()
158 err = bcm_phy_write_exp(phydev, MII_BCM54XX_EXP_EXP97, in bcm50610_a0_workaround()
164 static int bcm54xx_phydsp_config(struct phy_device *phydev) in bcm54xx_phydsp_config() argument
169 err = bcm54xx_auxctl_write(phydev, in bcm54xx_phydsp_config()
176 if (BRCM_PHY_MODEL(phydev) == PHY_ID_BCM50610 || in bcm54xx_phydsp_config()
177 BRCM_PHY_MODEL(phydev) == PHY_ID_BCM50610M) { in bcm54xx_phydsp_config()
179 err = bcm_phy_write_exp(phydev, MII_BCM54XX_EXP_EXP08, in bcm54xx_phydsp_config()
184 if (phydev->drv->phy_id == PHY_ID_BCM50610) { in bcm54xx_phydsp_config()
185 err = bcm50610_a0_workaround(phydev); in bcm54xx_phydsp_config()
191 if (BRCM_PHY_MODEL(phydev) == PHY_ID_BCM57780) { in bcm54xx_phydsp_config()
194 val = bcm_phy_read_exp(phydev, MII_BCM54XX_EXP_EXP75); in bcm54xx_phydsp_config()
199 err = bcm_phy_write_exp(phydev, MII_BCM54XX_EXP_EXP75, val); in bcm54xx_phydsp_config()
204 err2 = bcm54xx_auxctl_write(phydev, in bcm54xx_phydsp_config()
212 static void bcm54xx_adjust_rxrefclk(struct phy_device *phydev) in bcm54xx_adjust_rxrefclk() argument
219 if (BRCM_PHY_MODEL(phydev) != PHY_ID_BCM57780 && in bcm54xx_adjust_rxrefclk()
220 BRCM_PHY_MODEL(phydev) != PHY_ID_BCM50610 && in bcm54xx_adjust_rxrefclk()
221 BRCM_PHY_MODEL(phydev) != PHY_ID_BCM50610M) in bcm54xx_adjust_rxrefclk()
224 val = bcm_phy_read_shadow(phydev, BCM54XX_SHD_SCR3); in bcm54xx_adjust_rxrefclk()
230 if ((BRCM_PHY_MODEL(phydev) == PHY_ID_BCM50610 || in bcm54xx_adjust_rxrefclk()
231 BRCM_PHY_MODEL(phydev) == PHY_ID_BCM50610M) && in bcm54xx_adjust_rxrefclk()
232 BRCM_PHY_REV(phydev) >= 0x3) { in bcm54xx_adjust_rxrefclk()
239 if (phydev->dev_flags & PHY_BRCM_RX_REFCLK_UNUSED) { in bcm54xx_adjust_rxrefclk()
246 if (!clk125en || (phydev->dev_flags & PHY_BRCM_AUTO_PWRDWN_ENABLE)) in bcm54xx_adjust_rxrefclk()
251 if (phydev->dev_flags & PHY_BRCM_DIS_TXCRXC_NOENRGY) in bcm54xx_adjust_rxrefclk()
255 bcm_phy_write_shadow(phydev, BCM54XX_SHD_SCR3, val); in bcm54xx_adjust_rxrefclk()
257 val = bcm_phy_read_shadow(phydev, BCM54XX_SHD_APD); in bcm54xx_adjust_rxrefclk()
263 if (!clk125en || (phydev->dev_flags & PHY_BRCM_AUTO_PWRDWN_ENABLE)) in bcm54xx_adjust_rxrefclk()
269 bcm_phy_write_shadow(phydev, BCM54XX_SHD_APD, val); in bcm54xx_adjust_rxrefclk()
272 static int bcm54xx_config_init(struct phy_device *phydev) in bcm54xx_config_init() argument
276 reg = phy_read(phydev, MII_BCM54XX_ECR); in bcm54xx_config_init()
282 err = phy_write(phydev, MII_BCM54XX_ECR, reg); in bcm54xx_config_init()
290 err = phy_write(phydev, MII_BCM54XX_IMR, reg); in bcm54xx_config_init()
294 if ((BRCM_PHY_MODEL(phydev) == PHY_ID_BCM50610 || in bcm54xx_config_init()
295 BRCM_PHY_MODEL(phydev) == PHY_ID_BCM50610M) && in bcm54xx_config_init()
296 (phydev->dev_flags & PHY_BRCM_CLEAR_RGMII_MODE)) in bcm54xx_config_init()
297 bcm_phy_write_shadow(phydev, BCM54XX_SHD_RGMII_MODE, 0); in bcm54xx_config_init()
299 if ((phydev->dev_flags & PHY_BRCM_RX_REFCLK_UNUSED) || in bcm54xx_config_init()
300 (phydev->dev_flags & PHY_BRCM_DIS_TXCRXC_NOENRGY) || in bcm54xx_config_init()
301 (phydev->dev_flags & PHY_BRCM_AUTO_PWRDWN_ENABLE)) in bcm54xx_config_init()
302 bcm54xx_adjust_rxrefclk(phydev); in bcm54xx_config_init()
304 if (BRCM_PHY_MODEL(phydev) == PHY_ID_BCM54210E) { in bcm54xx_config_init()
305 err = bcm54210e_config_init(phydev); in bcm54xx_config_init()
308 } else if (BRCM_PHY_MODEL(phydev) == PHY_ID_BCM54612E) { in bcm54xx_config_init()
309 err = bcm54612e_config_init(phydev); in bcm54xx_config_init()
312 } else if (BRCM_PHY_MODEL(phydev) == PHY_ID_BCM54810) { in bcm54xx_config_init()
314 val = bcm_phy_read_exp(phydev, in bcm54xx_config_init()
317 err = bcm_phy_write_exp(phydev, in bcm54xx_config_init()
324 bcm54xx_phydsp_config(phydev); in bcm54xx_config_init()
332 bcm_phy_write_shadow(phydev, BCM5482_SHD_LEDS1, val); in bcm54xx_config_init()
337 bcm_phy_write_exp(phydev, BCM_EXP_MULTICOLOR, val); in bcm54xx_config_init()
342 static int bcm5482_config_init(struct phy_device *phydev) in bcm5482_config_init() argument
346 err = bcm54xx_config_init(phydev); in bcm5482_config_init()
348 if (phydev->dev_flags & PHY_BCM_FLAGS_MODE_1000BX) { in bcm5482_config_init()
352 reg = bcm_phy_read_shadow(phydev, BCM5482_SHD_SSD); in bcm5482_config_init()
353 bcm_phy_write_shadow(phydev, BCM5482_SHD_SSD, in bcm5482_config_init()
362 err = bcm_phy_read_exp(phydev, reg); in bcm5482_config_init()
365 err = bcm_phy_write_exp(phydev, reg, err | in bcm5482_config_init()
375 err = bcm_phy_read_exp(phydev, reg); in bcm5482_config_init()
378 err = bcm_phy_write_exp(phydev, reg, in bcm5482_config_init()
386 reg = bcm_phy_read_shadow(phydev, BCM5482_SHD_MODE); in bcm5482_config_init()
387 bcm_phy_write_shadow(phydev, BCM5482_SHD_MODE, in bcm5482_config_init()
394 bcm_phy_write_shadow(phydev, BCM5482_SHD_LEDS1, in bcm5482_config_init()
404 phydev->autoneg = AUTONEG_DISABLE; in bcm5482_config_init()
405 phydev->speed = SPEED_1000; in bcm5482_config_init()
406 phydev->duplex = DUPLEX_FULL; in bcm5482_config_init()
412 static int bcm5482_read_status(struct phy_device *phydev) in bcm5482_read_status() argument
416 err = genphy_read_status(phydev); in bcm5482_read_status()
418 if (phydev->dev_flags & PHY_BCM_FLAGS_MODE_1000BX) { in bcm5482_read_status()
423 if (phydev->link) { in bcm5482_read_status()
424 phydev->speed = SPEED_1000; in bcm5482_read_status()
425 phydev->duplex = DUPLEX_FULL; in bcm5482_read_status()
432 static int bcm5481_config_aneg(struct phy_device *phydev) in bcm5481_config_aneg() argument
434 struct device_node *np = phydev->mdio.dev.of_node; in bcm5481_config_aneg()
438 ret = genphy_config_aneg(phydev); in bcm5481_config_aneg()
441 bcm54xx_config_clock_delay(phydev); in bcm5481_config_aneg()
445 ret = bcm_phy_write_exp(phydev, MII_BCM54XX_EXP_SEL_ER + 0x9, in bcm5481_config_aneg()
454 static int bcm54616s_config_aneg(struct phy_device *phydev) in bcm54616s_config_aneg() argument
459 ret = genphy_config_aneg(phydev); in bcm54616s_config_aneg()
462 bcm54xx_config_clock_delay(phydev); in bcm54616s_config_aneg()
467 static int brcm_phy_setbits(struct phy_device *phydev, int reg, int set) in brcm_phy_setbits() argument
471 val = phy_read(phydev, reg); in brcm_phy_setbits()
475 return phy_write(phydev, reg, val | set); in brcm_phy_setbits()
478 static int brcm_fet_config_init(struct phy_device *phydev) in brcm_fet_config_init() argument
483 err = phy_write(phydev, MII_BMCR, BMCR_RESET); in brcm_fet_config_init()
487 reg = phy_read(phydev, MII_BRCM_FET_INTREG); in brcm_fet_config_init()
498 err = phy_write(phydev, MII_BRCM_FET_INTREG, reg); in brcm_fet_config_init()
503 brcmtest = phy_read(phydev, MII_BRCM_FET_BRCMTEST); in brcm_fet_config_init()
509 err = phy_write(phydev, MII_BRCM_FET_BRCMTEST, reg); in brcm_fet_config_init()
514 reg = phy_read(phydev, MII_BRCM_FET_SHDW_AUXMODE4); in brcm_fet_config_init()
523 err = phy_write(phydev, MII_BRCM_FET_SHDW_AUXMODE4, reg); in brcm_fet_config_init()
528 err = brcm_phy_setbits(phydev, MII_BRCM_FET_SHDW_MISCCTRL, in brcm_fet_config_init()
533 if (phydev->dev_flags & PHY_BRCM_AUTO_PWRDWN_ENABLE) { in brcm_fet_config_init()
535 err = brcm_phy_setbits(phydev, MII_BRCM_FET_SHDW_AUXSTAT2, in brcm_fet_config_init()
541 err2 = phy_write(phydev, MII_BRCM_FET_BRCMTEST, brcmtest); in brcm_fet_config_init()
548 static int brcm_fet_ack_interrupt(struct phy_device *phydev) in brcm_fet_ack_interrupt() argument
553 reg = phy_read(phydev, MII_BRCM_FET_INTREG); in brcm_fet_ack_interrupt()
560 static int brcm_fet_config_intr(struct phy_device *phydev) in brcm_fet_config_intr() argument
564 reg = phy_read(phydev, MII_BRCM_FET_INTREG); in brcm_fet_config_intr()
568 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) in brcm_fet_config_intr()
573 err = phy_write(phydev, MII_BRCM_FET_INTREG, reg); in brcm_fet_config_intr()
581 static int bcm53xx_phy_probe(struct phy_device *phydev) in bcm53xx_phy_probe() argument
585 priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL); in bcm53xx_phy_probe()
589 phydev->priv = priv; in bcm53xx_phy_probe()
591 priv->stats = devm_kcalloc(&phydev->mdio.dev, in bcm53xx_phy_probe()
592 bcm_phy_get_sset_count(phydev), sizeof(u64), in bcm53xx_phy_probe()
600 static void bcm53xx_phy_get_stats(struct phy_device *phydev, in bcm53xx_phy_get_stats() argument
603 struct bcm53xx_phy_priv *priv = phydev->priv; in bcm53xx_phy_get_stats()
605 bcm_phy_get_stats(phydev, priv->stats, stats, data); in bcm53xx_phy_get_stats()