Lines Matching refs:base_addr

339 	outl(TLAN_HC_AD_RST, dev->base_addr + TLAN_HOST_CMD);  in tlan_stop()
525 dev->base_addr = pci_io_base; in tlan_probe1()
542 dev->base_addr = ioaddr; in tlan_probe1()
600 (int)dev->base_addr, in tlan_probe1()
635 release_region(dev->base_addr, 0x10); in tlan_eisa_cleanup()
919 priv->tlan_rev = tlan_dio_read8(dev->base_addr, TLAN_DEF_REVISION); in tlan_open()
1108 outl(tail_list_phys, dev->base_addr + TLAN_CH_PARM); in tlan_start_tx()
1109 outl(TLAN_HC_GO, dev->base_addr + TLAN_HOST_CMD); in tlan_start_tx()
1162 host_int = inw(dev->base_addr + TLAN_HOST_INT); in tlan_handle_interrupt()
1168 outw(host_int, dev->base_addr + TLAN_HOST_INT); in tlan_handle_interrupt()
1173 outl(host_cmd, dev->base_addr + TLAN_HOST_CMD); in tlan_handle_interrupt()
1243 tlan_print_dio(dev->base_addr); in tlan_get_stats()
1290 tmp = tlan_dio_read8(dev->base_addr, TLAN_NET_CMD); in tlan_set_multicast_list()
1291 tlan_dio_write8(dev->base_addr, in tlan_set_multicast_list()
1294 tmp = tlan_dio_read8(dev->base_addr, TLAN_NET_CMD); in tlan_set_multicast_list()
1295 tlan_dio_write8(dev->base_addr, in tlan_set_multicast_list()
1300 tlan_dio_write32(dev->base_addr, TLAN_HASH_1, in tlan_set_multicast_list()
1302 tlan_dio_write32(dev->base_addr, TLAN_HASH_2, in tlan_set_multicast_list()
1322 tlan_dio_write32(dev->base_addr, TLAN_HASH_1, hash1); in tlan_set_multicast_list()
1323 tlan_dio_write32(dev->base_addr, TLAN_HASH_2, hash2); in tlan_set_multicast_list()
1419 outl(head_list_phys, dev->base_addr + TLAN_CH_PARM); in tlan_handle_tx_eof()
1427 tlan_dio_write8(dev->base_addr, in tlan_handle_tx_eof()
1572 outl(head_list_phys, dev->base_addr + TLAN_CH_PARM); in tlan_handle_rx_eof()
1578 tlan_dio_write8(dev->base_addr, in tlan_handle_rx_eof()
1662 outl(head_list_phys, dev->base_addr + TLAN_CH_PARM); in tlan_handle_tx_eoc()
1709 error = inl(dev->base_addr + TLAN_CH_PARM); in tlan_handle_status_check()
1712 outl(TLAN_HC_AD_RST, dev->base_addr + TLAN_HOST_CMD); in tlan_handle_status_check()
1722 net_sts = tlan_dio_read8(dev->base_addr, TLAN_NET_STS); in tlan_handle_status_check()
1724 tlan_dio_write8(dev->base_addr, TLAN_NET_STS, net_sts); in tlan_handle_status_check()
1787 outl(head_list_phys, dev->base_addr + TLAN_CH_PARM); in tlan_handle_rx_eoc()
1871 tlan_dio_write8(dev->base_addr, in tlan_timer()
2101 outw(TLAN_GOOD_TX_FRMS, dev->base_addr + TLAN_DIO_ADR); in tlan_read_and_clear_stats()
2102 tx_good = inb(dev->base_addr + TLAN_DIO_DATA); in tlan_read_and_clear_stats()
2103 tx_good += inb(dev->base_addr + TLAN_DIO_DATA + 1) << 8; in tlan_read_and_clear_stats()
2104 tx_good += inb(dev->base_addr + TLAN_DIO_DATA + 2) << 16; in tlan_read_and_clear_stats()
2105 tx_under = inb(dev->base_addr + TLAN_DIO_DATA + 3); in tlan_read_and_clear_stats()
2107 outw(TLAN_GOOD_RX_FRMS, dev->base_addr + TLAN_DIO_ADR); in tlan_read_and_clear_stats()
2108 rx_good = inb(dev->base_addr + TLAN_DIO_DATA); in tlan_read_and_clear_stats()
2109 rx_good += inb(dev->base_addr + TLAN_DIO_DATA + 1) << 8; in tlan_read_and_clear_stats()
2110 rx_good += inb(dev->base_addr + TLAN_DIO_DATA + 2) << 16; in tlan_read_and_clear_stats()
2111 rx_over = inb(dev->base_addr + TLAN_DIO_DATA + 3); in tlan_read_and_clear_stats()
2113 outw(TLAN_DEFERRED_TX, dev->base_addr + TLAN_DIO_ADR); in tlan_read_and_clear_stats()
2114 def_tx = inb(dev->base_addr + TLAN_DIO_DATA); in tlan_read_and_clear_stats()
2115 def_tx += inb(dev->base_addr + TLAN_DIO_DATA + 1) << 8; in tlan_read_and_clear_stats()
2116 crc = inb(dev->base_addr + TLAN_DIO_DATA + 2); in tlan_read_and_clear_stats()
2117 code = inb(dev->base_addr + TLAN_DIO_DATA + 3); in tlan_read_and_clear_stats()
2119 outw(TLAN_MULTICOL_FRMS, dev->base_addr + TLAN_DIO_ADR); in tlan_read_and_clear_stats()
2120 multi_col = inb(dev->base_addr + TLAN_DIO_DATA); in tlan_read_and_clear_stats()
2121 multi_col += inb(dev->base_addr + TLAN_DIO_DATA + 1) << 8; in tlan_read_and_clear_stats()
2122 single_col = inb(dev->base_addr + TLAN_DIO_DATA + 2); in tlan_read_and_clear_stats()
2123 single_col += inb(dev->base_addr + TLAN_DIO_DATA + 3) << 8; in tlan_read_and_clear_stats()
2125 outw(TLAN_EXCESSCOL_FRMS, dev->base_addr + TLAN_DIO_ADR); in tlan_read_and_clear_stats()
2126 excess_col = inb(dev->base_addr + TLAN_DIO_DATA); in tlan_read_and_clear_stats()
2127 late_col = inb(dev->base_addr + TLAN_DIO_DATA + 1); in tlan_read_and_clear_stats()
2128 loss = inb(dev->base_addr + TLAN_DIO_DATA + 2); in tlan_read_and_clear_stats()
2183 data = inl(dev->base_addr + TLAN_HOST_CMD); in tlan_reset_adapter()
2185 outl(data, dev->base_addr + TLAN_HOST_CMD); in tlan_reset_adapter()
2191 data = inl(dev->base_addr + TLAN_HOST_CMD); in tlan_reset_adapter()
2193 outl(data, dev->base_addr + TLAN_HOST_CMD); in tlan_reset_adapter()
2198 tlan_dio_write32(dev->base_addr, (u16) i, 0); in tlan_reset_adapter()
2203 tlan_dio_write16(dev->base_addr, TLAN_NET_CONFIG, (u16) data); in tlan_reset_adapter()
2207 outl(TLAN_HC_LD_TMR | 0x3f, dev->base_addr + TLAN_HOST_CMD); in tlan_reset_adapter()
2208 outl(TLAN_HC_LD_THR | 0x9, dev->base_addr + TLAN_HOST_CMD); in tlan_reset_adapter()
2212 outw(TLAN_NET_SIO, dev->base_addr + TLAN_DIO_ADR); in tlan_reset_adapter()
2213 addr = dev->base_addr + TLAN_DIO_DATA + TLAN_NET_SIO; in tlan_reset_adapter()
2220 tlan_dio_write8(dev->base_addr, TLAN_INT_DIS, data8); in tlan_reset_adapter()
2228 tlan_dio_write8(dev->base_addr, TLAN_ACOMMIT, 0x0a); in tlan_reset_adapter()
2230 tlan_dio_write8(dev->base_addr, TLAN_ACOMMIT, 0x00); in tlan_reset_adapter()
2233 tlan_dio_write8(dev->base_addr, TLAN_ACOMMIT, 0x08); in tlan_reset_adapter()
2241 tlan_dio_write16(dev->base_addr, TLAN_NET_CONFIG, (u16) data); in tlan_reset_adapter()
2272 tlan_dio_write8(dev->base_addr, TLAN_NET_CMD, data); in tlan_finish_reset()
2276 tlan_dio_write8(dev->base_addr, TLAN_NET_MASK, data); in tlan_finish_reset()
2277 tlan_dio_write16(dev->base_addr, TLAN_MAX_RX, ((1536)+7)&~7); in tlan_finish_reset()
2327 sio = tlan_dio_read8(dev->base_addr, TLAN_NET_SIO); in tlan_finish_reset()
2329 tlan_dio_write8(dev->base_addr, TLAN_NET_SIO, sio); in tlan_finish_reset()
2335 outb((TLAN_HC_INT_ON >> 8), dev->base_addr + TLAN_HOST_CMD + 1); in tlan_finish_reset()
2338 dev->base_addr + TLAN_HOST_CMD + 1); in tlan_finish_reset()
2339 outl(priv->rx_list_dma, dev->base_addr + TLAN_CH_PARM); in tlan_finish_reset()
2340 outl(TLAN_HC_GO | TLAN_HC_RT, dev->base_addr + TLAN_HOST_CMD); in tlan_finish_reset()
2341 tlan_dio_write8(dev->base_addr, TLAN_LED_REG, TLAN_LED_LINK); in tlan_finish_reset()
2384 tlan_dio_write8(dev->base_addr, in tlan_set_mac()
2388 tlan_dio_write8(dev->base_addr, in tlan_set_mac()
2522 tlan_mii_sync(dev->base_addr); in tlan_phy_power_down()
2528 tlan_mii_sync(dev->base_addr); in tlan_phy_power_down()
2549 tlan_mii_sync(dev->base_addr); in tlan_phy_power_up()
2552 tlan_mii_sync(dev->base_addr); in tlan_phy_power_up()
2574 tlan_mii_sync(dev->base_addr); in tlan_phy_reset()
2653 tlan_dio_write16(dev->base_addr, TLAN_NET_CONFIG, data); in tlan_phy_start_link()
2779 tlan_dio_write8(dev->base_addr, TLAN_LED_REG, 0); in tlan_phy_monitor()
2786 tlan_mii_sync(dev->base_addr); in tlan_phy_monitor()
2801 tlan_dio_write8(dev->base_addr, TLAN_LED_REG, TLAN_LED_LINK); in tlan_phy_monitor()
2859 outw(TLAN_NET_SIO, dev->base_addr + TLAN_DIO_ADR); in tlan_mii_read_reg()
2860 sio = dev->base_addr + TLAN_DIO_DATA + TLAN_NET_SIO; in tlan_mii_read_reg()
2865 tlan_mii_sync(dev->base_addr); in tlan_mii_read_reg()
2871 tlan_mii_send_data(dev->base_addr, 0x1, 2); /* start (01b) */ in tlan_mii_read_reg()
2872 tlan_mii_send_data(dev->base_addr, 0x2, 2); /* read (10b) */ in tlan_mii_read_reg()
2873 tlan_mii_send_data(dev->base_addr, phy, 5); /* device # */ in tlan_mii_read_reg()
2874 tlan_mii_send_data(dev->base_addr, reg, 5); /* register # */ in tlan_mii_read_reg()
3027 outw(TLAN_NET_SIO, dev->base_addr + TLAN_DIO_ADR); in tlan_mii_write_reg()
3028 sio = dev->base_addr + TLAN_DIO_DATA + TLAN_NET_SIO; in tlan_mii_write_reg()
3033 tlan_mii_sync(dev->base_addr); in tlan_mii_write_reg()
3039 tlan_mii_send_data(dev->base_addr, 0x1, 2); /* start (01b) */ in tlan_mii_write_reg()
3040 tlan_mii_send_data(dev->base_addr, 0x1, 2); /* write (01b) */ in tlan_mii_write_reg()
3041 tlan_mii_send_data(dev->base_addr, phy, 5); /* device # */ in tlan_mii_write_reg()
3042 tlan_mii_send_data(dev->base_addr, reg, 5); /* register # */ in tlan_mii_write_reg()
3044 tlan_mii_send_data(dev->base_addr, 0x2, 2); /* send ACK */ in tlan_mii_write_reg()
3045 tlan_mii_send_data(dev->base_addr, val, 16); /* send data */ in tlan_mii_write_reg()
3260 tlan_ee_send_start(dev->base_addr); in tlan_ee_read_byte()
3261 err = tlan_ee_send_byte(dev->base_addr, 0xa0, TLAN_EEPROM_ACK); in tlan_ee_read_byte()
3266 err = tlan_ee_send_byte(dev->base_addr, ee_addr, TLAN_EEPROM_ACK); in tlan_ee_read_byte()
3271 tlan_ee_send_start(dev->base_addr); in tlan_ee_read_byte()
3272 err = tlan_ee_send_byte(dev->base_addr, 0xa1, TLAN_EEPROM_ACK); in tlan_ee_read_byte()
3277 tlan_ee_receive_byte(dev->base_addr, data, TLAN_EEPROM_STOP); in tlan_ee_read_byte()