Lines Matching refs:readl
16 u32 value = readl(ioaddr + DMA_BUS_MODE); in dwmac4_dma_reset()
24 if (!(readl(ioaddr + DMA_BUS_MODE) & DMA_BUS_MODE_SFT_RESET)) in dwmac4_dma_reset()
47 u32 value = readl(ioaddr + DMA_CHAN_TX_CONTROL(chan)); in dwmac4_dma_start_tx()
52 value = readl(ioaddr + GMAC_CONFIG); in dwmac4_dma_start_tx()
59 u32 value = readl(ioaddr + DMA_CHAN_TX_CONTROL(chan)); in dwmac4_dma_stop_tx()
64 value = readl(ioaddr + GMAC_CONFIG); in dwmac4_dma_stop_tx()
71 u32 value = readl(ioaddr + DMA_CHAN_RX_CONTROL(chan)); in dwmac4_dma_start_rx()
77 value = readl(ioaddr + GMAC_CONFIG); in dwmac4_dma_start_rx()
84 u32 value = readl(ioaddr + DMA_CHAN_RX_CONTROL(chan)); in dwmac4_dma_stop_rx()
120 u32 intr_status = readl(ioaddr + DMA_CHAN_STATUS(chan)); in dwmac4_dma_interrupt()
121 u32 intr_en = readl(ioaddr + DMA_CHAN_INTR_ENA(chan)); in dwmac4_dma_interrupt()
182 u32 value = readl(ioaddr + GMAC_CONFIG); in stmmac_dwmac4_set_mac()
198 hi_addr = readl(ioaddr + high); in stmmac_dwmac4_get_mac_addr()
199 lo_addr = readl(ioaddr + low); in stmmac_dwmac4_get_mac_addr()