Lines Matching refs:mii_control
1392 u32 mii_status, mii_control, mii_control_1000, reg; in phy_init() local
1462 mii_control = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ); in phy_init()
1463 mii_control |= BMCR_ANENABLE; in phy_init()
1469 mii_control |= BMCR_ANRESTART; in phy_init()
1470 if (mii_rw(dev, np->phyaddr, MII_BMCR, mii_control)) { in phy_init()
1479 if (phy_reset(dev, mii_control)) { in phy_init()
1522 mii_control = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ); in phy_init()
1523 mii_control |= (BMCR_ANRESTART | BMCR_ANENABLE); in phy_init()
1525 mii_control |= BMCR_PDOWN; in phy_init()
1526 if (mii_rw(dev, np->phyaddr, MII_BMCR, mii_control)) in phy_init()
6123 u16 phy_reserved, mii_control; in nv_restore_phy() local
6136 mii_control = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ); in nv_restore_phy()
6137 mii_control |= (BMCR_ANRESTART | BMCR_ANENABLE); in nv_restore_phy()
6138 mii_rw(dev, np->phyaddr, MII_BMCR, mii_control); in nv_restore_phy()