1147 		rxdp->control_0	= rxdp->control_1 = 0;  in vxge_hw_ring_rxd_reserve()
1214 	rxdp->control_0	= VXGE_HW_RING_RXD_LIST_OWN_ADAPTER;  in vxge_hw_ring_rxd_post_post()
1238 	rxdp->control_0	= VXGE_HW_RING_RXD_LIST_OWN_ADAPTER;  in vxge_hw_ring_rxd_post()
1298 	u64 control_0, own;  in vxge_hw_ring_rxd_next_completed()  local
1310 	control_0 = rxdp->control_0;  in vxge_hw_ring_rxd_next_completed()
1311 	own = control_0 & VXGE_HW_RING_RXD_LIST_OWN_ADAPTER;  in vxge_hw_ring_rxd_next_completed()
1312 	*t_code	= (u8)VXGE_HW_RING_RXD_T_CODE_GET(control_0);  in vxge_hw_ring_rxd_next_completed()
1400 		&fifo->nofl_db->control_0);  in __vxge_hw_non_offload_db_post()
1466 			txdp->control_0 = txdp->control_1 = 0;  in vxge_hw_fifo_txdl_reserve()
1501 		txdp->control_0 = txdp->control_1 = 0;  in vxge_hw_fifo_txdl_buffer_set()
1503 		txdp->control_0 |= VXGE_HW_FIFO_TXD_GATHER_CODE(  in vxge_hw_fifo_txdl_buffer_set()
1511 			txdp_last->control_0 |= VXGE_HW_FIFO_TXD_GATHER_CODE(  in vxge_hw_fifo_txdl_buffer_set()
1519 	txdp->control_0 |= VXGE_HW_FIFO_TXD_BUFFER_SIZE(size);  in vxge_hw_fifo_txdl_buffer_set()
1546 	txdp_last->control_0 |=  in vxge_hw_fifo_txdl_post()
1548 	txdp_first->control_0 |= VXGE_HW_FIFO_TXD_LIST_OWN_ADAPTER;  in vxge_hw_fifo_txdl_post()
1616 	if (!(txdp->control_0 & VXGE_HW_FIFO_TXD_LIST_OWN_ADAPTER)) {  in vxge_hw_fifo_txdl_next_completed()
1622 		*t_code = (u8)VXGE_HW_FIFO_TXD_T_CODE_GET(txdp->control_0);  in vxge_hw_fifo_txdl_next_completed()