Lines Matching refs:MLXSW_ITEM32

74 MLXSW_ITEM32(pci, wqe, c, 0x00, 31, 1);
86 MLXSW_ITEM32(pci, wqe, lp, 0x00, 30, 1);
91 MLXSW_ITEM32(pci, wqe, type, 0x00, 23, 4);
143 MLXSW_ITEM32(pci, cqe0, lag, 0x00, 23, 1);
144 MLXSW_ITEM32(pci, cqe12, lag, 0x00, 24, 1);
153 MLXSW_ITEM32(pci, cqe, system_port, 0x00, 0, 16);
154 MLXSW_ITEM32(pci, cqe0, lag_id, 0x00, 4, 12);
155 MLXSW_ITEM32(pci, cqe12, lag_id, 0x00, 0, 16);
157 MLXSW_ITEM32(pci, cqe0, lag_subport, 0x00, 0, 4);
158 MLXSW_ITEM32(pci, cqe12, lag_subport, 0x00, 16, 8);
164 MLXSW_ITEM32(pci, cqe, wqe_counter, 0x04, 16, 16);
171 MLXSW_ITEM32(pci, cqe, byte_count, 0x04, 0, 14);
176 MLXSW_ITEM32(pci, cqe, trap_id, 0x08, 0, 9);
182 MLXSW_ITEM32(pci, cqe0, crc, 0x0C, 8, 1);
183 MLXSW_ITEM32(pci, cqe12, crc, 0x0C, 9, 1);
189 MLXSW_ITEM32(pci, cqe0, e, 0x0C, 7, 1);
190 MLXSW_ITEM32(pci, cqe12, e, 0x00, 27, 1);
197 MLXSW_ITEM32(pci, cqe0, sr, 0x0C, 6, 1);
198 MLXSW_ITEM32(pci, cqe12, sr, 0x00, 26, 1);
204 MLXSW_ITEM32(pci, cqe0, dqn, 0x0C, 1, 5);
205 MLXSW_ITEM32(pci, cqe12, dqn, 0x0C, 1, 6);
211 MLXSW_ITEM32(pci, cqe01, owner, 0x0C, 0, 1);
212 MLXSW_ITEM32(pci, cqe2, owner, 0x1C, 0, 1);
218 MLXSW_ITEM32(pci, eqe, event_type, 0x0C, 24, 8);
225 MLXSW_ITEM32(pci, eqe, event_sub_type, 0x0C, 16, 8);
230 MLXSW_ITEM32(pci, eqe, cqn, 0x0C, 8, 7);
235 MLXSW_ITEM32(pci, eqe, owner, 0x0C, 0, 1);
240 MLXSW_ITEM32(pci, eqe, cmd_token, 0x00, 16, 16);
245 MLXSW_ITEM32(pci, eqe, cmd_status, 0x00, 0, 8);
250 MLXSW_ITEM32(pci, eqe, cmd_out_param_h, 0x04, 0, 32);
255 MLXSW_ITEM32(pci, eqe, cmd_out_param_l, 0x08, 0, 32);