18 static int npa_aq_enqueue_wait(struct rvu *rvu, struct rvu_block *block,  in npa_aq_enqueue_wait()  argument
29 	reg = rvu_read64(rvu, block->addr, NPA_AF_AQ_STATUS);  in npa_aq_enqueue_wait()
39 	rvu_write64(rvu, block->addr, NPA_AF_AQ_DOOR, 1);  in npa_aq_enqueue_wait()
55 static int rvu_npa_aq_enq_inst(struct rvu *rvu, struct npa_aq_enq_req *req,  in rvu_npa_aq_enq_inst()  argument
58 	struct rvu_hwinfo *hw = rvu->hw;  in rvu_npa_aq_enq_inst()
68 	pfvf = rvu_get_pfvf(rvu, pcifunc);  in rvu_npa_aq_enq_inst()
72 	blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPA, pcifunc);  in rvu_npa_aq_enq_inst()
79 		dev_warn(rvu->dev, "%s: NPA AQ not initialized\n", __func__);  in rvu_npa_aq_enq_inst()
83 	npalf = rvu_get_lf(rvu, block, pcifunc, 0);  in rvu_npa_aq_enq_inst()
147 	rc = npa_aq_enqueue_wait(rvu, block, &inst);  in rvu_npa_aq_enq_inst()
199 static int npa_lf_hwctx_disable(struct rvu *rvu, struct hwctx_disable_req *req)  in npa_lf_hwctx_disable()  argument
201 	struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, req->hdr.pcifunc);  in npa_lf_hwctx_disable()
232 		rc = rvu_npa_aq_enq_inst(rvu, &aq_req, NULL);  in npa_lf_hwctx_disable()
235 			dev_err(rvu->dev, "Failed to disable %s:%d context\n",  in npa_lf_hwctx_disable()
244 int rvu_mbox_handler_npa_aq_enq(struct rvu *rvu,  in rvu_mbox_handler_npa_aq_enq()  argument
248 	return rvu_npa_aq_enq_inst(rvu, req, rsp);  in rvu_mbox_handler_npa_aq_enq()
251 int rvu_mbox_handler_npa_hwctx_disable(struct rvu *rvu,  in rvu_mbox_handler_npa_hwctx_disable()  argument
255 	return npa_lf_hwctx_disable(rvu, req);  in rvu_mbox_handler_npa_hwctx_disable()
258 static void npa_ctx_free(struct rvu *rvu, struct rvu_pfvf *pfvf)  in npa_ctx_free()  argument
263 	qmem_free(rvu->dev, pfvf->aura_ctx);  in npa_ctx_free()
269 	qmem_free(rvu->dev, pfvf->pool_ctx);  in npa_ctx_free()
272 	qmem_free(rvu->dev, pfvf->npa_qints_ctx);  in npa_ctx_free()
276 int rvu_mbox_handler_npa_lf_alloc(struct rvu *rvu,  in rvu_mbox_handler_npa_lf_alloc()  argument
281 	struct rvu_hwinfo *hw = rvu->hw;  in rvu_mbox_handler_npa_lf_alloc()
292 	pfvf = rvu_get_pfvf(rvu, pcifunc);  in rvu_mbox_handler_npa_lf_alloc()
293 	blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPA, pcifunc);  in rvu_mbox_handler_npa_lf_alloc()
298 	npalf = rvu_get_lf(rvu, block, pcifunc, 0);  in rvu_mbox_handler_npa_lf_alloc()
303 	err = rvu_lf_reset(rvu, block, npalf);  in rvu_mbox_handler_npa_lf_alloc()
305 		dev_err(rvu->dev, "Failed to reset NPALF%d\n", npalf);  in rvu_mbox_handler_npa_lf_alloc()
309 	ctx_cfg = rvu_read64(rvu, blkaddr, NPA_AF_CONST1);  in rvu_mbox_handler_npa_lf_alloc()
313 	err = qmem_alloc(rvu->dev, &pfvf->aura_ctx,  in rvu_mbox_handler_npa_lf_alloc()
325 	err = qmem_alloc(rvu->dev, &pfvf->pool_ctx, req->nr_pools, hwctx_size);  in rvu_mbox_handler_npa_lf_alloc()
335 	cfg = rvu_read64(rvu, blkaddr, NPA_AF_CONST);  in rvu_mbox_handler_npa_lf_alloc()
340 	err = qmem_alloc(rvu->dev, &pfvf->npa_qints_ctx, qints, hwctx_size);  in rvu_mbox_handler_npa_lf_alloc()
344 	cfg = rvu_read64(rvu, blkaddr, NPA_AF_LFX_AURAS_CFG(npalf));  in rvu_mbox_handler_npa_lf_alloc()
349 	rvu_write64(rvu, blkaddr, NPA_AF_LFX_AURAS_CFG(npalf), cfg);  in rvu_mbox_handler_npa_lf_alloc()
352 	rvu_write64(rvu, blkaddr, NPA_AF_LFX_LOC_AURAS_BASE(npalf),  in rvu_mbox_handler_npa_lf_alloc()
356 	rvu_write64(rvu, blkaddr, NPA_AF_LFX_QINTS_CFG(npalf), BIT_ULL(36));  in rvu_mbox_handler_npa_lf_alloc()
357 	rvu_write64(rvu, blkaddr, NPA_AF_LFX_QINTS_BASE(npalf),  in rvu_mbox_handler_npa_lf_alloc()
363 	npa_ctx_free(rvu, pfvf);  in rvu_mbox_handler_npa_lf_alloc()
368 	cfg = rvu_read64(rvu, blkaddr, NPA_AF_CONST);  in rvu_mbox_handler_npa_lf_alloc()
375 int rvu_mbox_handler_npa_lf_free(struct rvu *rvu, struct msg_req *req,  in rvu_mbox_handler_npa_lf_free()  argument
378 	struct rvu_hwinfo *hw = rvu->hw;  in rvu_mbox_handler_npa_lf_free()
385 	pfvf = rvu_get_pfvf(rvu, pcifunc);  in rvu_mbox_handler_npa_lf_free()
386 	blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPA, pcifunc);  in rvu_mbox_handler_npa_lf_free()
391 	npalf = rvu_get_lf(rvu, block, pcifunc, 0);  in rvu_mbox_handler_npa_lf_free()
396 	err = rvu_lf_reset(rvu, block, npalf);  in rvu_mbox_handler_npa_lf_free()
398 		dev_err(rvu->dev, "Failed to reset NPALF%d\n", npalf);  in rvu_mbox_handler_npa_lf_free()
402 	npa_ctx_free(rvu, pfvf);  in rvu_mbox_handler_npa_lf_free()
407 static int npa_aq_init(struct rvu *rvu, struct rvu_block *block)  in npa_aq_init()  argument
413 	cfg = rvu_read64(rvu, block->addr, NPA_AF_GEN_CFG);  in npa_aq_init()
416 	rvu_write64(rvu, block->addr, NPA_AF_GEN_CFG, cfg);  in npa_aq_init()
419 	rvu_write64(rvu, block->addr, NPA_AF_GEN_CFG, cfg);  in npa_aq_init()
423 	cfg = rvu_read64(rvu, block->addr, NPA_AF_NDC_CFG);  in npa_aq_init()
425 	rvu_write64(rvu, block->addr, NPA_AF_NDC_CFG, cfg);  in npa_aq_init()
431 	err = rvu_aq_alloc(rvu, &block->aq,  in npa_aq_init()
437 	rvu_write64(rvu, block->addr, NPA_AF_AQ_CFG, AQ_SIZE);  in npa_aq_init()
438 	rvu_write64(rvu, block->addr,  in npa_aq_init()
443 int rvu_npa_init(struct rvu *rvu)  in rvu_npa_init()  argument
445 	struct rvu_hwinfo *hw = rvu->hw;  in rvu_npa_init()
448 	blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPA, 0);  in rvu_npa_init()
453 	err = npa_aq_init(rvu, &hw->block[blkaddr]);  in rvu_npa_init()
460 void rvu_npa_freemem(struct rvu *rvu)  in rvu_npa_freemem()  argument
462 	struct rvu_hwinfo *hw = rvu->hw;  in rvu_npa_freemem()
466 	blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPA, 0);  in rvu_npa_freemem()
471 	rvu_aq_free(rvu, block->aq);  in rvu_npa_freemem()
474 void rvu_npa_lf_teardown(struct rvu *rvu, u16 pcifunc, int npalf)  in rvu_npa_lf_teardown()  argument
476 	struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, pcifunc);  in rvu_npa_lf_teardown()
482 	npa_lf_hwctx_disable(rvu, &ctx_req);  in rvu_npa_lf_teardown()
486 	npa_lf_hwctx_disable(rvu, &ctx_req);  in rvu_npa_lf_teardown()
488 	npa_ctx_free(rvu, pfvf);  in rvu_npa_lf_teardown()