1714 	int vfs = rvu->vfs;  in rvu_mbox_intr_handler()  local
1727 	if (vfs > 64) {  in rvu_mbox_intr_handler()
1731 		rvu_queue_work(&rvu->afvf_wq_info, 64, vfs, intr);  in rvu_mbox_intr_handler()
1732 		vfs -= 64;  in rvu_mbox_intr_handler()
1738 	rvu_queue_work(&rvu->afvf_wq_info, 0, vfs, intr);  in rvu_mbox_intr_handler()
1899 	if (rvu->vfs > 64)  in rvu_flr_intr_handler()
1900 		rvu_afvf_queue_flr_work(rvu, 64, rvu->vfs - 64);  in rvu_flr_intr_handler()
2229 	int vfs = rvu->vfs;  in rvu_disable_afvf_intr()  local
2231 	rvupf_write64(rvu, RVU_PF_VFPF_MBOX_INT_ENA_W1CX(0), INTR_MASK(vfs));  in rvu_disable_afvf_intr()
2232 	rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1CX(0), INTR_MASK(vfs));  in rvu_disable_afvf_intr()
2233 	rvupf_write64(rvu, RVU_PF_VFME_INT_ENA_W1CX(0), INTR_MASK(vfs));  in rvu_disable_afvf_intr()
2234 	if (vfs <= 64)  in rvu_disable_afvf_intr()
2238 		      INTR_MASK(vfs - 64));  in rvu_disable_afvf_intr()
2239 	rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1CX(1), INTR_MASK(vfs - 64));  in rvu_disable_afvf_intr()
2240 	rvupf_write64(rvu, RVU_PF_VFME_INT_ENA_W1CX(1), INTR_MASK(vfs - 64));  in rvu_disable_afvf_intr()
2245 	int vfs = rvu->vfs;  in rvu_enable_afvf_intr()  local
2251 	rvupf_write64(rvu, RVU_PF_VFPF_MBOX_INTX(0), INTR_MASK(vfs));  in rvu_enable_afvf_intr()
2252 	rvupf_write64(rvu, RVU_PF_VFPF_MBOX_INT_ENA_W1SX(0), INTR_MASK(vfs));  in rvu_enable_afvf_intr()
2255 	rvupf_write64(rvu, RVU_PF_VFFLR_INTX(0), INTR_MASK(vfs));  in rvu_enable_afvf_intr()
2256 	rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1SX(0), INTR_MASK(vfs));  in rvu_enable_afvf_intr()
2257 	rvupf_write64(rvu, RVU_PF_VFME_INT_ENA_W1SX(0), INTR_MASK(vfs));  in rvu_enable_afvf_intr()
2260 	if (vfs <= 64)  in rvu_enable_afvf_intr()
2263 	rvupf_write64(rvu, RVU_PF_VFPF_MBOX_INTX(1), INTR_MASK(vfs - 64));  in rvu_enable_afvf_intr()
2265 		      INTR_MASK(vfs - 64));  in rvu_enable_afvf_intr()
2267 	rvupf_write64(rvu, RVU_PF_VFFLR_INTX(1), INTR_MASK(vfs - 64));  in rvu_enable_afvf_intr()
2268 	rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1SX(1), INTR_MASK(vfs - 64));  in rvu_enable_afvf_intr()
2269 	rvupf_write64(rvu, RVU_PF_VFME_INT_ENA_W1SX(1), INTR_MASK(vfs - 64));  in rvu_enable_afvf_intr()
2301 	int err, chans, vfs;  in rvu_enable_sriov()  local
2313 	vfs = pci_sriov_get_totalvfs(pdev);  in rvu_enable_sriov()
2316 	if (vfs > chans)  in rvu_enable_sriov()
2317 		vfs = chans;  in rvu_enable_sriov()
2324 	if (vfs & 0x1) {  in rvu_enable_sriov()
2327 			 vfs - 1, vfs);  in rvu_enable_sriov()
2328 		vfs--;  in rvu_enable_sriov()
2331 	if (!vfs)  in rvu_enable_sriov()
2338 	rvu->vfs = vfs;  in rvu_enable_sriov()
2340 	err = rvu_mbox_init(rvu, &rvu->afvf_wq_info, TYPE_AFVF, vfs,  in rvu_enable_sriov()
2349 	err = pci_enable_sriov(pdev, vfs);  in rvu_enable_sriov()