360 	if (pf >= rvu->hw->total_pfs)  in is_pf_func_valid()
502 	for (pf = 0; pf < hw->total_pfs; pf++) {  in rvu_setup_msix_resources()
618 	for (id = 0; id < hw->total_pfs; id++) {  in rvu_free_hw_resources()
649 	hw->total_pfs = (cfg >> 32) & 0xFF;  in rvu_setup_hw_resources()
783 	rvu->pf = devm_kcalloc(rvu->dev, hw->total_pfs,  in rvu_setup_hw_resources()
1724 	rvu_queue_work(&rvu->afpf_wq_info, 0, rvu->hw->total_pfs, intr);  in rvu_mbox_intr_handler()
1749 		    RVU_AF_PFAF_MBOX_INT, INTR_MASK(hw->total_pfs));  in rvu_enable_mbox_intr()
1753 		    INTR_MASK(hw->total_pfs) & ~1ULL);  in rvu_enable_mbox_intr()
1830 	if (pf >= rvu->hw->total_pfs) {  in rvu_flr_handler()
1831 		rvu_afvf_flr_handler(rvu, pf - rvu->hw->total_pfs);  in rvu_flr_handler()
1866 		dev = vf + start_vf + rvu->hw->total_pfs;  in rvu_afvf_queue_flr_work()
1884 	for (pf = 0; pf < rvu->hw->total_pfs; pf++) {  in rvu_flr_intr_handler()
1952 	for (pf = 0; pf < rvu->hw->total_pfs; pf++) {  in rvu_me_pf_intr_handler()
1972 		    INTR_MASK(rvu->hw->total_pfs) & ~1ULL);  in rvu_unregister_interrupts()
1976 		    INTR_MASK(rvu->hw->total_pfs) & ~1ULL);  in rvu_unregister_interrupts()
1980 		    INTR_MASK(rvu->hw->total_pfs) & ~1ULL);  in rvu_unregister_interrupts()
2065 		    RVU_AF_PFFLR_INT, INTR_MASK(rvu->hw->total_pfs));  in rvu_register_interrupts()
2068 		    INTR_MASK(rvu->hw->total_pfs) & ~1ULL);  in rvu_register_interrupts()
2085 		    RVU_AF_PFME_INT, INTR_MASK(rvu->hw->total_pfs));  in rvu_register_interrupts()
2088 		    INTR_MASK(rvu->hw->total_pfs) & ~1ULL);  in rvu_register_interrupts()
2197 	for (pf = 0; pf < rvu->hw->total_pfs; pf++) {  in rvu_flr_init()
2209 	num_devs = rvu->hw->total_pfs + pci_sriov_get_totalvfs(rvu->pdev);  in rvu_flr_init()
2441 			    rvu->hw->total_pfs, rvu_afpf_mbox_handler,  in rvu_probe()