30 	u8     i             = 0;  in ixgbe_dcb_config_rx_arbiter_82599()  local
41 	for (i = 0; i < MAX_USER_PRIORITY; i++)  in ixgbe_dcb_config_rx_arbiter_82599()
42 		reg |= (prio_tc[i] << (i * IXGBE_RTRUP2TC_UP_SHIFT));  in ixgbe_dcb_config_rx_arbiter_82599()
46 	for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {  in ixgbe_dcb_config_rx_arbiter_82599()
47 		credit_refill = refill[i];  in ixgbe_dcb_config_rx_arbiter_82599()
48 		credit_max    = max[i];  in ixgbe_dcb_config_rx_arbiter_82599()
51 		reg |= (u32)(bwg_id[i]) << IXGBE_RTRPT4C_BWG_SHIFT;  in ixgbe_dcb_config_rx_arbiter_82599()
53 		if (prio_type[i] == prio_link)  in ixgbe_dcb_config_rx_arbiter_82599()
56 		IXGBE_WRITE_REG(hw, IXGBE_RTRPT4C(i), reg);  in ixgbe_dcb_config_rx_arbiter_82599()
86 	u8     i;  in ixgbe_dcb_config_tx_desc_arbiter_82599()  local
89 	for (i = 0; i < 128; i++) {  in ixgbe_dcb_config_tx_desc_arbiter_82599()
90 		IXGBE_WRITE_REG(hw, IXGBE_RTTDQSEL, i);  in ixgbe_dcb_config_tx_desc_arbiter_82599()
95 	for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {  in ixgbe_dcb_config_tx_desc_arbiter_82599()
96 		max_credits = max[i];  in ixgbe_dcb_config_tx_desc_arbiter_82599()
98 		reg |= refill[i];  in ixgbe_dcb_config_tx_desc_arbiter_82599()
99 		reg |= (u32)(bwg_id[i]) << IXGBE_RTTDT2C_BWG_SHIFT;  in ixgbe_dcb_config_tx_desc_arbiter_82599()
101 		if (prio_type[i] == prio_group)  in ixgbe_dcb_config_tx_desc_arbiter_82599()
104 		if (prio_type[i] == prio_link)  in ixgbe_dcb_config_tx_desc_arbiter_82599()
107 		IXGBE_WRITE_REG(hw, IXGBE_RTTDT2C(i), reg);  in ixgbe_dcb_config_tx_desc_arbiter_82599()
139 	u8 i;  in ixgbe_dcb_config_tx_data_arbiter_82599()  local
152 	for (i = 0; i < MAX_USER_PRIORITY; i++)  in ixgbe_dcb_config_tx_data_arbiter_82599()
153 		reg |= (prio_tc[i] << (i * IXGBE_RTTUP2TC_UP_SHIFT));  in ixgbe_dcb_config_tx_data_arbiter_82599()
157 	for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {  in ixgbe_dcb_config_tx_data_arbiter_82599()
158 		reg = refill[i];  in ixgbe_dcb_config_tx_data_arbiter_82599()
159 		reg |= (u32)(max[i]) << IXGBE_RTTPT2C_MCL_SHIFT;  in ixgbe_dcb_config_tx_data_arbiter_82599()
160 		reg |= (u32)(bwg_id[i]) << IXGBE_RTTPT2C_BWG_SHIFT;  in ixgbe_dcb_config_tx_data_arbiter_82599()
162 		if (prio_type[i] == prio_group)  in ixgbe_dcb_config_tx_data_arbiter_82599()
165 		if (prio_type[i] == prio_link)  in ixgbe_dcb_config_tx_data_arbiter_82599()
168 		IXGBE_WRITE_REG(hw, IXGBE_RTTPT2C(i), reg);  in ixgbe_dcb_config_tx_data_arbiter_82599()
192 	u32 i, j, fcrtl, reg;  in ixgbe_dcb_config_pfc_82599()  local
217 	for (i = 0; i < MAX_USER_PRIORITY; i++) {  in ixgbe_dcb_config_pfc_82599()
218 		if (prio_tc[i] > max_tc)  in ixgbe_dcb_config_pfc_82599()
219 			max_tc = prio_tc[i];  in ixgbe_dcb_config_pfc_82599()
224 	for (i = 0; i <= max_tc; i++) {  in ixgbe_dcb_config_pfc_82599()
228 			if ((prio_tc[j] == i) && (pfc_en & BIT(j))) {  in ixgbe_dcb_config_pfc_82599()
235 			reg = (hw->fc.high_water[i] << 10) | IXGBE_FCRTH_FCEN;  in ixgbe_dcb_config_pfc_82599()
236 			fcrtl = (hw->fc.low_water[i] << 10) | IXGBE_FCRTL_XONE;  in ixgbe_dcb_config_pfc_82599()
237 			IXGBE_WRITE_REG(hw, IXGBE_FCRTL_82599(i), fcrtl);  in ixgbe_dcb_config_pfc_82599()
245 			reg = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(i)) - 24576;  in ixgbe_dcb_config_pfc_82599()
246 			IXGBE_WRITE_REG(hw, IXGBE_FCRTL_82599(i), 0);  in ixgbe_dcb_config_pfc_82599()
249 		IXGBE_WRITE_REG(hw, IXGBE_FCRTH_82599(i), reg);  in ixgbe_dcb_config_pfc_82599()
252 	for (; i < MAX_TRAFFIC_CLASS; i++) {  in ixgbe_dcb_config_pfc_82599()
253 		IXGBE_WRITE_REG(hw, IXGBE_FCRTL_82599(i), 0);  in ixgbe_dcb_config_pfc_82599()
254 		IXGBE_WRITE_REG(hw, IXGBE_FCRTH_82599(i), 0);  in ixgbe_dcb_config_pfc_82599()
259 	for (i = 0; i < (MAX_TRAFFIC_CLASS / 2); i++)  in ixgbe_dcb_config_pfc_82599()
260 		IXGBE_WRITE_REG(hw, IXGBE_FCTTV(i), reg);  in ixgbe_dcb_config_pfc_82599()
278 	u8  i   = 0;  in ixgbe_dcb_config_tc_stats_82599()  local
286 	for (i = 0; i < 32; i++) {  in ixgbe_dcb_config_tc_stats_82599()
287 		reg = 0x01010101 * (i / 4);  in ixgbe_dcb_config_tc_stats_82599()
288 		IXGBE_WRITE_REG(hw, IXGBE_RQSMR(i), reg);  in ixgbe_dcb_config_tc_stats_82599()
298 	for (i = 0; i < 32; i++) {  in ixgbe_dcb_config_tc_stats_82599()
299 		if (i < 8)  in ixgbe_dcb_config_tc_stats_82599()
301 		else if (i < 16)  in ixgbe_dcb_config_tc_stats_82599()
303 		else if (i < 20)  in ixgbe_dcb_config_tc_stats_82599()
305 		else if (i < 24)  in ixgbe_dcb_config_tc_stats_82599()
307 		else if (i < 26)  in ixgbe_dcb_config_tc_stats_82599()
309 		else if (i < 28)  in ixgbe_dcb_config_tc_stats_82599()
311 		else if (i < 30)  in ixgbe_dcb_config_tc_stats_82599()
315 		IXGBE_WRITE_REG(hw, IXGBE_TQSM(i), reg);  in ixgbe_dcb_config_tc_stats_82599()