159 	regs_buff[0] = rd32(IGC_CTRL);  in igc_get_regs()
160 	regs_buff[1] = rd32(IGC_STATUS);  in igc_get_regs()
161 	regs_buff[2] = rd32(IGC_CTRL_EXT);  in igc_get_regs()
162 	regs_buff[3] = rd32(IGC_MDIC);  in igc_get_regs()
163 	regs_buff[4] = rd32(IGC_CONNSW);  in igc_get_regs()
166 	regs_buff[5] = rd32(IGC_EECD);  in igc_get_regs()
172 	regs_buff[6] = rd32(IGC_EICS);  in igc_get_regs()
173 	regs_buff[7] = rd32(IGC_EICS);  in igc_get_regs()
174 	regs_buff[8] = rd32(IGC_EIMS);  in igc_get_regs()
175 	regs_buff[9] = rd32(IGC_EIMC);  in igc_get_regs()
176 	regs_buff[10] = rd32(IGC_EIAC);  in igc_get_regs()
177 	regs_buff[11] = rd32(IGC_EIAM);  in igc_get_regs()
181 	regs_buff[12] = rd32(IGC_ICS);  in igc_get_regs()
182 	regs_buff[13] = rd32(IGC_ICS);  in igc_get_regs()
183 	regs_buff[14] = rd32(IGC_IMS);  in igc_get_regs()
184 	regs_buff[15] = rd32(IGC_IMC);  in igc_get_regs()
185 	regs_buff[16] = rd32(IGC_IAC);  in igc_get_regs()
186 	regs_buff[17] = rd32(IGC_IAM);  in igc_get_regs()
189 	regs_buff[18] = rd32(IGC_FCAL);  in igc_get_regs()
190 	regs_buff[19] = rd32(IGC_FCAH);  in igc_get_regs()
191 	regs_buff[20] = rd32(IGC_FCTTV);  in igc_get_regs()
192 	regs_buff[21] = rd32(IGC_FCRTL);  in igc_get_regs()
193 	regs_buff[22] = rd32(IGC_FCRTH);  in igc_get_regs()
194 	regs_buff[23] = rd32(IGC_FCRTV);  in igc_get_regs()
197 	regs_buff[24] = rd32(IGC_RCTL);  in igc_get_regs()
198 	regs_buff[25] = rd32(IGC_RXCSUM);  in igc_get_regs()
199 	regs_buff[26] = rd32(IGC_RLPML);  in igc_get_regs()
200 	regs_buff[27] = rd32(IGC_RFCTL);  in igc_get_regs()
203 	regs_buff[28] = rd32(IGC_TCTL);  in igc_get_regs()
204 	regs_buff[29] = rd32(IGC_TIPG);  in igc_get_regs()
274 		regs_buff[91 + i] = rd32(IGC_SRRCTL(i));  in igc_get_regs()
276 		regs_buff[95 + i] = rd32(IGC_PSRTYPE(i));  in igc_get_regs()
278 		regs_buff[99 + i] = rd32(IGC_RDBAL(i));  in igc_get_regs()
280 		regs_buff[103 + i] = rd32(IGC_RDBAH(i));  in igc_get_regs()
282 		regs_buff[107 + i] = rd32(IGC_RDLEN(i));  in igc_get_regs()
284 		regs_buff[111 + i] = rd32(IGC_RDH(i));  in igc_get_regs()
286 		regs_buff[115 + i] = rd32(IGC_RDT(i));  in igc_get_regs()
288 		regs_buff[119 + i] = rd32(IGC_RXDCTL(i));  in igc_get_regs()
291 		regs_buff[123 + i] = rd32(IGC_EITR(i));  in igc_get_regs()
293 		regs_buff[139 + i] = rd32(IGC_RAL(i));  in igc_get_regs()
295 		regs_buff[145 + i] = rd32(IGC_RAH(i));  in igc_get_regs()
298 		regs_buff[149 + i] = rd32(IGC_TDBAL(i));  in igc_get_regs()
300 		regs_buff[152 + i] = rd32(IGC_TDBAH(i));  in igc_get_regs()
302 		regs_buff[156 + i] = rd32(IGC_TDLEN(i));  in igc_get_regs()
304 		regs_buff[160 + i] = rd32(IGC_TDH(i));  in igc_get_regs()
306 		regs_buff[164 + i] = rd32(IGC_TDT(i));  in igc_get_regs()
308 		regs_buff[168 + i] = rd32(IGC_TXDCTL(i));  in igc_get_regs()
1106 		u32 mrqc = rd32(IGC_MRQC);  in igc_set_rss_hash_opt()
1156 	etqf = rd32(IGC_ETQF(i));  in igc_rxnfc_write_etype_filter()
1183 	vlapqf = rd32(IGC_VLAPQF);  in igc_rxnfc_write_vlan_prio_filter()
1250 	u32 etqf = rd32(IGC_ETQF(reg_index));  in igc_clear_etype_filter_regs()
1270 	vlapqf = rd32(IGC_VLAPQF);  in igc_clear_vlan_prio_filter()
1706 	status = rd32(IGC_STATUS);  in igc_get_link_ksettings()