Lines Matching refs:pf_q
21 u16 pf_q; in ice_setup_rx_ctx() local
25 pf_q = vsi->rxq_map[ring->q_index]; in ice_setup_rx_ctx()
73 regval = rd32(hw, QRXFLXP_CNTXT(pf_q)); in ice_setup_rx_ctx()
84 wr32(hw, QRXFLXP_CNTXT(pf_q), regval); in ice_setup_rx_ctx()
88 err = ice_write_rxq_ctx(hw, &rlan_ctx, pf_q); in ice_setup_rx_ctx()
92 pf_q, err); in ice_setup_rx_ctx()
100 ring->tail = hw->hw_addr + QRX_TAIL(pf_q); in ice_setup_rx_ctx()
116 ice_setup_tx_ctx(struct ice_ring *ring, struct ice_tlan_ctx *tlan_ctx, u16 pf_q) in ice_setup_tx_ctx() argument
158 tlan_ctx->tso_qnum = pf_q; in ice_setup_tx_ctx()
178 static int ice_pf_rxq_wait(struct ice_pf *pf, int pf_q, bool ena) in ice_pf_rxq_wait() argument
183 if (ena == !!(rd32(&pf->hw, QRX_CTRL(pf_q)) & in ice_pf_rxq_wait()
204 int pf_q = vsi->rxq_map[rxq_idx]; in ice_vsi_ctrl_rx_ring() local
210 rx_reg = rd32(hw, QRX_CTRL(pf_q)); in ice_vsi_ctrl_rx_ring()
221 wr32(hw, QRX_CTRL(pf_q), rx_reg); in ice_vsi_ctrl_rx_ring()
224 ret = ice_pf_rxq_wait(pf, pf_q, ena); in ice_vsi_ctrl_rx_ring()
228 vsi->idx, pf_q, (ena ? "en" : "dis")); in ice_vsi_ctrl_rx_ring()
1731 u16 pf_q; in ice_vsi_cfg_txq() local
1733 pf_q = ring->reg_idx; in ice_vsi_cfg_txq()
1734 ice_setup_tx_ctx(ring, &tlan_ctx, pf_q); in ice_vsi_cfg_txq()
1736 qg_buf->txqs[0].txq_id = cpu_to_le16(pf_q); in ice_vsi_cfg_txq()
1743 ring->tail = pf->hw.hw_addr + QTX_COMM_DBELL(pf_q); in ice_vsi_cfg_txq()
1764 if (pf_q == le16_to_cpu(txq->txq_id)) in ice_vsi_cfg_txq()