Lines Matching refs:icr0
3933 u32 icr0, icr0_remaining; in i40e_intr() local
3936 icr0 = rd32(hw, I40E_PFINT_ICR0); in i40e_intr()
3940 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0) in i40e_intr()
3944 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) || in i40e_intr()
3945 (icr0 & I40E_PFINT_ICR0_SWINT_MASK)) in i40e_intr()
3949 (icr0 & I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK)) { in i40e_intr()
3956 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) { in i40e_intr()
3970 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) { in i40e_intr()
3976 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) { in i40e_intr()
3981 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) { in i40e_intr()
3986 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) { in i40e_intr()
4003 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) { in i40e_intr()
4004 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK; in i40e_intr()
4011 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) { in i40e_intr()
4015 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK; in i40e_intr()
4024 icr0_remaining = icr0 & ena_mask; in i40e_intr()