617 		ew32(RCTL, rctl & ~E1000_RCTL_EN);  in e1000e_update_rdt_wa()
634 		ew32(TCTL, tctl & ~E1000_TCTL_EN);  in e1000e_update_tdt_wa()
1101 		ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);  in e1000_print_hw_hang()
1107 		ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);  in e1000_print_hw_hang()
1778 			ew32(RCTL, rctl & ~E1000_RCTL_EN);  in e1000_intr_msi()
1859 			ew32(RCTL, rctl & ~E1000_RCTL_EN);  in e1000_intr()
1904 		ew32(ICS, (icr & adapter->eiac_mask));  in e1000_msix_other()
1915 		ew32(IMS, E1000_IMS_OTHER | IMS_OTHER_MASK);  in e1000_msix_other()
1932 		ew32(ICS, tx_ring->ims_val);  in e1000_intr_msix_tx()
1935 		ew32(IMS, adapter->tx_ring->ims_val);  in e1000_intr_msix_tx()
1986 		ew32(RFCTL, rfctl);  in e1000_configure_msix()
2022 	ew32(IVAR, ivar);  in e1000_configure_msix()
2027 	ew32(CTRL_EXT, ctrl_ext);  in e1000_configure_msix()
2218 	ew32(IMC, ~0);  in e1000_irq_disable()
2220 		ew32(EIAC_82574, 0);  in e1000_irq_disable()
2241 		ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);  in e1000_irq_enable()
2242 		ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER |  in e1000_irq_enable()
2245 		ew32(IMS, IMS_ENABLE_MASK | E1000_IMS_ECCER);  in e1000_irq_enable()
2247 		ew32(IMS, IMS_ENABLE_MASK);  in e1000_irq_enable()
2270 		ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);  in e1000e_get_hw_control()
2273 		ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);  in e1000e_get_hw_control()
2296 		ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);  in e1000e_release_hw_control()
2299 		ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);  in e1000e_release_hw_control()
2622 		ew32(ITR, new_itr);  in e1000e_write_itr()
2686 				ew32(IMS, adapter->rx_ring->ims_val);  in e1000e_poll()
2763 		ew32(RCTL, rctl);  in e1000e_vlan_filter_disable()
2787 		ew32(RCTL, rctl);  in e1000e_vlan_filter_enable()
2803 	ew32(CTRL, ctrl);  in e1000e_vlan_strip_disable()
2818 	ew32(CTRL, ctrl);  in e1000e_vlan_strip_enable()
2892 				ew32(MDEF(i), (E1000_MDEF_PORT_623 |  in e1000_init_manageability_pt()
2904 	ew32(MANC2H, manc2h);  in e1000_init_manageability_pt()
2905 	ew32(MANC, manc);  in e1000_init_manageability_pt()
2924 	ew32(TDBAL(0), (tdba & DMA_BIT_MASK(32)));  in e1000_configure_tx()
2925 	ew32(TDBAH(0), (tdba >> 32));  in e1000_configure_tx()
2926 	ew32(TDLEN(0), tdlen);  in e1000_configure_tx()
2927 	ew32(TDH(0), 0);  in e1000_configure_tx()
2928 	ew32(TDT(0), 0);  in e1000_configure_tx()
2939 	ew32(TIDV, adapter->tx_int_delay);  in e1000_configure_tx()
2941 	ew32(TADV, adapter->tx_abs_int_delay);  in e1000_configure_tx()
2958 		ew32(TXDCTL(0), txdctl);  in e1000_configure_tx()
2961 	ew32(TXDCTL(1), er32(TXDCTL(0)));  in e1000_configure_tx()
2976 		ew32(TARC(0), tarc);  in e1000_configure_tx()
2983 		ew32(TARC(0), tarc);  in e1000_configure_tx()
2986 		ew32(TARC(1), tarc);  in e1000_configure_tx()
2999 	ew32(TCTL, tctl);  in e1000_configure_tx()
3009 		ew32(IOSFPC, reg_val);  in e1000_configure_tx()
3018 		ew32(TARC(0), reg_val);  in e1000_configure_tx()
3113 	ew32(RFCTL, rfctl);  in e1000_setup_rctl()
3155 		ew32(PSRCTL, psrctl);  in e1000_setup_rctl()
3175 	ew32(RCTL, rctl);  in e1000_setup_rctl()
3212 		ew32(RCTL, rctl & ~E1000_RCTL_EN);  in e1000_configure_rx()
3225 		ew32(RXDCTL(0), E1000_RXDCTL_DMA_BURST_ENABLE);  in e1000_configure_rx()
3226 		ew32(RXDCTL(1), E1000_RXDCTL_DMA_BURST_ENABLE);  in e1000_configure_rx()
3230 	ew32(RDTR, adapter->rx_int_delay);  in e1000_configure_rx()
3233 	ew32(RADV, adapter->rx_abs_int_delay);  in e1000_configure_rx()
3240 	ew32(IAM, 0xffffffff);  in e1000_configure_rx()
3241 	ew32(CTRL_EXT, ctrl_ext);  in e1000_configure_rx()
3248 	ew32(RDBAL(0), (rdba & DMA_BIT_MASK(32)));  in e1000_configure_rx()
3249 	ew32(RDBAH(0), (rdba >> 32));  in e1000_configure_rx()
3250 	ew32(RDLEN(0), rdlen);  in e1000_configure_rx()
3251 	ew32(RDH(0), 0);  in e1000_configure_rx()
3252 	ew32(RDT(0), 0);  in e1000_configure_rx()
3268 	ew32(RXCSUM, rxcsum);  in e1000_configure_rx()
3281 			ew32(RXDCTL(0), rxdctl | 0x3 | BIT(8));  in e1000_configure_rx()
3293 	ew32(RCTL, rctl);  in e1000_configure_rx()
3383 		ew32(RAH(rar_entries), 0);  in e1000e_write_uc_addr_list()
3384 		ew32(RAL(rar_entries), 0);  in e1000e_write_uc_addr_list()
3443 	ew32(RCTL, rctl);  in e1000e_set_rx_mode()
3460 		ew32(RSSRK(i), rss_key[i]);  in e1000e_setup_rss_hash()
3464 		ew32(RETA(i), 0);  in e1000e_setup_rss_hash()
3472 	ew32(RXCSUM, rxcsum);  in e1000e_setup_rss_hash()
3480 	ew32(MRQC, mrqc);  in e1000e_setup_rss_hash()
3505 			ew32(FEXTNVM7, fextnvm7 | BIT(0));  in e1000e_get_base_timinca()
3698 	ew32(TSYNCTXCTL, regval);  in e1000e_config_hwtstamp()
3709 	ew32(TSYNCRXCTL, regval);  in e1000e_config_hwtstamp()
3723 	ew32(RXMTRL, rxmtrl);  in e1000e_config_hwtstamp()
3730 	ew32(RXUDP, rxudp);  in e1000e_config_hwtstamp()
3808 	ew32(TCTL, tctl | E1000_TCTL_EN);  in e1000_flush_tx_ring()
3821 	ew32(TDT(0), tx_ring->next_to_use);  in e1000_flush_tx_ring()
3836 	ew32(RCTL, rctl & ~E1000_RCTL_EN);  in e1000_flush_rx_ring()
3849 	ew32(RXDCTL(0), rxdctl);  in e1000_flush_rx_ring()
3851 	ew32(RCTL, rctl | E1000_RCTL_EN);  in e1000_flush_rx_ring()
3854 	ew32(RCTL, rctl & ~E1000_RCTL_EN);  in e1000_flush_rx_ring()
3877 	ew32(FEXTNVM11, fext_nvm11);  in e1000_flush_desc_rings()
3919 			ew32(TIMINCA, timinca);  in e1000e_systim_reset()
3957 	ew32(PBA, pba);  in e1000e_reset()
3999 		ew32(PBA, pba);  in e1000e_reset()
4022 			ew32(PBA, pba);  in e1000e_reset()
4062 		ew32(PBA, pba);  in e1000e_reset()
4107 	ew32(WUC, 0);  in e1000e_reset()
4115 	ew32(VET, ETH_P_8021Q);  in e1000e_reset()
4177 		ew32(FEXTNVM7, reg);  in e1000e_reset()
4182 		ew32(FEXTNVM9, reg);  in e1000e_reset()
4198 		ew32(ICS, E1000_ICS_LSC | E1000_ICS_OTHER);  in e1000e_trigger_lsc()
4200 		ew32(ICS, E1000_ICS_LSC);  in e1000e_trigger_lsc()
4227 	ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);  in e1000e_flush_descriptors()
4228 	ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);  in e1000e_flush_descriptors()
4236 	ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);  in e1000e_flush_descriptors()
4237 	ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);  in e1000e_flush_descriptors()
4266 		ew32(RCTL, rctl & ~E1000_RCTL_EN);  in e1000e_down()
4274 	ew32(TCTL, tctl);  in e1000e_down()
4530 	ew32(ICS, E1000_ICS_RXSEQ);  in e1000_test_msi_interrupt()
5131 		ew32(RCTL, rctl | E1000_RCTL_EN);  in e1000e_enable_receives()
5258 				ew32(TARC(0), tarc0);  in e1000_watchdog_task()
5287 			ew32(TCTL, tctl);  in e1000_watchdog_task()
5375 		ew32(ICS, adapter->rx_ring->ims_val);  in e1000_watchdog_task()
5377 		ew32(ICS, E1000_ICS_RXDMT0);  in e1000_watchdog_task()
6256 	ew32(WUFC, wufc);  in e1000_init_phy_wakeup()
6257 	ew32(WUC, (E1000_WUC_PHY_WAKE | E1000_WUC_APMPME |  in e1000_init_phy_wakeup()
6346 			ew32(RCTL, rctl);  in __e1000_shutdown()
6353 		ew32(CTRL, ctrl);  in __e1000_shutdown()
6361 			ew32(CTRL_EXT, ctrl_ext);  in __e1000_shutdown()
6377 			ew32(WUFC, wufc);  in __e1000_shutdown()
6378 			ew32(WUC, E1000_WUC_PME_EN);  in __e1000_shutdown()
6381 		ew32(WUC, 0);  in __e1000_shutdown()
6382 		ew32(WUFC, 0);  in __e1000_shutdown()
6612 		ew32(WUS, ~0);  in __e1000_resume()
6874 		ew32(WUS, ~0);  in e1000_io_slot_reset()