Lines Matching refs:enetc_wr
977 enetc_wr(hw, ENETC_SICAR2, in enetc_setup_cbdr()
980 enetc_wr(hw, ENETC_SICBDRBAR0, lower_32_bits(cbdr->bd_dma_base)); in enetc_setup_cbdr()
981 enetc_wr(hw, ENETC_SICBDRBAR1, upper_32_bits(cbdr->bd_dma_base)); in enetc_setup_cbdr()
982 enetc_wr(hw, ENETC_SICBDRLENR, ENETC_RTBLENR_LEN(cbdr->bd_count)); in enetc_setup_cbdr()
984 enetc_wr(hw, ENETC_SICBDRPIR, 0); in enetc_setup_cbdr()
985 enetc_wr(hw, ENETC_SICBDRCIR, 0); in enetc_setup_cbdr()
988 enetc_wr(hw, ENETC_SICBDRMR, BIT(31)); in enetc_setup_cbdr()
996 enetc_wr(hw, ENETC_SICBDRMR, 0); in enetc_clear_cbdr()
1027 enetc_wr(hw, ENETC_SICAR0, in enetc_configure_si()
1029 enetc_wr(hw, ENETC_SICAR1, ENETC_SICAR_MSI); in enetc_configure_si()
1031 enetc_wr(hw, ENETC_SIMR, ENETC_SIMR_EN); in enetc_configure_si()
1250 enetc_wr(hw, ENETC_SIMSIRRV(i), entry); in enetc_setup_irqs()
1255 enetc_wr(hw, ENETC_SIMSITRV(idx), entry); in enetc_setup_irqs()
1520 enetc_wr(hw, ENETC_SIRBGCR, priv->num_rx_rings); in enetc_set_rss()
1525 enetc_wr(hw, ENETC_SIMR, reg); in enetc_set_rss()