Lines Matching refs:bd_dma_base
753 &r->bd_dma_base, GFP_KERNEL); in enetc_dma_alloc_bdr()
758 if (!IS_ALIGNED(r->bd_dma_base, 128)) { in enetc_dma_alloc_bdr()
760 r->bd_dma_base); in enetc_dma_alloc_bdr()
796 dma_free_coherent(txr->dev, size, txr->bd_base, txr->bd_dma_base); in enetc_free_txbdr()
858 dma_free_coherent(rxr->dev, size, rxr->bd_base, rxr->bd_dma_base); in enetc_free_rxbdr()
949 cbdr->bd_base = dma_alloc_coherent(dev, size, &cbdr->bd_dma_base, in enetc_alloc_cbdr()
955 if (!IS_ALIGNED(cbdr->bd_dma_base, 128)) { in enetc_alloc_cbdr()
956 dma_free_coherent(dev, size, cbdr->bd_base, cbdr->bd_dma_base); in enetc_alloc_cbdr()
970 dma_free_coherent(dev, size, cbdr->bd_base, cbdr->bd_dma_base); in enetc_free_cbdr()
980 enetc_wr(hw, ENETC_SICBDRBAR0, lower_32_bits(cbdr->bd_dma_base)); in enetc_setup_cbdr()
981 enetc_wr(hw, ENETC_SICBDRBAR1, upper_32_bits(cbdr->bd_dma_base)); in enetc_setup_cbdr()
1109 lower_32_bits(tx_ring->bd_dma_base)); in enetc_setup_txbdr()
1112 upper_32_bits(tx_ring->bd_dma_base)); in enetc_setup_txbdr()
1143 lower_32_bits(rx_ring->bd_dma_base)); in enetc_setup_rxbdr()
1146 upper_32_bits(rx_ring->bd_dma_base)); in enetc_setup_rxbdr()