Lines Matching refs:padap
70 struct adapter *padap = pdbg_init->adap; in is_fw_attached() local
72 if (!(padap->flags & CXGB4_FW_OK) || padap->use_bd) in is_fw_attached()
107 static int cudbg_read_vpd_reg(struct adapter *padap, u32 addr, u32 len, in cudbg_read_vpd_reg() argument
112 vaddr = t4_eeprom_ptov(addr, padap->pf, EEPROMPFSIZE); in cudbg_read_vpd_reg()
116 rc = pci_read_vpd(padap->pdev, vaddr, len, dest); in cudbg_read_vpd_reg()
129 int cudbg_fill_meminfo(struct adapter *padap, in cudbg_fill_meminfo() argument
150 lo = t4_read_reg(padap, MA_TARGET_MEM_ENABLE_A); in cudbg_fill_meminfo()
152 hi = t4_read_reg(padap, MA_EDRAM0_BAR_A); in cudbg_fill_meminfo()
163 hi = t4_read_reg(padap, MA_EDRAM1_BAR_A); in cudbg_fill_meminfo()
173 if (is_t5(padap->params.chip)) { in cudbg_fill_meminfo()
175 hi = t4_read_reg(padap, MA_EXT_MEMORY0_BAR_A); in cudbg_fill_meminfo()
186 hi = t4_read_reg(padap, MA_EXT_MEMORY1_BAR_A); in cudbg_fill_meminfo()
197 hi = t4_read_reg(padap, MA_EXT_MEMORY_BAR_A); in cudbg_fill_meminfo()
208 hi = t4_read_reg(padap, MA_EXT_MEMORY1_BAR_A); in cudbg_fill_meminfo()
225 (md++)->base = t4_read_reg(padap, SGE_DBQ_CTXT_BADDR_A); in cudbg_fill_meminfo()
226 (md++)->base = t4_read_reg(padap, SGE_IMSG_CTXT_BADDR_A); in cudbg_fill_meminfo()
227 (md++)->base = t4_read_reg(padap, SGE_FLM_CACHE_BADDR_A); in cudbg_fill_meminfo()
228 (md++)->base = t4_read_reg(padap, TP_CMM_TCB_BASE_A); in cudbg_fill_meminfo()
229 (md++)->base = t4_read_reg(padap, TP_CMM_MM_BASE_A); in cudbg_fill_meminfo()
230 (md++)->base = t4_read_reg(padap, TP_CMM_TIMER_BASE_A); in cudbg_fill_meminfo()
231 (md++)->base = t4_read_reg(padap, TP_CMM_MM_RX_FLST_BASE_A); in cudbg_fill_meminfo()
232 (md++)->base = t4_read_reg(padap, TP_CMM_MM_TX_FLST_BASE_A); in cudbg_fill_meminfo()
233 (md++)->base = t4_read_reg(padap, TP_CMM_MM_PS_FLST_BASE_A); in cudbg_fill_meminfo()
236 md->base = t4_read_reg(padap, TP_PMM_TX_BASE_A); in cudbg_fill_meminfo()
238 t4_read_reg(padap, TP_PMM_TX_PAGE_SIZE_A) * in cudbg_fill_meminfo()
239 PMTXMAXPAGE_G(t4_read_reg(padap, TP_PMM_TX_MAX_PAGE_A)); in cudbg_fill_meminfo()
242 md->base = t4_read_reg(padap, TP_PMM_RX_BASE_A); in cudbg_fill_meminfo()
244 t4_read_reg(padap, TP_PMM_RX_PAGE_SIZE_A) * in cudbg_fill_meminfo()
245 PMRXMAXPAGE_G(t4_read_reg(padap, TP_PMM_RX_MAX_PAGE_A)); in cudbg_fill_meminfo()
248 if (t4_read_reg(padap, LE_DB_CONFIG_A) & HASHEN_F) { in cudbg_fill_meminfo()
249 if (CHELSIO_CHIP_VERSION(padap->params.chip) <= CHELSIO_T5) { in cudbg_fill_meminfo()
250 hi = t4_read_reg(padap, LE_DB_TID_HASHBASE_A) / 4; in cudbg_fill_meminfo()
251 md->base = t4_read_reg(padap, LE_DB_HASH_TID_BASE_A); in cudbg_fill_meminfo()
253 hi = t4_read_reg(padap, LE_DB_HASH_TID_BASE_A); in cudbg_fill_meminfo()
254 md->base = t4_read_reg(padap, in cudbg_fill_meminfo()
265 md->base = t4_read_reg(padap, ULP_ ## reg ## _LLIMIT_A);\ in cudbg_fill_meminfo()
266 (md++)->limit = t4_read_reg(padap, ULP_ ## reg ## _ULIMIT_A);\ in cudbg_fill_meminfo()
280 if (!is_t4(padap->params.chip)) { in cudbg_fill_meminfo()
281 u32 fifo_size = t4_read_reg(padap, SGE_DBVFIFO_SIZE_A); in cudbg_fill_meminfo()
282 u32 sge_ctrl = t4_read_reg(padap, SGE_CONTROL2_A); in cudbg_fill_meminfo()
285 if (is_t5(padap->params.chip)) { in cudbg_fill_meminfo()
293 md->base = BASEADDR_G(t4_read_reg(padap, in cudbg_fill_meminfo()
301 md->base = t4_read_reg(padap, ULP_RX_CTX_BASE_A); in cudbg_fill_meminfo()
304 md->base = t4_read_reg(padap, ULP_TX_ERR_TABLE_BASE_A); in cudbg_fill_meminfo()
308 md->base = padap->vres.ocq.start; in cudbg_fill_meminfo()
309 if (padap->vres.ocq.size) in cudbg_fill_meminfo()
310 md->limit = md->base + padap->vres.ocq.size - 1; in cudbg_fill_meminfo()
330 lo = t4_read_reg(padap, CIM_SDRAM_BASE_ADDR_A); in cudbg_fill_meminfo()
331 hi = t4_read_reg(padap, CIM_SDRAM_ADDR_SIZE_A) + lo - 1; in cudbg_fill_meminfo()
335 lo = t4_read_reg(padap, CIM_EXTMEM2_BASE_ADDR_A); in cudbg_fill_meminfo()
336 hi = t4_read_reg(padap, CIM_EXTMEM2_ADDR_SIZE_A) + lo - 1; in cudbg_fill_meminfo()
340 lo = t4_read_reg(padap, TP_PMM_RX_MAX_PAGE_A); in cudbg_fill_meminfo()
343 FREERXPAGECOUNT_G(t4_read_reg(padap, in cudbg_fill_meminfo()
348 t4_read_reg(padap, TP_PMM_RX_PAGE_SIZE_A) >> 10; in cudbg_fill_meminfo()
351 lo = t4_read_reg(padap, TP_PMM_TX_MAX_PAGE_A); in cudbg_fill_meminfo()
352 hi = t4_read_reg(padap, TP_PMM_TX_PAGE_SIZE_A); in cudbg_fill_meminfo()
355 FREETXPAGECOUNT_G(t4_read_reg(padap, in cudbg_fill_meminfo()
365 meminfo_buff->p_structs = t4_read_reg(padap, TP_CMM_MM_MAX_PSTRUCT_A); in cudbg_fill_meminfo()
367 FREEPSTRUCTCOUNT_G(t4_read_reg(padap, TP_FLM_FREE_PS_CNT_A)); in cudbg_fill_meminfo()
370 if (CHELSIO_CHIP_VERSION(padap->params.chip) > CHELSIO_T5) in cudbg_fill_meminfo()
371 lo = t4_read_reg(padap, in cudbg_fill_meminfo()
374 lo = t4_read_reg(padap, MPS_RX_PG_RSV0_A + i * 4); in cudbg_fill_meminfo()
375 if (is_t5(padap->params.chip)) { in cudbg_fill_meminfo()
386 for (i = 0; i < padap->params.arch.nchan; i++) { in cudbg_fill_meminfo()
387 if (CHELSIO_CHIP_VERSION(padap->params.chip) > CHELSIO_T5) in cudbg_fill_meminfo()
388 lo = t4_read_reg(padap, in cudbg_fill_meminfo()
391 lo = t4_read_reg(padap, MPS_RX_PG_RSV4_A + i * 4); in cudbg_fill_meminfo()
392 if (is_t5(padap->params.chip)) { in cudbg_fill_meminfo()
410 struct adapter *padap = pdbg_init->adap; in cudbg_collect_reg_dump() local
415 if (is_t4(padap->params.chip)) in cudbg_collect_reg_dump()
417 else if (is_t5(padap->params.chip) || is_t6(padap->params.chip)) in cudbg_collect_reg_dump()
423 t4_get_regs(padap, (void *)temp_buff.data, temp_buff.size); in cudbg_collect_reg_dump()
431 struct adapter *padap = pdbg_init->adap; in cudbg_collect_fw_devlog() local
436 rc = t4_init_devlog_params(padap); in cudbg_collect_fw_devlog()
442 dparams = &padap->params.devlog; in cudbg_collect_fw_devlog()
449 spin_lock(&padap->win0_lock); in cudbg_collect_fw_devlog()
450 rc = t4_memory_rw(padap, padap->params.drv_memwin, in cudbg_collect_fw_devlog()
455 spin_unlock(&padap->win0_lock); in cudbg_collect_fw_devlog()
469 struct adapter *padap = pdbg_init->adap; in cudbg_collect_cim_la() local
474 if (is_t6(padap->params.chip)) { in cudbg_collect_cim_la()
475 size = padap->params.cim_la_size / 10 + 1; in cudbg_collect_cim_la()
478 size = padap->params.cim_la_size / 8; in cudbg_collect_cim_la()
487 rc = t4_cim_read(padap, UP_UP_DBG_LA_CFG_A, 1, &cfg); in cudbg_collect_cim_la()
495 rc = t4_cim_read_la(padap, in cudbg_collect_cim_la()
510 struct adapter *padap = pdbg_init->adap; in cudbg_collect_cim_ma_la() local
519 t4_cim_read_ma_la(padap, in cudbg_collect_cim_ma_la()
530 struct adapter *padap = pdbg_init->adap; in cudbg_collect_cim_qcfg() local
541 cim_qcfg_data->chip = padap->params.chip; in cudbg_collect_cim_qcfg()
542 rc = t4_cim_read(padap, UP_IBQ_0_RDADDR_A, in cudbg_collect_cim_qcfg()
550 rc = t4_cim_read(padap, UP_OBQ_0_REALADDR_A, in cudbg_collect_cim_qcfg()
559 t4_read_cimq_cfg(padap, cim_qcfg_data->base, cim_qcfg_data->size, in cudbg_collect_cim_qcfg()
568 struct adapter *padap = pdbg_init->adap; in cudbg_read_cim_ibq() local
580 no_of_read_words = t4_read_cim_ibq(padap, qid, in cudbg_read_cim_ibq()
637 u32 cudbg_cim_obq_size(struct adapter *padap, int qid) in cudbg_cim_obq_size() argument
641 t4_write_reg(padap, CIM_QUEUE_CONFIG_REF_A, OBQSELECT_F | in cudbg_cim_obq_size()
643 value = t4_read_reg(padap, CIM_QUEUE_CONFIG_CTRL_A); in cudbg_cim_obq_size()
652 struct adapter *padap = pdbg_init->adap; in cudbg_read_cim_obq() local
658 qsize = cudbg_cim_obq_size(padap, qid); in cudbg_read_cim_obq()
664 no_of_read_words = t4_read_cim_obq(padap, qid, in cudbg_read_cim_obq()
735 static int cudbg_meminfo_get_mem_index(struct adapter *padap, in cudbg_meminfo_get_mem_index() argument
750 flag = is_t5(padap->params.chip) ? MC0_FLAG : MC_FLAG; in cudbg_meminfo_get_mem_index()
773 static int cudbg_get_mem_region(struct adapter *padap, in cudbg_get_mem_region() argument
782 rc = cudbg_meminfo_get_mem_index(padap, meminfo, mem_type, &mc); in cudbg_get_mem_region()
830 static int cudbg_get_mem_relative(struct adapter *padap, in cudbg_get_mem_relative() argument
837 rc = cudbg_meminfo_get_mem_index(padap, meminfo, mem_type, &mc_idx); in cudbg_get_mem_relative()
855 static int cudbg_get_payload_range(struct adapter *padap, u8 mem_type, in cudbg_get_payload_range() argument
863 rc = cudbg_fill_meminfo(padap, &meminfo); in cudbg_get_payload_range()
867 rc = cudbg_get_mem_region(padap, &meminfo, mem_type, region_name, in cudbg_get_payload_range()
878 return cudbg_get_mem_relative(padap, &meminfo, mem_type, in cudbg_get_payload_range()
972 struct adapter *padap = pdbg_init->adap; in cudbg_read_fw_mem() local
982 rc = cudbg_get_payload_range(padap, mem_type, region_name[i], in cudbg_read_fw_mem()
1020 spin_lock(&padap->win0_lock); in cudbg_read_fw_mem()
1023 spin_unlock(&padap->win0_lock); in cudbg_read_fw_mem()
1046 struct adapter *padap = pdbg_init->adap; in cudbg_t4_fwcache() local
1051 rc = t4_fwcache(padap, FW_PARAM_DEV_FWCACHE_FLUSH); in cudbg_t4_fwcache()
1061 struct adapter *padap = pdbg_init->adap; in cudbg_mem_region_size() local
1067 rc = cudbg_fill_meminfo(padap, &mem_info); in cudbg_mem_region_size()
1072 rc = cudbg_meminfo_get_mem_index(padap, &mem_info, mem_type, &mc_idx); in cudbg_mem_region_size()
1134 struct adapter *padap = pdbg_init->adap; in cudbg_collect_rss() local
1138 nentries = t4_chip_rss_size(padap); in cudbg_collect_rss()
1144 rc = t4_read_rss(padap, (u16 *)temp_buff.data); in cudbg_collect_rss()
1157 struct adapter *padap = pdbg_init->adap; in cudbg_collect_rss_vf_config() local
1162 vf_count = padap->params.arch.vfcount; in cudbg_collect_rss_vf_config()
1171 t4_read_rss_vf_config(padap, vf, &vfconf[vf].rss_vf_vfl, in cudbg_collect_rss_vf_config()
1180 struct adapter *padap = pdbg_init->adap; in cudbg_collect_path_mtu() local
1189 t4_read_mtu_tbl(padap, (u16 *)temp_buff.data, NULL); in cudbg_collect_path_mtu()
1197 struct adapter *padap = pdbg_init->adap; in cudbg_collect_pm_stats() local
1208 t4_pmtx_get_stats(padap, pm_stats_buff->tx_cnt, pm_stats_buff->tx_cyc); in cudbg_collect_pm_stats()
1209 t4_pmrx_get_stats(padap, pm_stats_buff->rx_cnt, pm_stats_buff->rx_cyc); in cudbg_collect_pm_stats()
1217 struct adapter *padap = pdbg_init->adap; in cudbg_collect_hw_sched() local
1222 if (!padap->params.vpd.cclk) in cudbg_collect_hw_sched()
1232 hw_sched_buff->map = t4_read_reg(padap, TP_TX_MOD_QUEUE_REQ_MAP_A); in cudbg_collect_hw_sched()
1233 hw_sched_buff->mode = TIMERMODE_G(t4_read_reg(padap, TP_MOD_CONFIG_A)); in cudbg_collect_hw_sched()
1234 t4_read_pace_tbl(padap, hw_sched_buff->pace_tab); in cudbg_collect_hw_sched()
1236 t4_get_tx_sched(padap, i, &hw_sched_buff->kbps[i], in cudbg_collect_hw_sched()
1245 struct adapter *padap = pdbg_init->adap; in cudbg_collect_tp_indirect() local
1251 if (is_t5(padap->params.chip)) in cudbg_collect_tp_indirect()
1269 if (is_t5(padap->params.chip)) in cudbg_collect_tp_indirect()
1271 else if (is_t6(padap->params.chip)) in cudbg_collect_tp_indirect()
1278 if (is_t5(padap->params.chip)) { in cudbg_collect_tp_indirect()
1283 } else if (is_t6(padap->params.chip)) { in cudbg_collect_tp_indirect()
1289 t4_tp_pio_read(padap, buff, tp_pio->ireg_offset_range, in cudbg_collect_tp_indirect()
1295 if (is_t5(padap->params.chip)) in cudbg_collect_tp_indirect()
1297 else if (is_t6(padap->params.chip)) in cudbg_collect_tp_indirect()
1304 if (is_t5(padap->params.chip)) { in cudbg_collect_tp_indirect()
1309 } else if (is_t6(padap->params.chip)) { in cudbg_collect_tp_indirect()
1315 t4_tp_tm_pio_read(padap, buff, tp_pio->ireg_offset_range, in cudbg_collect_tp_indirect()
1321 if (is_t5(padap->params.chip)) in cudbg_collect_tp_indirect()
1324 else if (is_t6(padap->params.chip)) in cudbg_collect_tp_indirect()
1332 if (is_t5(padap->params.chip)) { in cudbg_collect_tp_indirect()
1339 } else if (is_t6(padap->params.chip)) { in cudbg_collect_tp_indirect()
1347 t4_tp_mib_read(padap, buff, tp_pio->ireg_offset_range, in cudbg_collect_tp_indirect()
1354 static void cudbg_read_sge_qbase_indirect_reg(struct adapter *padap, in cudbg_read_sge_qbase_indirect_reg() argument
1370 t4_write_reg(padap, qbase->reg_addr, func); in cudbg_read_sge_qbase_indirect_reg()
1372 *buff = t4_read_reg(padap, qbase->reg_data[i]); in cudbg_read_sge_qbase_indirect_reg()
1379 struct adapter *padap = pdbg_init->adap; in cudbg_collect_sge_indirect() local
1400 t4_read_indirect(padap, in cudbg_collect_sge_indirect()
1409 if (CHELSIO_CHIP_VERSION(padap->params.chip) > CHELSIO_T5) { in cudbg_collect_sge_indirect()
1420 cudbg_read_sge_qbase_indirect_reg(padap, sge_qbase, in cudbg_collect_sge_indirect()
1423 for (i = 0; i < padap->params.arch.vfcount; i++) in cudbg_collect_sge_indirect()
1424 cudbg_read_sge_qbase_indirect_reg(padap, sge_qbase, in cudbg_collect_sge_indirect()
1427 sge_qbase->vfcount = padap->params.arch.vfcount; in cudbg_collect_sge_indirect()
1437 struct adapter *padap = pdbg_init->adap; in cudbg_collect_ulprx_la() local
1448 t4_ulprx_read_la(padap, (u32 *)ulprx_la_buff->data); in cudbg_collect_ulprx_la()
1457 struct adapter *padap = pdbg_init->adap; in cudbg_collect_tp_la() local
1468 tp_la_buff->mode = DBGLAMODE_G(t4_read_reg(padap, TP_DBG_LA_CONFIG_A)); in cudbg_collect_tp_la()
1469 t4_tp_read_la(padap, (u64 *)tp_la_buff->data, NULL); in cudbg_collect_tp_la()
1477 struct adapter *padap = pdbg_init->adap; in cudbg_collect_meminfo() local
1497 rc = cudbg_fill_meminfo(padap, meminfo_buff); in cudbg_collect_meminfo()
1512 struct adapter *padap = pdbg_init->adap; in cudbg_collect_cim_pif_la() local
1524 t4_cim_read_pif_la(padap, (u32 *)cim_pif_la_buff->data, in cudbg_collect_cim_pif_la()
1534 struct adapter *padap = pdbg_init->adap; in cudbg_collect_clk_info() local
1540 if (!padap->params.vpd.cclk) in cudbg_collect_clk_info()
1549 clk_info_buff->cclk_ps = 1000000000 / padap->params.vpd.cclk; /* psec */ in cudbg_collect_clk_info()
1550 clk_info_buff->res = t4_read_reg(padap, TP_TIMER_RESOLUTION_A); in cudbg_collect_clk_info()
1557 t4_read_reg(padap, TP_DACK_TIMER_A); in cudbg_collect_clk_info()
1559 tp_tick_us * t4_read_reg(padap, TP_RXT_MIN_A); in cudbg_collect_clk_info()
1561 tp_tick_us * t4_read_reg(padap, TP_RXT_MAX_A); in cudbg_collect_clk_info()
1563 tp_tick_us * t4_read_reg(padap, TP_PERS_MIN_A); in cudbg_collect_clk_info()
1565 tp_tick_us * t4_read_reg(padap, TP_PERS_MAX_A); in cudbg_collect_clk_info()
1567 tp_tick_us * t4_read_reg(padap, TP_KEEP_IDLE_A); in cudbg_collect_clk_info()
1569 tp_tick_us * t4_read_reg(padap, TP_KEEP_INTVL_A); in cudbg_collect_clk_info()
1571 tp_tick_us * INITSRTT_G(t4_read_reg(padap, TP_INIT_SRTT_A)); in cudbg_collect_clk_info()
1573 tp_tick_us * t4_read_reg(padap, TP_FINWAIT2_TIMER_A); in cudbg_collect_clk_info()
1582 struct adapter *padap = pdbg_init->adap; in cudbg_collect_pcie_indirect() local
1604 t4_read_indirect(padap, in cudbg_collect_pcie_indirect()
1623 t4_read_indirect(padap, in cudbg_collect_pcie_indirect()
1638 struct adapter *padap = pdbg_init->adap; in cudbg_collect_pm_indirect() local
1660 t4_read_indirect(padap, in cudbg_collect_pm_indirect()
1679 t4_read_indirect(padap, in cudbg_collect_pm_indirect()
1694 struct adapter *padap = pdbg_init->adap; in cudbg_collect_tid() local
1728 rc = t4_query_params(padap, padap->mbox, padap->pf, 0, 2, para, val); in cudbg_collect_tid()
1737 if (is_t5(padap->params.chip)) { in cudbg_collect_tid()
1738 tid->sb = t4_read_reg(padap, LE_DB_SERVER_INDEX_A) / 4; in cudbg_collect_tid()
1739 } else if (is_t6(padap->params.chip)) { in cudbg_collect_tid()
1741 t4_read_reg(padap, LE_DB_ACTIVE_TABLE_START_INDEX_A); in cudbg_collect_tid()
1742 tid->sb = t4_read_reg(padap, LE_DB_SRVR_START_INDEX_A); in cudbg_collect_tid()
1746 rc = t4_query_params(padap, padap->mbox, padap->pf, 0, 2, in cudbg_collect_tid()
1760 tid->ntids = padap->tids.ntids; in cudbg_collect_tid()
1761 tid->nstids = padap->tids.nstids; in cudbg_collect_tid()
1762 tid->stid_base = padap->tids.stid_base; in cudbg_collect_tid()
1763 tid->hash_base = padap->tids.hash_base; in cudbg_collect_tid()
1765 tid->natids = padap->tids.natids; in cudbg_collect_tid()
1766 tid->nftids = padap->tids.nftids; in cudbg_collect_tid()
1767 tid->ftid_base = padap->tids.ftid_base; in cudbg_collect_tid()
1768 tid->aftid_base = padap->tids.aftid_base; in cudbg_collect_tid()
1769 tid->aftid_end = padap->tids.aftid_end; in cudbg_collect_tid()
1771 tid->sftid_base = padap->tids.sftid_base; in cudbg_collect_tid()
1772 tid->nsftids = padap->tids.nsftids; in cudbg_collect_tid()
1774 tid->flags = padap->flags; in cudbg_collect_tid()
1775 tid->le_db_conf = t4_read_reg(padap, LE_DB_CONFIG_A); in cudbg_collect_tid()
1776 tid->ip_users = t4_read_reg(padap, LE_DB_ACT_CNT_IPV4_A); in cudbg_collect_tid()
1777 tid->ipv6_users = t4_read_reg(padap, LE_DB_ACT_CNT_IPV6_A); in cudbg_collect_tid()
1786 struct adapter *padap = pdbg_init->adap; in cudbg_collect_pcie_config() local
1801 t4_hw_pci_read_cfg4(padap, j, value); in cudbg_collect_pcie_config()
1828 static int cudbg_get_ctxt_region_info(struct adapter *padap, in cudbg_get_ctxt_region_info() argument
1838 rc = cudbg_fill_meminfo(padap, &meminfo); in cudbg_get_ctxt_region_info()
1847 rc = cudbg_get_mem_region(padap, &meminfo, j, in cudbg_get_ctxt_region_info()
1852 rc = cudbg_get_mem_relative(padap, &meminfo, j, in cudbg_get_ctxt_region_info()
1871 value = t4_read_reg(padap, SGE_FLM_CFG_A); in cudbg_get_ctxt_region_info()
1887 int cudbg_dump_context_size(struct adapter *padap) in cudbg_dump_context_size() argument
1895 rc = cudbg_get_ctxt_region_info(padap, region_info, mem_type); in cudbg_dump_context_size()
1916 struct adapter *padap = pdbg_init->adap; in cudbg_read_sge_ctxt() local
1927 rc = t4_sge_ctxt_rd(padap, padap->mbox, cid, ctype, data); in cudbg_read_sge_ctxt()
1929 t4_sge_ctxt_rd_bd(padap, cid, ctype, data); in cudbg_read_sge_ctxt()
1965 struct adapter *padap = pdbg_init->adap; in cudbg_collect_dump_context() local
1976 rc = cudbg_get_ctxt_region_info(padap, region_info, mem_type); in cudbg_collect_dump_context()
1980 rc = cudbg_dump_context_size(padap); in cudbg_collect_dump_context()
2024 t4_sge_ctxt_flush(padap, padap->mbox, i); in cudbg_collect_dump_context()
2026 rc = t4_memory_rw(padap, MEMWIN_NIC, mem_type[i], in cudbg_collect_dump_context()
2079 static void cudbg_mps_rpl_backdoor(struct adapter *padap, in cudbg_mps_rpl_backdoor() argument
2082 if (is_t5(padap->params.chip)) { in cudbg_mps_rpl_backdoor()
2083 mps_rplc->rplc255_224 = htonl(t4_read_reg(padap, in cudbg_mps_rpl_backdoor()
2085 mps_rplc->rplc223_192 = htonl(t4_read_reg(padap, in cudbg_mps_rpl_backdoor()
2087 mps_rplc->rplc191_160 = htonl(t4_read_reg(padap, in cudbg_mps_rpl_backdoor()
2089 mps_rplc->rplc159_128 = htonl(t4_read_reg(padap, in cudbg_mps_rpl_backdoor()
2092 mps_rplc->rplc255_224 = htonl(t4_read_reg(padap, in cudbg_mps_rpl_backdoor()
2094 mps_rplc->rplc223_192 = htonl(t4_read_reg(padap, in cudbg_mps_rpl_backdoor()
2096 mps_rplc->rplc191_160 = htonl(t4_read_reg(padap, in cudbg_mps_rpl_backdoor()
2098 mps_rplc->rplc159_128 = htonl(t4_read_reg(padap, in cudbg_mps_rpl_backdoor()
2101 mps_rplc->rplc127_96 = htonl(t4_read_reg(padap, MPS_VF_RPLCT_MAP3_A)); in cudbg_mps_rpl_backdoor()
2102 mps_rplc->rplc95_64 = htonl(t4_read_reg(padap, MPS_VF_RPLCT_MAP2_A)); in cudbg_mps_rpl_backdoor()
2103 mps_rplc->rplc63_32 = htonl(t4_read_reg(padap, MPS_VF_RPLCT_MAP1_A)); in cudbg_mps_rpl_backdoor()
2104 mps_rplc->rplc31_0 = htonl(t4_read_reg(padap, MPS_VF_RPLCT_MAP0_A)); in cudbg_mps_rpl_backdoor()
2110 struct adapter *padap = pdbg_init->adap; in cudbg_collect_tcam_index() local
2115 if (CHELSIO_CHIP_VERSION(padap->params.chip) >= CHELSIO_T6) { in cudbg_collect_tcam_index()
2129 t4_write_reg(padap, MPS_CLS_TCAM_DATA2_CTL_A, ctl); in cudbg_collect_tcam_index()
2130 val = t4_read_reg(padap, MPS_CLS_TCAM_RDATA1_REQ_ID1_A); in cudbg_collect_tcam_index()
2132 tcamy |= t4_read_reg(padap, MPS_CLS_TCAM_RDATA0_REQ_ID1_A); in cudbg_collect_tcam_index()
2133 data2 = t4_read_reg(padap, MPS_CLS_TCAM_RDATA2_REQ_ID1_A); in cudbg_collect_tcam_index()
2154 t4_write_reg(padap, MPS_CLS_TCAM_DATA2_CTL_A, ctl); in cudbg_collect_tcam_index()
2155 val = t4_read_reg(padap, MPS_CLS_TCAM_RDATA1_REQ_ID1_A); in cudbg_collect_tcam_index()
2157 tcamx |= t4_read_reg(padap, MPS_CLS_TCAM_RDATA0_REQ_ID1_A); in cudbg_collect_tcam_index()
2158 data2 = t4_read_reg(padap, MPS_CLS_TCAM_RDATA2_REQ_ID1_A); in cudbg_collect_tcam_index()
2165 tcamy = t4_read_reg64(padap, MPS_CLS_TCAM_Y_L(idx)); in cudbg_collect_tcam_index()
2166 tcamx = t4_read_reg64(padap, MPS_CLS_TCAM_X_L(idx)); in cudbg_collect_tcam_index()
2173 tcam->cls_lo = t4_read_reg(padap, MPS_CLS_SRAM_L(idx)); in cudbg_collect_tcam_index()
2174 tcam->cls_hi = t4_read_reg(padap, MPS_CLS_SRAM_H(idx)); in cudbg_collect_tcam_index()
2176 if (is_t5(padap->params.chip)) in cudbg_collect_tcam_index()
2178 else if (is_t6(padap->params.chip)) in cudbg_collect_tcam_index()
2199 rc = t4_wr_mbox(padap, padap->mbox, &ldst_cmd, in cudbg_collect_tcam_index()
2203 cudbg_mps_rpl_backdoor(padap, &mps_rplc); in cudbg_collect_tcam_index()
2216 if (padap->params.arch.mps_rplc_size > CUDBG_MAX_RPLC_SIZE) { in cudbg_collect_tcam_index()
2225 tcam->rplc_size = padap->params.arch.mps_rplc_size; in cudbg_collect_tcam_index()
2233 struct adapter *padap = pdbg_init->adap; in cudbg_collect_mps_tcam() local
2239 n = padap->params.arch.mps_tcam_size; in cudbg_collect_mps_tcam()
2270 struct adapter *padap = pdbg_init->adap; in cudbg_collect_vpd_data() local
2278 rc = t4_get_raw_vpd_params(padap, &vpd); in cudbg_collect_vpd_data()
2282 rc = t4_get_fw_version(padap, &fw_vers); in cudbg_collect_vpd_data()
2289 rc = pci_set_vpd_size(padap->pdev, EEPROMVSIZE); in cudbg_collect_vpd_data()
2293 ret = cudbg_read_vpd_reg(padap, CUDBG_SCFG_VER_ADDR, CUDBG_SCFG_VER_LEN, in cudbg_collect_vpd_data()
2297 rc = pci_set_vpd_size(padap->pdev, CUDBG_VPD_PF_SIZE); in cudbg_collect_vpd_data()
2304 rc = cudbg_read_vpd_reg(padap, CUDBG_VPD_VER_ADDR, CUDBG_VPD_VER_LEN, in cudbg_collect_vpd_data()
2336 struct adapter *padap = pdbg_init->adap; in cudbg_read_tid() local
2342 t4_write_reg(padap, LE_DB_DBGI_REQ_DATA_A + (i << 2), 0); in cudbg_read_tid()
2346 t4_write_reg(padap, LE_DB_DBGI_REQ_TCAM_CMD_A, val); in cudbg_read_tid()
2350 t4_write_reg(padap, LE_DB_DBGI_CONFIG_A, val); in cudbg_read_tid()
2356 val = t4_read_reg(padap, LE_DB_DBGI_CONFIG_A); in cudbg_read_tid()
2364 val = t4_read_reg(padap, LE_DB_DBGI_RSP_STATUS_A); in cudbg_read_tid()
2371 tid_data->data[i] = t4_read_reg(padap, in cudbg_read_tid()
2422 void cudbg_fill_le_tcam_info(struct adapter *padap, in cudbg_fill_le_tcam_info() argument
2428 value = t4_read_reg(padap, LE_DB_TID_HASHBASE_A); /* hash base index */ in cudbg_fill_le_tcam_info()
2432 value = t4_read_reg(padap, LE_DB_ROUTING_TABLE_INDEX_A); in cudbg_fill_le_tcam_info()
2436 if (is_t6(padap->params.chip)) in cudbg_fill_le_tcam_info()
2437 value = t4_read_reg(padap, LE_DB_CLCAM_TID_BASE_A); in cudbg_fill_le_tcam_info()
2439 value = t4_read_reg(padap, LE_DB_CLIP_TABLE_INDEX_A); in cudbg_fill_le_tcam_info()
2443 value = t4_read_reg(padap, LE_DB_FILTER_TABLE_INDEX_A); in cudbg_fill_le_tcam_info()
2447 value = t4_read_reg(padap, LE_DB_SERVER_INDEX_A); in cudbg_fill_le_tcam_info()
2451 value = t4_read_reg(padap, LE_DB_CONFIG_A); in cudbg_fill_le_tcam_info()
2453 value = t4_read_reg(padap, LE_DB_HASH_CONFIG_A); in cudbg_fill_le_tcam_info()
2454 if (CHELSIO_CHIP_VERSION(padap->params.chip) > CHELSIO_T5) { in cudbg_fill_le_tcam_info()
2464 if (is_t6(padap->params.chip)) in cudbg_fill_le_tcam_info()
2472 if (is_t6(padap->params.chip)) in cudbg_fill_le_tcam_info()
2480 struct adapter *padap = pdbg_init->adap; in cudbg_collect_le_tcam() local
2488 cudbg_fill_le_tcam_info(padap, &tcam_region); in cudbg_collect_le_tcam()
2513 if (is_t6(padap->params.chip) && in cudbg_collect_le_tcam()
2535 struct adapter *padap = pdbg_init->adap; in cudbg_collect_cctrl() local
2545 t4_read_cong_tbl(padap, (void *)temp_buff.data); in cudbg_collect_cctrl()
2553 struct adapter *padap = pdbg_init->adap; in cudbg_collect_ma_indirect() local
2559 if (CHELSIO_CHIP_VERSION(padap->params.chip) < CHELSIO_T6) in cudbg_collect_ma_indirect()
2577 t4_read_indirect(padap, ma_fli->ireg_addr, ma_fli->ireg_data, in cudbg_collect_ma_indirect()
2592 t4_read_indirect(padap, ma_fli->ireg_addr, in cudbg_collect_ma_indirect()
2607 struct adapter *padap = pdbg_init->adap; in cudbg_collect_ulptx_la() local
2629 ulptx_la_buff->rdptr[i] = t4_read_reg(padap, in cudbg_collect_ulptx_la()
2632 ulptx_la_buff->wrptr[i] = t4_read_reg(padap, in cudbg_collect_ulptx_la()
2635 ulptx_la_buff->rddata[i] = t4_read_reg(padap, in cudbg_collect_ulptx_la()
2640 t4_read_reg(padap, in cudbg_collect_ulptx_la()
2645 t4_write_reg(padap, ULP_TX_ASIC_DEBUG_CTRL_A, 0x1); in cudbg_collect_ulptx_la()
2647 t4_read_reg(padap, ULP_TX_ASIC_DEBUG_CTRL_A); in cudbg_collect_ulptx_la()
2649 t4_read_reg(padap, ULP_TX_ASIC_DEBUG_0_A); in cudbg_collect_ulptx_la()
2651 t4_read_reg(padap, ULP_TX_ASIC_DEBUG_1_A); in cudbg_collect_ulptx_la()
2653 t4_read_reg(padap, ULP_TX_ASIC_DEBUG_2_A); in cudbg_collect_ulptx_la()
2655 t4_read_reg(padap, ULP_TX_ASIC_DEBUG_3_A); in cudbg_collect_ulptx_la()
2657 t4_read_reg(padap, ULP_TX_ASIC_DEBUG_4_A); in cudbg_collect_ulptx_la()
2659 t4_read_reg(padap, PM_RX_BASE_ADDR); in cudbg_collect_ulptx_la()
2669 struct adapter *padap = pdbg_init->adap; in cudbg_collect_up_cim_indirect() local
2677 if (is_t5(padap->params.chip)) in cudbg_collect_up_cim_indirect()
2680 else if (is_t6(padap->params.chip)) in cudbg_collect_up_cim_indirect()
2696 if (is_t5(padap->params.chip)) { in cudbg_collect_up_cim_indirect()
2704 } else if (is_t6(padap->params.chip)) { in cudbg_collect_up_cim_indirect()
2733 rc = t4_cim_read(padap, in cudbg_collect_up_cim_indirect()
2750 struct adapter *padap = pdbg_init->adap; in cudbg_collect_pbt_tables() local
2766 rc = t4_cim_read(padap, addr + (i * 4), 1, in cudbg_collect_pbt_tables()
2779 rc = t4_cim_read(padap, addr + (i * 4), 1, in cudbg_collect_pbt_tables()
2791 rc = t4_cim_read(padap, addr + (i * 4), 1, in cudbg_collect_pbt_tables()
2803 rc = t4_cim_read(padap, addr + (i * 4), 1, in cudbg_collect_pbt_tables()
2818 struct adapter *padap = pdbg_init->adap; in cudbg_collect_mbox_log() local
2829 log = padap->mbox_log; in cudbg_collect_mbox_log()
2830 mbox_cmds = padap->mbox_log->size; in cudbg_collect_mbox_log()
2862 struct adapter *padap = pdbg_init->adap; in cudbg_collect_hma_indirect() local
2868 if (CHELSIO_CHIP_VERSION(padap->params.chip) < CHELSIO_T6) in cudbg_collect_hma_indirect()
2886 t4_read_indirect(padap, hma_fli->ireg_addr, hma_fli->ireg_data, in cudbg_collect_hma_indirect()
2894 void cudbg_fill_qdesc_num_and_size(const struct adapter *padap, in cudbg_fill_qdesc_num_and_size() argument
2949 struct adapter *padap = pdbg_init->adap; in cudbg_collect_qdesc() local
2954 struct sge *s = &padap->sge; in cudbg_collect_qdesc()
2959 cudbg_fill_qdesc_num_and_size(padap, &tot_entries, &size); in cudbg_collect_qdesc()
3017 for (i = 0; i < padap->params.nports; i++) in cudbg_collect_qdesc()