Lines Matching refs:tg3_flag
91 #define tg3_flag(tp, flag) \ macro
132 (tg3_flag(tp, JUMBO_CAPABLE) ? 9000 : 1500)
139 (tg3_flag(tp, LRG_PROD_RING_CAP) ? \
143 (tg3_flag(tp, LRG_PROD_RING_CAP) ? \
214 #define TG3_MAX_UCAST_ADDR(tp) (tg3_flag((tp), ENABLE_ASF) ? 2 : 3)
215 #define TG3_UCAST_ADDR_IDX(tp) (tg3_flag((tp), ENABLE_ASF) ? 2 : 1)
571 if (tg3_flag(tp, PCIX_TARGET_HWBUG) || tg3_flag(tp, ICH_WORKAROUND)) in _tw32_flush()
591 if (tg3_flag(tp, FLUSH_POSTED_WRITES) || in tw32_mailbox_flush()
592 (!tg3_flag(tp, MBOX_WRITE_REORDER) && in tw32_mailbox_flush()
593 !tg3_flag(tp, ICH_WORKAROUND))) in tw32_mailbox_flush()
601 if (tg3_flag(tp, TXD_MBOX_HWBUG)) in tg3_write32_tx_mbox()
603 if (tg3_flag(tp, MBOX_WRITE_REORDER) || in tg3_write32_tx_mbox()
604 tg3_flag(tp, FLUSH_POSTED_WRITES)) in tg3_write32_tx_mbox()
638 if (tg3_flag(tp, SRAM_USE_CONFIG)) { in tg3_write_mem()
665 if (tg3_flag(tp, SRAM_USE_CONFIG)) { in tg3_read_mem()
717 if (!tg3_flag(tp, ENABLE_APE)) in tg3_ape_lock()
778 if (!tg3_flag(tp, ENABLE_APE)) in tg3_ape_unlock()
855 if (!tg3_flag(tp, APE_HAS_NCSI)) in tg3_ape_scratchpad_read()
946 if (!tg3_flag(tp, ENABLE_APE)) in tg3_ape_driver_state_change()
969 tg3_flag(tp, WOL_ENABLE)) { in tg3_ape_driver_state_change()
993 if (!tg3_flag(tp, ENABLE_APE) || in tg3_send_ape_heartbeat()
1026 if (tg3_flag(tp, 1SHOT_MSI)) in tg3_enable_ints()
1033 if (!tg3_flag(tp, TAGGED_STATUS) && in tg3_enable_ints()
1049 if (!(tg3_flag(tp, USE_LINKCHG_REG) || tg3_flag(tp, POLL_SERDES))) { in tg3_has_work()
1081 if (!tg3_flag(tp, TAGGED_STATUS) && tg3_has_work(tnapi)) in tg3_int_reenable()
1091 if (tg3_flag(tp, CPMU_PRESENT) || tg3_flag(tp, 5780_CLASS)) in tg3_switch_clocks()
1102 if (tg3_flag(tp, 5705_PLUS)) { in tg3_switch_clocks()
1452 if (!tg3_flag(tp, RGMII_INBAND_DISABLE)) in tg3_mdio_config_5785()
1465 if (!tg3_flag(tp, RGMII_INBAND_DISABLE)) { in tg3_mdio_config_5785()
1466 if (tg3_flag(tp, RGMII_EXT_IBND_RX_EN)) in tg3_mdio_config_5785()
1468 if (tg3_flag(tp, RGMII_EXT_IBND_TX_EN)) in tg3_mdio_config_5785()
1483 if (!tg3_flag(tp, RGMII_INBAND_DISABLE)) { in tg3_mdio_config_5785()
1484 if (tg3_flag(tp, RGMII_EXT_IBND_RX_EN)) in tg3_mdio_config_5785()
1489 if (tg3_flag(tp, RGMII_EXT_IBND_TX_EN)) in tg3_mdio_config_5785()
1503 if (tg3_flag(tp, MDIOBUS_INITED) && in tg3_mdio_start()
1514 if (tg3_flag(tp, 5717_PLUS)) { in tg3_mdio_init()
1526 } else if (tg3_flag(tp, IS_SSB_CORE) && tg3_flag(tp, ROBOSWITCH)) { in tg3_mdio_init()
1538 if (!tg3_flag(tp, USE_PHYLIB) || tg3_flag(tp, MDIOBUS_INITED)) in tg3_mdio_init()
1589 if (tg3_flag(tp, RGMII_INBAND_DISABLE)) in tg3_mdio_init()
1591 if (tg3_flag(tp, RGMII_EXT_IBND_RX_EN)) in tg3_mdio_init()
1593 if (tg3_flag(tp, RGMII_EXT_IBND_TX_EN)) in tg3_mdio_init()
1617 if (tg3_flag(tp, MDIOBUS_INITED)) { in tg3_mdio_fini()
1708 if (!tg3_flag(tp, 5780_CLASS) || !tg3_flag(tp, ENABLE_ASF)) in tg3_ump_link_report()
1728 if (tg3_flag(tp, ENABLE_ASF) && !tg3_flag(tp, ENABLE_APE)) { in tg3_stop_fw()
1747 if (tg3_flag(tp, ASF_NEW_HANDSHAKE)) { in tg3_write_sig_pre_reset()
1773 if (tg3_flag(tp, ASF_NEW_HANDSHAKE)) { in tg3_write_sig_post_reset()
1794 if (tg3_flag(tp, ENABLE_ASF)) { in tg3_write_sig_legacy()
1822 if (tg3_flag(tp, NO_FWARE_REPORTED)) in tg3_poll_fw()
1825 if (tg3_flag(tp, IS_SSB_CORE)) { in tg3_poll_fw()
1849 if (!tg3_flag(tp, NO_FWARE_REPORTED)) { in tg3_poll_fw()
1865 if (i >= 100000 && !tg3_flag(tp, NO_FWARE_REPORTED)) { in tg3_poll_fw()
1978 if (tg3_flag(tp, USE_PHYLIB)) in tg3_setup_flow_control()
1983 if (autoneg == AUTONEG_ENABLE && tg3_flag(tp, PAUSE_AUTONEG)) { in tg3_setup_flow_control()
2233 if (!tg3_flag(tp, 5705_PLUS) || in tg3_phy_toggle_apd()
2234 (tg3_flag(tp, 5717_PLUS) && in tg3_phy_toggle_apd()
2264 if (!tg3_flag(tp, 5705_PLUS) || in tg3_phy_toggle_automdix()
2439 tg3_flag(tp, 57765_CLASS)) && in tg3_phy_eee_enable()
2631 if (tg3_flag(tp, ENABLE_ASF)) in tg3_warn_mgmt_link_flap()
2699 if (tg3_flag(tp, 5717_PLUS) && in tg3_phy_reset()
2749 } else if (tg3_flag(tp, JUMBO_CAPABLE)) { in tg3_phy_reset()
2761 if (tg3_flag(tp, JUMBO_CAPABLE)) { in tg3_phy_reset()
2821 if (!tg3_flag(tp, IS_NIC)) in tg3_pwrsrc_switch_to_vmain()
2848 if (!tg3_flag(tp, IS_NIC) || in tg3_pwrsrc_die_with_vmain()
2870 if (!tg3_flag(tp, IS_NIC)) in tg3_pwrsrc_switch_to_vaux()
2953 if (tg3_flag(tp, ENABLE_ASF) || tg3_flag(tp, ENABLE_APE) || wol_enable) in tg3_frob_aux_power_5717()
2975 if (!tg3_flag(tp, IS_NIC) || tg3_flag(tp, 57765_CLASS)) in tg3_frob_aux_power()
2982 tg3_flag(tp, WOL_ENABLE) != 0 : 0); in tg3_frob_aux_power()
2995 if (tg3_flag(tp_peer, INIT_COMPLETE)) in tg3_frob_aux_power()
2998 if ((include_wol && tg3_flag(tp_peer, WOL_ENABLE)) || in tg3_frob_aux_power()
2999 tg3_flag(tp_peer, ENABLE_ASF)) in tg3_frob_aux_power()
3004 if ((include_wol && tg3_flag(tp, WOL_ENABLE)) || in tg3_frob_aux_power()
3005 tg3_flag(tp, ENABLE_ASF)) in tg3_frob_aux_power()
3143 if (tg3_flag(tp, NVRAM)) { in tg3_nvram_lock()
3166 if (tg3_flag(tp, NVRAM)) { in tg3_nvram_unlock()
3177 if (tg3_flag(tp, 5750_PLUS) && !tg3_flag(tp, PROTECTED_NVRAM)) { in tg3_enable_nvram_access()
3187 if (tg3_flag(tp, 5750_PLUS) && !tg3_flag(tp, PROTECTED_NVRAM)) { in tg3_disable_nvram_access()
3257 if (tg3_flag(tp, NVRAM) && in tg3_nvram_phys_addr()
3258 tg3_flag(tp, NVRAM_BUFFERED) && in tg3_nvram_phys_addr()
3259 tg3_flag(tp, FLASH) && in tg3_nvram_phys_addr()
3260 !tg3_flag(tp, NO_NVRAM_ADDR_TRANS) && in tg3_nvram_phys_addr()
3272 if (tg3_flag(tp, NVRAM) && in tg3_nvram_logical_addr()
3273 tg3_flag(tp, NVRAM_BUFFERED) && in tg3_nvram_logical_addr()
3274 tg3_flag(tp, FLASH) && in tg3_nvram_logical_addr()
3275 !tg3_flag(tp, NO_NVRAM_ADDR_TRANS) && in tg3_nvram_logical_addr()
3295 if (!tg3_flag(tp, NVRAM)) in tg3_nvram_read()
3509 !tg3_flag(tp, FLASH) || in tg3_nvram_write_block_buffered()
3510 !tg3_flag(tp, 57765_PLUS)) in tg3_nvram_write_block_buffered()
3514 !tg3_flag(tp, 5755_PLUS) && in tg3_nvram_write_block_buffered()
3524 if (!tg3_flag(tp, FLASH)) { in tg3_nvram_write_block_buffered()
3541 if (tg3_flag(tp, EEPROM_WRITE_PROT)) { in tg3_nvram_write_block()
3547 if (!tg3_flag(tp, NVRAM)) { in tg3_nvram_write_block()
3557 if (tg3_flag(tp, 5750_PLUS) && !tg3_flag(tp, PROTECTED_NVRAM)) in tg3_nvram_write_block()
3563 if (tg3_flag(tp, NVRAM_BUFFERED) || !tg3_flag(tp, FLASH)) { in tg3_nvram_write_block()
3578 if (tg3_flag(tp, EEPROM_WRITE_PROT)) { in tg3_nvram_write_block()
3645 BUG_ON(cpu_base == TX_CPU_BASE && tg3_flag(tp, 5705_PLUS)); in tg3_halt_cpu()
3660 if (tg3_flag(tp, IS_SSB_CORE)) in tg3_halt_cpu()
3673 if (tg3_flag(tp, NVRAM)) in tg3_halt_cpu()
3714 if (cpu_base == TX_CPU_BASE && tg3_flag(tp, 5705_PLUS)) { in tg3_load_firmware_cpu()
3721 if (tg3_flag(tp, 5705_PLUS) && tg3_asic_rev(tp) != ASIC_REV_57766) in tg3_load_firmware_cpu()
3870 if (!tg3_flag(tp, NO_NVRAM)) in tg3_load_57766_firmware()
3913 if (!tg3_flag(tp, FW_TSO)) in tg3_load_tso_firmware()
4040 if (tg3_flag(tp, CLKREQ_BUG)) in tg3_power_down_prepare()
4049 tg3_flag(tp, WOL_ENABLE); in tg3_power_down_prepare()
4051 if (tg3_flag(tp, USE_PHYLIB)) { in tg3_power_down_prepare()
4078 if (tg3_flag(tp, ENABLE_ASF) || device_should_wake) { in tg3_power_down_prepare()
4079 if (tg3_flag(tp, WOL_SPEED_100MB)) { in tg3_power_down_prepare()
4119 } else if (!tg3_flag(tp, ENABLE_ASF)) { in tg3_power_down_prepare()
4130 if (tg3_flag(tp, WOL_CAP)) in tg3_power_down_prepare()
4163 u32 speed = tg3_flag(tp, WOL_SPEED_100MB) ? in tg3_power_down_prepare()
4174 if (!tg3_flag(tp, 5750_PLUS)) in tg3_power_down_prepare()
4178 if ((tg3_flag(tp, 5705_PLUS) && !tg3_flag(tp, 5780_CLASS)) && in tg3_power_down_prepare()
4179 (tg3_flag(tp, ENABLE_ASF) || tg3_flag(tp, ENABLE_APE))) in tg3_power_down_prepare()
4182 if (tg3_flag(tp, ENABLE_APE)) in tg3_power_down_prepare()
4194 if (!tg3_flag(tp, WOL_SPEED_100MB) && in tg3_power_down_prepare()
4205 } else if (tg3_flag(tp, 5780_CLASS) || in tg3_power_down_prepare()
4206 tg3_flag(tp, CPMU_PRESENT) || in tg3_power_down_prepare()
4209 } else if (!(tg3_flag(tp, 5750_PLUS) && tg3_flag(tp, ENABLE_ASF))) { in tg3_power_down_prepare()
4218 } else if (tg3_flag(tp, 5705_PLUS)) { in tg3_power_down_prepare()
4232 if (!tg3_flag(tp, 5705_PLUS)) { in tg3_power_down_prepare()
4249 if (!(device_should_wake) && !tg3_flag(tp, ENABLE_ASF)) in tg3_power_down_prepare()
4255 if ((!tg3_flag(tp, IS_SSB_CORE)) && in tg3_power_down_prepare()
4262 if (!tg3_flag(tp, ENABLE_ASF)) { in tg3_power_down_prepare()
4281 pci_wake_from_d3(tp->pdev, tg3_flag(tp, WOL_ENABLE)); in tg3_power_down()
4426 if (tg3_flag(tp, WOL_SPEED_100MB)) in tg3_phy_copper_begin()
4770 if (tg3_flag(tp, ENABLE_APE)) in tg3_setup_eee()
4821 !tg3_flag(tp, INIT_COMPLETE)) in tg3_setup_copper_phy()
4985 if (tg3_flag(tp, ROBOSWITCH)) { in tg3_setup_copper_phy()
5015 if (tg3_flag(tp, RGMII_MODE)) { in tg3_setup_copper_phy()
5059 if (tg3_flag(tp, USE_LINKCHG_REG)) { in tg3_setup_copper_phy()
5070 (tg3_flag(tp, PCIX_MODE) || tg3_flag(tp, PCI_HIGH_SPEED))) { in tg3_setup_copper_phy()
5082 if (tg3_flag(tp, CLKREQ_BUG)) { in tg3_setup_copper_phy()
5464 if (tg3_flag(tp, INIT_COMPLETE) && in tg3_init_bcm8002()
5731 if (!tg3_flag(tp, HW_AUTONEG) && in tg3_setup_fiber_phy()
5733 tg3_flag(tp, INIT_COMPLETE)) { in tg3_setup_fiber_phy()
5765 if (tg3_flag(tp, HW_AUTONEG)) in tg3_setup_fiber_phy()
5987 } else if (!tg3_flag(tp, 5780_CLASS)) { in tg3_setup_fiber_mii_phy()
6119 if (!tg3_flag(tp, 5705_PLUS)) { in tg3_setup_phy()
6128 if (tg3_flag(tp, ASPM_WORKAROUND)) { in tg3_setup_phy()
6175 if (tg3_flag(tp, PTP_CAPABLE)) { in tg3_get_ts_info()
6364 if (!tg3_flag(tp, PTP_CAPABLE)) in tg3_ptp_init()
6376 if (!tg3_flag(tp, PTP_CAPABLE)) in tg3_ptp_resume()
6385 if (!tg3_flag(tp, PTP_CAPABLE) || !tp->ptp_clock) in tg3_ptp_fini()
6429 if (tg3_flag(tp, SUPPORT_MSIX)) in tg3_dump_legacy_regs()
6441 if (!tg3_flag(tp, 5705_PLUS)) { in tg3_dump_legacy_regs()
6453 if (tg3_flag(tp, NVRAM)) in tg3_dump_legacy_regs()
6466 if (tg3_flag(tp, PCI_EXPRESS)) { in tg3_dump_state()
6521 BUG_ON(tg3_flag(tp, MBOX_WRITE_REORDER) || in tg3_tx_recover()
6554 if (tg3_flag(tp, ENABLE_TSS)) in tg3_tx()
6989 if (!tg3_flag(tp, ENABLE_RSS)) { in tg3_rx()
7026 if (!(tg3_flag(tp, USE_LINKCHG_REG) || tg3_flag(tp, POLL_SERDES))) { in tg3_poll_link()
7033 if (tg3_flag(tp, USE_PHYLIB)) { in tg3_poll_link()
7180 if (unlikely(tg3_flag(tp, TX_RECOVERY_PENDING))) in tg3_poll_work()
7194 if (tg3_flag(tp, ENABLE_RSS) && tnapi == &tp->napi[1]) { in tg3_poll_work()
7245 if (unlikely(tg3_flag(tp, TX_RECOVERY_PENDING))) in tg3_poll_msix()
7300 if (tg3_flag(tp, ERROR_PROCESSED)) in tg3_process_error()
7344 if (unlikely(tg3_flag(tp, TX_RECOVERY_PENDING))) in tg3_poll()
7350 if (tg3_flag(tp, TAGGED_STATUS)) { in tg3_poll()
7531 if (tg3_flag(tp, CHIP_RESETTING) || in tg3_interrupt()
7580 if (tg3_flag(tp, CHIP_RESETTING) || in tg3_interrupt_tagged()
7687 if (tg3_flag(tp, 40BIT_DMA_BUG)) in tg3_40bit_overflow_test()
7712 if (tg3_flag(tp, SHORT_DMA_BUG) && len <= 8) in tg3_tx_frag_set()
7932 if (tg3_flag(tp, ENABLE_TSS)) in tg3_start_xmit()
7980 tg3_flag(tp, TSO_BUG)) { in tg3_start_xmit()
7997 if (tg3_flag(tp, HW_TSO_1) || in tg3_start_xmit()
7998 tg3_flag(tp, HW_TSO_2) || in tg3_start_xmit()
7999 tg3_flag(tp, HW_TSO_3)) { in tg3_start_xmit()
8007 if (tg3_flag(tp, HW_TSO_3)) { in tg3_start_xmit()
8012 } else if (tg3_flag(tp, HW_TSO_2)) in tg3_start_xmit()
8014 else if (tg3_flag(tp, HW_TSO_1) || in tg3_start_xmit()
8043 if (tg3_flag(tp, USE_JUMBO_BDFLAG) && in tg3_start_xmit()
8053 tg3_flag(tp, TX_TSTAMP_EN)) { in tg3_start_xmit()
8070 if (tg3_flag(tp, 5701_DMA_BUG)) in tg3_start_xmit()
8080 if (!tg3_flag(tp, HW_TSO_1) && in tg3_start_xmit()
8081 !tg3_flag(tp, HW_TSO_2) && in tg3_start_xmit()
8082 !tg3_flag(tp, HW_TSO_3)) in tg3_start_xmit()
8183 if (!tg3_flag(tp, 5705_PLUS)) in tg3_mac_loopback()
8193 if (tg3_flag(tp, 5705_PLUS) || in tg3_mac_loopback()
8265 tg3_flag(tp, 5780_CLASS)) { in tg3_phy_lpbk_set()
8327 if (dev->mtu > ETH_DATA_LEN && tg3_flag(tp, 5780_CLASS)) in tg3_fix_features()
8354 if (tg3_flag(tp, JUMBO_CAPABLE)) { in tg3_rx_prodring_free()
8370 if (tg3_flag(tp, JUMBO_CAPABLE) && !tg3_flag(tp, 5780_CLASS)) { in tg3_rx_prodring_free()
8407 if (tg3_flag(tp, 5780_CLASS) && in tg3_rx_prodring_alloc()
8443 if (!tg3_flag(tp, JUMBO_CAPABLE) || tg3_flag(tp, 5780_CLASS)) in tg3_rx_prodring_alloc()
8448 if (!tg3_flag(tp, JUMBO_RING_ENABLE)) in tg3_rx_prodring_alloc()
8520 if (tg3_flag(tp, JUMBO_CAPABLE) && !tg3_flag(tp, 5780_CLASS)) { in tg3_rx_prodring_init()
8643 if (tg3_flag(tp, ENABLE_TSS)) in tg3_mem_tx_acquire()
8697 if (tg3_flag(tp, ENABLE_RSS)) in tg3_mem_rx_acquire()
8710 if (!i && tg3_flag(tp, ENABLE_RSS)) in tg3_mem_rx_acquire()
8788 if (tg3_flag(tp, ENABLE_RSS)) { in tg3_alloc_consistent()
8837 if (tg3_flag(tp, 5705_PLUS)) { in tg3_stop_block()
8973 tg3_flag(tp, PCIX_MODE)) in tg3_restore_pci_state()
8976 if (tg3_flag(tp, ENABLE_APE)) in tg3_restore_pci_state()
8984 if (!tg3_flag(tp, PCI_EXPRESS)) { in tg3_restore_pci_state()
8992 if (tg3_flag(tp, PCIX_MODE)) { in tg3_restore_pci_state()
9002 if (tg3_flag(tp, 5780_CLASS)) { in tg3_restore_pci_state()
9007 if (tg3_flag(tp, USING_MSI)) { in tg3_restore_pci_state()
9093 tg3_flag(tp, 5755_PLUS)) in tg3_chip_reset()
9139 if (tg3_flag(tp, PCI_EXPRESS)) { in tg3_chip_reset()
9142 !tg3_flag(tp, 57765_PLUS) && in tg3_chip_reset()
9167 if (tg3_flag(tp, 5705_PLUS) && !tg3_flag(tp, CPMU_PRESENT)) in tg3_chip_reset()
9200 if (tg3_flag(tp, PCI_EXPRESS) && pci_is_pcie(tp->pdev)) { in tg3_chip_reset()
9222 if (!tg3_flag(tp, CPMU_PRESENT)) in tg3_chip_reset()
9240 if (tg3_flag(tp, 5780_CLASS)) in tg3_chip_reset()
9249 if (tg3_flag(tp, IS_SSB_CORE)) { in tg3_chip_reset()
9295 if (tg3_flag(tp, PCI_EXPRESS) && in tg3_chip_reset()
9298 !tg3_flag(tp, 57765_PLUS)) { in tg3_chip_reset()
9329 if (tg3_flag(tp, 5750_PLUS)) in tg3_chip_reset()
9391 if (tg3_flag(tp, ENABLE_ASF)) { in tg3_set_mac_addr()
9427 if (!tg3_flag(tp, 5705_PLUS)) in tg3_set_bdinfo()
9438 if (!tg3_flag(tp, ENABLE_TSS)) { in tg3_coal_tx_init()
9471 if (!tg3_flag(tp, ENABLE_RSS)) { in tg3_coal_rx_init()
9505 if (!tg3_flag(tp, 5705_PLUS)) { in __tg3_set_coalesce()
9524 if (!tg3_flag(tp, 5705_PLUS)) in tg3_tx_rcbs_disable()
9526 else if (tg3_flag(tp, 5717_PLUS)) in tg3_tx_rcbs_disable()
9528 else if (tg3_flag(tp, 57765_CLASS) || in tg3_tx_rcbs_disable()
9546 if (tg3_flag(tp, ENABLE_TSS)) in tg3_tx_rcbs_init()
9567 if (tg3_flag(tp, 5717_PLUS)) in tg3_rx_ret_rcbs_disable()
9569 else if (!tg3_flag(tp, 5705_PLUS)) in tg3_rx_ret_rcbs_disable()
9573 tg3_flag(tp, 57765_CLASS)) in tg3_rx_ret_rcbs_disable()
9590 if (tg3_flag(tp, ENABLE_RSS)) in tg3_rx_ret_rcbs_init()
9623 if (tg3_flag(tp, SUPPORT_MSIX)) { in tg3_rings_reset()
9627 if (tg3_flag(tp, ENABLE_TSS)) in tg3_rings_reset()
9635 if (!tg3_flag(tp, ENABLE_TSS)) in tg3_rings_reset()
9645 if (!tg3_flag(tp, 5705_PLUS)) { in tg3_rings_reset()
9680 if (!tg3_flag(tp, 5750_PLUS) || in tg3_setup_rxbd_thresholds()
9681 tg3_flag(tp, 5780_CLASS) || in tg3_setup_rxbd_thresholds()
9684 tg3_flag(tp, 57765_PLUS)) in tg3_setup_rxbd_thresholds()
9698 if (tg3_flag(tp, 57765_PLUS)) in tg3_setup_rxbd_thresholds()
9701 if (!tg3_flag(tp, JUMBO_CAPABLE) || tg3_flag(tp, 5780_CLASS)) in tg3_setup_rxbd_thresholds()
9711 if (tg3_flag(tp, 57765_PLUS)) in tg3_setup_rxbd_thresholds()
9760 if (!tg3_flag(tp, ENABLE_ASF)) in __tg3_set_rx_mode()
9828 if (!tg3_flag(tp, SUPPORT_MSIX)) in tg3_rss_check_indir_tbl()
9884 if (tg3_flag(tp, INIT_COMPLETE)) in tg3_reset_hw()
9943 if (tg3_flag(tp, L1PLLPD_EN)) { in tg3_reset_hw()
9957 if (tg3_flag(tp, 57765_CLASS)) { in tg3_reset_hw()
10007 if (!tg3_flag(tp, CPMU_PRESENT)) { in tg3_reset_hw()
10008 if (!tg3_flag(tp, PCI_EXPRESS)) in tg3_reset_hw()
10014 tg3_flag(tp, PCIX_MODE)) { in tg3_reset_hw()
10020 if (tg3_flag(tp, ENABLE_APE)) { in tg3_reset_hw()
10047 if (tg3_flag(tp, 57765_PLUS)) { in tg3_reset_hw()
10052 if (!tg3_flag(tp, 57765_CLASS) && in tg3_reset_hw()
10084 if (tg3_flag(tp, PTP_CAPABLE)) in tg3_reset_hw()
10106 if (tg3_flag(tp, 5750_PLUS)) { in tg3_reset_hw()
10116 } else if (tg3_flag(tp, TSO_CAPABLE)) { in tg3_reset_hw()
10192 if (!tg3_flag(tp, 5717_PLUS)) in tg3_reset_hw()
10197 if (!tg3_flag(tp, 5705_PLUS)) in tg3_reset_hw()
10205 (tg3_flag(tp, JUMBO_CAPABLE) && !tg3_flag(tp, 5780_CLASS))) { in tg3_reset_hw()
10207 if (tg3_flag(tp, JUMBO_RING_ENABLE)) { in tg3_reset_hw()
10216 if (!tg3_flag(tp, USE_JUMBO_BDFLAG) || in tg3_reset_hw()
10217 tg3_flag(tp, 57765_CLASS) || in tg3_reset_hw()
10226 if (tg3_flag(tp, 57765_PLUS)) { in tg3_reset_hw()
10241 tg3_flag(tp, JUMBO_RING_ENABLE) ? tp->rx_jumbo_pending : 0; in tg3_reset_hw()
10293 if (tg3_flag(tp, TSO_CAPABLE) && in tg3_reset_hw()
10297 !tg3_flag(tp, IS_5788)) { in tg3_reset_hw()
10302 if (tg3_flag(tp, PCI_EXPRESS)) in tg3_reset_hw()
10313 if (tg3_flag(tp, HW_TSO_1) || in tg3_reset_hw()
10314 tg3_flag(tp, HW_TSO_2) || in tg3_reset_hw()
10315 tg3_flag(tp, HW_TSO_3)) in tg3_reset_hw()
10318 if (tg3_flag(tp, 57765_PLUS) || in tg3_reset_hw()
10331 tg3_flag(tp, 57765_PLUS)) { in tg3_reset_hw()
10369 if (tg3_flag(tp, 5750_PLUS)) { in tg3_reset_hw()
10374 tg3_flag(tp, TSO_CAPABLE)) { in tg3_reset_hw()
10397 if (!tg3_flag(tp, 5705_PLUS)) { in tg3_reset_hw()
10423 if (!tg3_flag(tp, 5705_PLUS)) in tg3_reset_hw()
10436 if (tg3_flag(tp, ENABLE_APE)) in tg3_reset_hw()
10438 if (!tg3_flag(tp, 5705_PLUS) && in tg3_reset_hw()
10451 if (!tg3_flag(tp, IS_NIC)) { in tg3_reset_hw()
10469 if (tg3_flag(tp, EEPROM_WRITE_PROT)) in tg3_reset_hw()
10476 if (tg3_flag(tp, USING_MSIX)) { in tg3_reset_hw()
10481 if (!tg3_flag(tp, 1SHOT_MSI)) in tg3_reset_hw()
10486 if (!tg3_flag(tp, 5705_PLUS)) { in tg3_reset_hw()
10499 if (tg3_flag(tp, TSO_CAPABLE) && in tg3_reset_hw()
10504 !tg3_flag(tp, IS_5788)) { in tg3_reset_hw()
10510 if (tg3_flag(tp, 5755_PLUS)) in tg3_reset_hw()
10519 if (tg3_flag(tp, PCIX_MODE)) { in tg3_reset_hw()
10553 if (!tg3_flag(tp, 5705_PLUS)) in tg3_reset_hw()
10565 if (tg3_flag(tp, LRG_PROD_RING_CAP)) in tg3_reset_hw()
10569 if (tg3_flag(tp, HW_TSO_1) || in tg3_reset_hw()
10570 tg3_flag(tp, HW_TSO_2) || in tg3_reset_hw()
10571 tg3_flag(tp, HW_TSO_3)) in tg3_reset_hw()
10574 if (tg3_flag(tp, ENABLE_TSS)) in tg3_reset_hw()
10592 if (tg3_flag(tp, TSO_CAPABLE)) { in tg3_reset_hw()
10600 if (tg3_flag(tp, 5755_PLUS) || in tg3_reset_hw()
10614 if (tg3_flag(tp, ENABLE_RSS)) { in tg3_reset_hw()
10626 if (tg3_flag(tp, 5755_PLUS)) in tg3_reset_hw()
10632 if (tg3_flag(tp, ENABLE_RSS)) in tg3_reset_hw()
10670 if (tg3_flag(tp, 57765_CLASS)) in tg3_reset_hw()
10693 if (!tg3_flag(tp, USE_PHYLIB)) { in tg3_reset_hw()
10722 if (tg3_flag(tp, 5705_PLUS) && !tg3_flag(tp, 5780_CLASS)) in tg3_reset_hw()
10726 if (tg3_flag(tp, ENABLE_ASF)) in tg3_reset_hw()
10776 if (tg3_flag(tp, ENABLE_APE)) in tg3_reset_hw()
10921 if (unlikely(tg3_flag(tp, 5719_5720_RDMA_BUG) && in tg3_periodic_fetch_stats()
10996 if (tp->irq_sync || tg3_flag(tp, RESET_TASK_PENDING)) { in tg3_timer()
11002 tg3_flag(tp, 57765_CLASS)) in tg3_timer()
11005 if (tg3_flag(tp, FLUSH_POSTED_WRITES)) { in tg3_timer()
11010 if (!tg3_flag(tp, TAGGED_STATUS)) { in tg3_timer()
11032 if (tg3_flag(tp, 5705_PLUS)) in tg3_timer()
11038 if (tg3_flag(tp, USE_LINKCHG_REG)) { in tg3_timer()
11053 } else if (tg3_flag(tp, POLL_SERDES)) { in tg3_timer()
11078 tg3_flag(tp, 5780_CLASS)) { in tg3_timer()
11080 } else if (tg3_flag(tp, POLL_CPMU_LINK)) { in tg3_timer()
11110 if (tg3_flag(tp, ENABLE_ASF) && !tg3_flag(tp, ENABLE_APE)) { in tg3_timer()
11136 if (tg3_flag(tp, TAGGED_STATUS) && in tg3_timer_init()
11138 !tg3_flag(tp, 57765_CLASS)) in tg3_timer_init()
11213 if (tg3_flag(tp, TX_RECOVERY_PENDING)) { in tg3_reset_task()
11263 if (tg3_flag(tp, USING_MSI) || tg3_flag(tp, USING_MSIX)) { in tg3_request_irq()
11265 if (tg3_flag(tp, 1SHOT_MSI)) in tg3_request_irq()
11270 if (tg3_flag(tp, TAGGED_STATUS)) in tg3_request_irq()
11296 if (tg3_flag(tp, 57765_PLUS)) { in tg3_test_interrupt()
11324 if (tg3_flag(tp, 57765_PLUS) && in tg3_test_interrupt()
11342 if (tg3_flag(tp, 57765_PLUS) && tg3_flag(tp, 1SHOT_MSI)) { in tg3_test_interrupt()
11360 if (!tg3_flag(tp, USING_MSI)) in tg3_test_msi()
11521 if ((tg3_flag(tp, SUPPORT_MSI) || tg3_flag(tp, SUPPORT_MSIX)) && in tg3_ints_init()
11522 !tg3_flag(tp, TAGGED_STATUS)) { in tg3_ints_init()
11531 if (tg3_flag(tp, SUPPORT_MSIX) && tg3_enable_msix(tp)) in tg3_ints_init()
11533 else if (tg3_flag(tp, SUPPORT_MSI) && pci_enable_msi(tp->pdev) == 0) in tg3_ints_init()
11536 if (tg3_flag(tp, USING_MSI) || tg3_flag(tp, USING_MSIX)) { in tg3_ints_init()
11538 if (tg3_flag(tp, USING_MSIX) && tp->irq_cnt > 1) in tg3_ints_init()
11540 if (!tg3_flag(tp, 1SHOT_MSI)) in tg3_ints_init()
11545 if (!tg3_flag(tp, USING_MSIX)) { in tg3_ints_init()
11560 if (tg3_flag(tp, USING_MSIX)) in tg3_ints_fini()
11562 else if (tg3_flag(tp, USING_MSI)) in tg3_ints_fini()
11623 if (test_irq && tg3_flag(tp, USING_MSI)) { in tg3_start()
11635 if (!tg3_flag(tp, 57765_PLUS) && tg3_flag(tp, USING_MSI)) { in tg3_start()
11747 } else if (!tg3_flag(tp, TSO_CAPABLE)) { in tg3_open()
12007 if (tg3_flag(tp, NO_NVRAM)) in tg3_get_eeprom()
12017 if (tg3_flag(tp, CPMU_PRESENT)) { in tg3_get_eeprom()
12098 if (tg3_flag(tp, NO_NVRAM) || in tg3_set_eeprom()
12152 if (tg3_flag(tp, USE_PHYLIB)) { in tg3_get_link_ksettings()
12183 if (tg3_flag(tp, PAUSE_AUTONEG)) { in tg3_get_link_ksettings()
12228 if (tg3_flag(tp, USE_PHYLIB)) { in tg3_set_link_ksettings()
12331 if (tg3_flag(tp, WOL_CAP) && device_can_wakeup(&tp->pdev->dev)) in tg3_get_wol()
12336 if (tg3_flag(tp, WOL_ENABLE) && device_can_wakeup(&tp->pdev->dev)) in tg3_get_wol()
12349 !(tg3_flag(tp, WOL_CAP) && device_can_wakeup(dp))) in tg3_set_wol()
12387 if (tg3_flag(tp, USE_PHYLIB)) { in tg3_nway_reset()
12415 if (tg3_flag(tp, JUMBO_RING_ENABLE)) in tg3_get_ringparam()
12423 if (tg3_flag(tp, JUMBO_RING_ENABLE)) in tg3_get_ringparam()
12441 (tg3_flag(tp, TSO_BUG) && in tg3_set_ringparam()
12455 if (tg3_flag(tp, MAX_RXPEND_64) && in tg3_set_ringparam()
12459 if (tg3_flag(tp, JUMBO_RING_ENABLE)) in tg3_set_ringparam()
12490 epause->autoneg = !!tg3_flag(tp, PAUSE_AUTONEG); in tg3_get_pauseparam()
12512 if (tg3_flag(tp, USE_PHYLIB)) { in tg3_set_pauseparam()
12613 if (!tg3_flag(tp, SUPPORT_MSIX)) in tg3_get_rxnfc()
12638 if (tg3_flag(tp, SUPPORT_MSIX)) in tg3_get_rxfh_indir_size()
12679 if (!netif_running(dev) || !tg3_flag(tp, ENABLE_RSS)) in tg3_set_rxfh()
12722 if (!tg3_flag(tp, SUPPORT_MSIX)) in tg3_set_channels()
12809 if (tg3_flag(tp, NO_NVRAM) || tg3_nvram_read(tp, 0, &magic)) in tg3_vpd_readblock()
12894 if (tg3_flag(tp, NO_NVRAM)) in tg3_test_nvram()
13244 if (tg3_flag(tp, 5705_PLUS)) { in tg3_test_registers()
13246 if (tg3_flag(tp, 5750_PLUS)) in tg3_test_registers()
13257 if (tg3_flag(tp, IS_5788) && in tg3_test_registers()
13380 if (tg3_flag(tp, 5717_PLUS)) in tg3_test_memory()
13382 else if (tg3_flag(tp, 57765_CLASS) || in tg3_test_memory()
13385 else if (tg3_flag(tp, 5755_PLUS)) in tg3_test_memory()
13389 else if (tg3_flag(tp, 5705_PLUS)) in tg3_test_memory()
13442 if (tg3_flag(tp, ENABLE_RSS)) in tg3_run_loopback()
13444 if (tg3_flag(tp, ENABLE_TSS)) in tg3_run_loopback()
13481 if (tg3_flag(tp, HW_TSO_1) || in tg3_run_loopback()
13482 tg3_flag(tp, HW_TSO_2) || in tg3_run_loopback()
13483 tg3_flag(tp, HW_TSO_3)) { in tg3_run_loopback()
13491 if (tg3_flag(tp, HW_TSO_3)) { in tg3_run_loopback()
13496 } else if (tg3_flag(tp, HW_TSO_2)) in tg3_run_loopback()
13498 else if (tg3_flag(tp, HW_TSO_1) || in tg3_run_loopback()
13510 if (tg3_flag(tp, USE_JUMBO_BDFLAG) && in tg3_run_loopback()
13671 if (tg3_flag(tp, ENABLE_RSS)) { in tg3_test_loopback()
13686 !tg3_flag(tp, CPMU_PRESENT)) { in tg3_test_loopback()
13692 if (tg3_flag(tp, JUMBO_RING_ENABLE) && in tg3_test_loopback()
13700 !tg3_flag(tp, USE_PHYLIB)) { in tg3_test_loopback()
13714 if (tg3_flag(tp, TSO_CAPABLE) && in tg3_test_loopback()
13717 if (tg3_flag(tp, JUMBO_RING_ENABLE) && in tg3_test_loopback()
13733 if (tg3_flag(tp, TSO_CAPABLE) && in tg3_test_loopback()
13737 if (tg3_flag(tp, JUMBO_RING_ENABLE) && in tg3_test_loopback()
13795 if (!tg3_flag(tp, 5705_PLUS)) in tg3_self_test()
13851 if (!tg3_flag(tp, PTP_CAPABLE)) in tg3_hwtstamp_set()
13938 if (!tg3_flag(tp, PTP_CAPABLE)) in tg3_hwtstamp_get()
13942 stmpconf.tx_type = (tg3_flag(tp, TX_TSTAMP_EN) ? in tg3_hwtstamp_get()
14000 if (tg3_flag(tp, USE_PHYLIB)) { in tg3_ioctl()
14073 if (!tg3_flag(tp, 5705_PLUS)) { in tg3_set_coalesce()
14207 if (!tp->hw_stats || !tg3_flag(tp, INIT_COMPLETE)) { in tg3_get_stats64()
14235 if (tg3_flag(tp, 5780_CLASS)) { in tg3_set_mtu()
14242 if (tg3_flag(tp, 5780_CLASS)) { in tg3_set_mtu()
14352 if (tg3_flag(tp, NO_NVRAM) || tg3_nvram_read(tp, 0, &val) != 0) in tg3_get_nvram_size()
14394 tg3_flag(tp, 5780_CLASS)) { in tg3_get_nvram_info()
14489 if (tg3_flag(tp, FLASH)) { in tg3_get_5752_nvram_info()
14994 if (tg3_flag(tp, IS_SSB_CORE)) { in tg3_nvram_init()
15041 tg3_flag(tp, 57765_CLASS)) in tg3_nvram_init()
15219 if (!tg3_flag(tp, 5705_PLUS)) in tg3_get_eeprom_hw_cfg()
15225 if (tg3_flag(tp, 5750_PLUS)) in tg3_get_eeprom_hw_cfg()
15260 if (tg3_flag(tp, 5717_PLUS) || in tg3_get_eeprom_hw_cfg()
15302 if (tg3_flag(tp, 5750_PLUS)) in tg3_get_eeprom_hw_cfg()
15307 tg3_flag(tp, 5750_PLUS)) in tg3_get_eeprom_hw_cfg()
15314 if (tg3_flag(tp, WOL_CAP) && in tg3_get_eeprom_hw_cfg()
15328 if ((tg3_flag(tp, 57765_PLUS) || in tg3_get_eeprom_hw_cfg()
15334 if (tg3_flag(tp, PCI_EXPRESS)) { in tg3_get_eeprom_hw_cfg()
15339 !tg3_flag(tp, 57765_PLUS) && in tg3_get_eeprom_hw_cfg()
15359 if (tg3_flag(tp, WOL_CAP)) in tg3_get_eeprom_hw_cfg()
15361 tg3_flag(tp, WOL_ENABLE)); in tg3_get_eeprom_hw_cfg()
15487 if (tg3_flag(tp, ENABLE_APE)) { in tg3_phy_probe()
15504 if (!tg3_flag(tp, ENABLE_ASF) && in tg3_phy_probe()
15510 if (tg3_flag(tp, USE_PHYLIB)) in tg3_phy_probe()
15517 if (tg3_flag(tp, ENABLE_ASF) || tg3_flag(tp, ENABLE_APE)) { in tg3_phy_probe()
15555 } else if (!tg3_flag(tp, IS_SSB_CORE)) { in tg3_phy_probe()
15596 !tg3_flag(tp, ENABLE_APE) && in tg3_phy_probe()
15597 !tg3_flag(tp, ENABLE_ASF)) { in tg3_phy_probe()
15910 if (!tg3_flag(tp, 5705_PLUS)) in tg3_read_mgmtfw_ver()
15968 if (tg3_flag(tp, APE_HAS_NCSI)) in tg3_read_dash_ver()
16018 if (tg3_flag(tp, NO_NVRAM)) { in tg3_read_fw_ver()
16034 if (tg3_flag(tp, ENABLE_ASF)) { in tg3_read_fw_ver()
16035 if (tg3_flag(tp, ENABLE_APE)) { in tg3_read_fw_ver()
16049 if (tg3_flag(tp, LRG_PROD_RING_CAP)) in tg3_rx_ret_ring_size()
16051 else if (tg3_flag(tp, JUMBO_CAPABLE) && !tg3_flag(tp, 5780_CLASS)) in tg3_rx_ret_ring_size()
16150 if (tg3_flag(tp, 57765_CLASS) || tg3_flag(tp, 5717_PLUS) || in tg3_detect_asic_rev()
16161 tg3_flag(tp, 57765_PLUS)) in tg3_detect_asic_rev()
16171 tg3_flag(tp, 5755_PLUS) || in tg3_detect_asic_rev()
16172 tg3_flag(tp, 5780_CLASS)) in tg3_detect_asic_rev()
16176 tg3_flag(tp, 5750_PLUS)) in tg3_detect_asic_rev()
16331 if (tg3_flag(tp, 5780_CLASS)) { in tg3_get_invariants()
16360 else if (tg3_flag(tp, 57765_PLUS)) in tg3_get_invariants()
16362 else if (tg3_flag(tp, 5755_PLUS) || in tg3_get_invariants()
16365 else if (tg3_flag(tp, 5750_PLUS)) { in tg3_get_invariants()
16383 if (tg3_flag(tp, HW_TSO_1) || in tg3_get_invariants()
16384 tg3_flag(tp, HW_TSO_2) || in tg3_get_invariants()
16385 tg3_flag(tp, HW_TSO_3) || in tg3_get_invariants()
16386 tg3_flag(tp, FW_TSO)) { in tg3_get_invariants()
16406 if (tg3_flag(tp, 5750_PLUS)) { in tg3_get_invariants()
16415 if (tg3_flag(tp, 5755_PLUS) || in tg3_get_invariants()
16420 if (tg3_flag(tp, 57765_PLUS)) { in tg3_get_invariants()
16437 if (tg3_flag(tp, 5755_PLUS) || in tg3_get_invariants()
16450 if (tg3_flag(tp, 57765_PLUS) && in tg3_get_invariants()
16454 if (!tg3_flag(tp, 5705_PLUS) || in tg3_get_invariants()
16455 tg3_flag(tp, 5780_CLASS) || in tg3_get_invariants()
16456 tg3_flag(tp, USE_JUMBO_BDFLAG)) in tg3_get_invariants()
16487 } else if (!tg3_flag(tp, 5705_PLUS) || in tg3_get_invariants()
16488 tg3_flag(tp, 5780_CLASS)) { in tg3_get_invariants()
16507 !tg3_flag(tp, PCI_EXPRESS)) in tg3_get_invariants()
16535 if (tg3_flag(tp, PCIX_MODE)) { in tg3_get_invariants()
16581 if (tg3_flag(tp, PCIX_TARGET_HWBUG)) in tg3_get_invariants()
16584 (tg3_flag(tp, PCI_EXPRESS) && in tg3_get_invariants()
16596 if (tg3_flag(tp, TXD_MBOX_HWBUG) || tg3_flag(tp, MBOX_WRITE_REORDER)) { in tg3_get_invariants()
16598 if (tg3_flag(tp, MBOX_WRITE_REORDER)) in tg3_get_invariants()
16602 if (tg3_flag(tp, ICH_WORKAROUND)) { in tg3_get_invariants()
16625 (tg3_flag(tp, PCIX_MODE) && in tg3_get_invariants()
16640 tg3_flag(tp, 5780_CLASS)) { in tg3_get_invariants()
16641 if (tg3_flag(tp, PCIX_MODE)) { in tg3_get_invariants()
16661 if (tg3_flag(tp, FLUSH_POSTED_WRITES)) { in tg3_get_invariants()
16676 if (tg3_flag(tp, FW_TSO) && tg3_flag(tp, ENABLE_ASF)) { in tg3_get_invariants()
16682 if (tg3_flag(tp, ENABLE_APE)) { in tg3_get_invariants()
16704 tg3_flag(tp, EEPROM_WRITE_PROT)) in tg3_get_invariants()
16715 tg3_flag(tp, 57765_CLASS)) in tg3_get_invariants()
16722 if (tg3_flag(tp, IS_NIC)) in tg3_get_invariants()
16738 if (tp->dev->mtu > ETH_DATA_LEN && !tg3_flag(tp, 5780_CLASS)) in tg3_get_invariants()
16769 if (tg3_flag(tp, 5705_PLUS) && in tg3_get_invariants()
16773 !tg3_flag(tp, 57765_PLUS)) { in tg3_get_invariants()
16794 if (tg3_flag(tp, CPMU_PRESENT)) in tg3_get_invariants()
16846 !tg3_flag(tp, PCIX_TARGET_HWBUG)) { in tg3_get_invariants()
16872 !tg3_flag(tp, NO_NVRAM)) in tg3_get_invariants()
16883 if (!tg3_flag(tp, IS_5788) && in tg3_get_invariants()
16886 if (tg3_flag(tp, TAGGED_STATUS)) { in tg3_get_invariants()
16896 if (tg3_flag(tp, ENABLE_APE)) in tg3_get_invariants()
16949 if (tg3_flag(tp, ENABLE_APE) && tg3_flag(tp, ENABLE_ASF)) in tg3_get_invariants()
16955 tg3_flag(tp, PCIX_MODE)) { in tg3_get_invariants()
16976 if (tg3_flag(tp, ASPM_WORKAROUND)) in tg3_get_invariants()
16993 if (tg3_flag(tp, IS_SSB_CORE)) { in tg3_get_device_address()
17001 tg3_flag(tp, 5780_CLASS)) { in tg3_get_device_address()
17008 } else if (tg3_flag(tp, 5717_PLUS)) { in tg3_get_device_address()
17033 if (!tg3_flag(tp, NO_NVRAM) && in tg3_get_device_address()
17078 !tg3_flag(tp, PCI_EXPRESS)) in tg3_calc_dma_bndry()
17091 if (tg3_flag(tp, 57765_PLUS)) { in tg3_calc_dma_bndry()
17110 if (tg3_flag(tp, PCIX_MODE) && !tg3_flag(tp, PCI_EXPRESS)) { in tg3_calc_dma_bndry()
17135 } else if (tg3_flag(tp, PCI_EXPRESS)) { in tg3_calc_dma_bndry()
17308 if (tg3_flag(tp, 57765_PLUS)) in tg3_test_dma()
17311 if (tg3_flag(tp, PCI_EXPRESS)) { in tg3_test_dma()
17314 } else if (!tg3_flag(tp, PCIX_MODE)) { in tg3_test_dma()
17330 if (tg3_flag(tp, 40BIT_DMA_BUG) && in tg3_test_dma()
17353 if (tg3_flag(tp, ONE_DMA_AT_ONCE)) in tg3_test_dma()
17466 if (tg3_flag(tp, 57765_PLUS)) { in tg3_init_bufmgr_config()
17480 } else if (tg3_flag(tp, 5705_PLUS)) { in tg3_init_bufmgr_config()
17554 if (tg3_flag(tp, PCI_EXPRESS)) { in tg3_bus_string()
17557 } else if (tg3_flag(tp, PCIX_MODE)) { in tg3_bus_string()
17576 if (tg3_flag(tp, PCI_HIGH_SPEED)) in tg3_bus_string()
17581 if (tg3_flag(tp, PCI_32BIT)) in tg3_bus_string()
17612 if (tg3_flag(tp, 5705_PLUS)) { in tg3_init_coal()
17759 if (tg3_flag(tp, IS_5788)) in tg3_init_one()
17761 else if (tg3_flag(tp, 40BIT_DMA_BUG)) { in tg3_init_one()
17800 if (tg3_flag(tp, 5755_PLUS)) in tg3_init_one()
17808 if ((tg3_flag(tp, HW_TSO_1) || in tg3_init_one()
17809 tg3_flag(tp, HW_TSO_2) || in tg3_init_one()
17810 tg3_flag(tp, HW_TSO_3)) && in tg3_init_one()
17813 if (tg3_flag(tp, HW_TSO_2) || tg3_flag(tp, HW_TSO_3)) { in tg3_init_one()
17816 if (tg3_flag(tp, HW_TSO_3) || in tg3_init_one()
17835 !tg3_flag(tp, CPMU_PRESENT)) in tg3_init_one()
17847 !tg3_flag(tp, TSO_CAPABLE) && in tg3_init_one()
17883 if (!tg3_flag(tp, SUPPORT_MSIX)) in tg3_init_one()
17942 if (tg3_flag(tp, PTP_CAPABLE)) { in tg3_init_one()
17975 tg3_flag(tp, USE_LINKCHG_REG) != 0, in tg3_init_one()
17977 tg3_flag(tp, ENABLE_ASF) != 0, in tg3_init_one()
17978 tg3_flag(tp, TSO_CAPABLE) != 0); in tg3_init_one()
18025 if (tg3_flag(tp, USE_PHYLIB)) { in tg3_remove_one()