Lines Matching refs:grc_mode
3550 u32 grc_mode; in tg3_nvram_write_block() local
3560 grc_mode = tr32(GRC_MODE); in tg3_nvram_write_block()
3561 tw32(GRC_MODE, grc_mode | GRC_MODE_NVRAM_WR_ENABLE); in tg3_nvram_write_block()
3571 grc_mode = tr32(GRC_MODE); in tg3_nvram_write_block()
3572 tw32(GRC_MODE, grc_mode & ~GRC_MODE_NVRAM_WR_ENABLE); in tg3_nvram_write_block()
9263 tw32(GRC_MODE, tp->grc_mode); in tg3_chip_reset()
9944 u32 grc_mode = tr32(GRC_MODE); in tg3_reset_hw() local
9947 val = grc_mode & ~GRC_MODE_PCIE_PORT_MASK; in tg3_reset_hw()
9954 tw32(GRC_MODE, grc_mode); in tg3_reset_hw()
9959 u32 grc_mode = tr32(GRC_MODE); in tg3_reset_hw() local
9962 val = grc_mode & ~GRC_MODE_PCIE_PORT_MASK; in tg3_reset_hw()
9970 tw32(GRC_MODE, grc_mode); in tg3_reset_hw()
9974 u32 grc_mode; in tg3_reset_hw() local
9981 grc_mode = tr32(GRC_MODE); in tg3_reset_hw()
9984 val = grc_mode & ~GRC_MODE_PCIE_PORT_MASK; in tg3_reset_hw()
9993 tw32(GRC_MODE, grc_mode); in tg3_reset_hw()
10065 tp->grc_mode &= ~(GRC_MODE_HOST_SENDBDS | in tg3_reset_hw()
10069 tp->grc_mode |= GRC_MODE_HOST_SENDBDS; in tg3_reset_hw()
10077 tp->grc_mode |= GRC_MODE_NO_TX_PHDR_CSUM; in tg3_reset_hw()
10087 tw32(GRC_MODE, tp->grc_mode | val); in tg3_reset_hw()
16810 tp->grc_mode |= GRC_MODE_IRQ_ON_FLOW_ATTN; in tg3_get_invariants()
16833 tw32(GRC_MODE, val | tp->grc_mode); in tg3_get_invariants()
17697 tp->grc_mode = (GRC_MODE_WSWAP_DATA | GRC_MODE_BSWAP_DATA | in tg3_init_one()
17700 tp->grc_mode |= GRC_MODE_BSWAP_NONFRM_DATA; in tg3_init_one()