Lines Matching refs:TG3PCI_CLOCK_CTRL
1094 clock_ctrl = tr32(TG3PCI_CLOCK_CTRL); in tg3_switch_clocks()
1104 tw32_wait_f(TG3PCI_CLOCK_CTRL, in tg3_switch_clocks()
1108 tw32_wait_f(TG3PCI_CLOCK_CTRL, in tg3_switch_clocks()
1112 tw32_wait_f(TG3PCI_CLOCK_CTRL, in tg3_switch_clocks()
1116 tw32_wait_f(TG3PCI_CLOCK_CTRL, clock_ctrl, 40); in tg3_switch_clocks()
4203 tw32_wait_f(TG3PCI_CLOCK_CTRL, base_val | CLOCK_CTRL_ALTCLK | in tg3_power_down_prepare()
4226 tw32_wait_f(TG3PCI_CLOCK_CTRL, tp->pci_clock_ctrl | newbits1, in tg3_power_down_prepare()
4229 tw32_wait_f(TG3PCI_CLOCK_CTRL, tp->pci_clock_ctrl | newbits2, in tg3_power_down_prepare()
4244 tw32_wait_f(TG3PCI_CLOCK_CTRL, in tg3_power_down_prepare()
9276 tw32(TG3PCI_CLOCK_CTRL, tp->pci_clock_ctrl); in tg3_chip_reset()
10010 tw32_f(TG3PCI_CLOCK_CTRL, tp->pci_clock_ctrl); in tg3_reset_hw()
17323 u32 ccval = (tr32(TG3PCI_CLOCK_CTRL) & 0x1f); in tg3_test_dma()
17558 u32 clock_ctrl = tr32(TG3PCI_CLOCK_CTRL) & 0x1f; in tg3_bus_string()