Lines Matching refs:GRC_MODE
3560 grc_mode = tr32(GRC_MODE); in tg3_nvram_write_block()
3561 tw32(GRC_MODE, grc_mode | GRC_MODE_NVRAM_WR_ENABLE); in tg3_nvram_write_block()
3571 grc_mode = tr32(GRC_MODE); in tg3_nvram_write_block()
3572 tw32(GRC_MODE, grc_mode & ~GRC_MODE_NVRAM_WR_ENABLE); in tg3_nvram_write_block()
6451 tg3_rd32_loop(tp, regs, GRC_MODE, 0x4c); in tg3_dump_legacy_regs()
9263 tw32(GRC_MODE, tp->grc_mode); in tg3_chip_reset()
9944 u32 grc_mode = tr32(GRC_MODE); in tg3_reset_hw()
9948 tw32(GRC_MODE, val | GRC_MODE_PCIE_PL_SEL); in tg3_reset_hw()
9954 tw32(GRC_MODE, grc_mode); in tg3_reset_hw()
9959 u32 grc_mode = tr32(GRC_MODE); in tg3_reset_hw()
9963 tw32(GRC_MODE, val | GRC_MODE_PCIE_PL_SEL); in tg3_reset_hw()
9970 tw32(GRC_MODE, grc_mode); in tg3_reset_hw()
9981 grc_mode = tr32(GRC_MODE); in tg3_reset_hw()
9985 tw32(GRC_MODE, val | GRC_MODE_PCIE_DL_SEL); in tg3_reset_hw()
9993 tw32(GRC_MODE, grc_mode); in tg3_reset_hw()
10087 tw32(GRC_MODE, tp->grc_mode | val); in tg3_reset_hw()
16822 val = tr32(GRC_MODE); in tg3_get_invariants()
16833 tw32(GRC_MODE, val | tp->grc_mode); in tg3_get_invariants()