140 	ATL2_WRITE_REG(hw, REG_MAC_CTRL, rctl);  in atl2_set_multi()
143 	ATL2_WRITE_REG(hw, REG_RX_HASH_TABLE, 0);  in atl2_set_multi()
178 	ATL2_WRITE_REG(&adapter->hw, REG_ISR, 0xffffffff);  in atl2_configure()
185 	ATL2_WRITE_REG(hw, REG_MAC_STA_ADDR, value);  in atl2_configure()
188 	ATL2_WRITE_REG(hw, (REG_MAC_STA_ADDR+4), value);  in atl2_configure()
191 	ATL2_WRITE_REG(hw, REG_DESC_BASE_ADDR_HI,  in atl2_configure()
195 	ATL2_WRITE_REG(hw, REG_TXD_BASE_ADDR_LO,  in atl2_configure()
197 	ATL2_WRITE_REG(hw, REG_TXS_BASE_ADDR_LO,  in atl2_configure()
199 	ATL2_WRITE_REG(hw, REG_RXD_BASE_ADDR_LO,  in atl2_configure()
222 	ATL2_WRITE_REG(hw, REG_MAC_IPG_IFG, value);  in atl2_configure()
232 	ATL2_WRITE_REG(hw, REG_MAC_HALF_DUPLX_CTRL, value);  in atl2_configure()
236 	ATL2_WRITE_REG(hw, REG_MASTER_CTRL, MASTER_CTRL_ITIMER_EN);  in atl2_configure()
242 	ATL2_WRITE_REG(hw, REG_MTU, adapter->netdev->mtu +  in atl2_configure()
246 	ATL2_WRITE_REG(hw, REG_TX_CUT_THRESH, 0x177);  in atl2_configure()
267 	ATL2_WRITE_REG(&adapter->hw, REG_ISR, 0x3fffffff);  in atl2_configure()
268 	ATL2_WRITE_REG(&adapter->hw, REG_ISR, 0);  in atl2_configure()
334 	ATL2_WRITE_REG(&adapter->hw, REG_IMR, IMR_NORMAL_MASK);  in atl2_irq_enable()
344     ATL2_WRITE_REG(&adapter->hw, REG_IMR, 0);  in atl2_irq_disable()
370 	ATL2_WRITE_REG(&adapter->hw, REG_MAC_CTRL, ctrl);  in atl2_vlan_mode()
604 	ATL2_WRITE_REG(hw, REG_ISR, status | ISR_DIS_INT);  in atl2_intr()
609 			ATL2_WRITE_REG(hw, REG_ISR, 0);  in atl2_intr()
610 			ATL2_WRITE_REG(hw, REG_IMR, 0);  in atl2_intr()
619 		ATL2_WRITE_REG(hw, REG_ISR, 0);  in atl2_intr()
620 		ATL2_WRITE_REG(hw, REG_IMR, 0);  in atl2_intr()
641 	ATL2_WRITE_REG(&adapter->hw, REG_ISR, 0);  in atl2_intr()
729 	ATL2_WRITE_REG(&adapter->hw, REG_MASTER_CTRL,  in atl2_open()
916 	ATL2_WRITE_REG(hw, REG_MTU, new_mtu + ETH_HLEN +  in atl2_change_mtu()
1083 	ATL2_WRITE_REG(&adapter->hw, REG_MASTER_CTRL, val |  in atl2_up()
1147 	ATL2_WRITE_REG(hw, REG_MAC_CTRL, value);  in atl2_setup_mac_ctrl()
1167 			ATL2_WRITE_REG(hw, REG_MAC_CTRL, value);  in atl2_check_link()
1224 		ATL2_WRITE_REG(hw, REG_MAC_CTRL, value);  in atl2_check_link()
1542 		ATL2_WRITE_REG(hw, REG_WOL_CTRL, ctrl);  in atl2_suspend()
1559 		ATL2_WRITE_REG(hw, REG_MAC_CTRL, ctrl);  in atl2_suspend()
1564 		ATL2_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl);  in atl2_suspend()
1567 		ATL2_WRITE_REG(hw, REG_PCIE_DLL_TX_CTRL1, ctrl);  in atl2_suspend()
1576 		ATL2_WRITE_REG(hw, REG_WOL_CTRL, ctrl);  in atl2_suspend()
1577 		ATL2_WRITE_REG(hw, REG_MAC_CTRL, 0);  in atl2_suspend()
1582 		ATL2_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl);  in atl2_suspend()
1585 		ATL2_WRITE_REG(hw, REG_PCIE_DLL_TX_CTRL1, ctrl);  in atl2_suspend()
1596 	ATL2_WRITE_REG(hw, REG_WOL_CTRL, 0);  in atl2_suspend()
1601 	ATL2_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl);  in atl2_suspend()
1604 	ATL2_WRITE_REG(hw, REG_PCIE_DLL_TX_CTRL1, ctrl);  in atl2_suspend()
1646 	ATL2_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0);  in atl2_resume()
2126 	ATL2_WRITE_REG(hw, REG_MASTER_CTRL, MASTER_CTRL_SOFT_RST);  in atl2_reset_hw()
2164 	ATL2_WRITE_REG(hw, REG_SPI_DATA, 0);  in atl2_spi_read()
2165 	ATL2_WRITE_REG(hw, REG_SPI_ADDR, addr);  in atl2_spi_read()
2180 	ATL2_WRITE_REG(hw, REG_SPI_FLASH_CTRL, value);  in atl2_spi_read()
2184 	ATL2_WRITE_REG(hw, REG_SPI_FLASH_CTRL, value);  in atl2_spi_read()
2389     ATL2_WRITE_REG(hw, REG_LTSSM_TEST_MODE, value);  in atl2_init_pcie()
2392     ATL2_WRITE_REG(hw, REG_PCIE_DLL_TX_CTRL1, value);  in atl2_init_pcie()
2436 	ATL2_WRITE_REG(hw, REG_RX_HASH_TABLE, 0);  in atl2_init_hw()
2501 	ATL2_WRITE_REG(hw, REG_MDIO_CTRL, val);  in atl2_read_phy_reg()
2536 	ATL2_WRITE_REG(hw, REG_MDIO_CTRL, val);  in atl2_write_phy_reg()
2732 		ATL2_WRITE_REG(hw, REG_SPI_FLASH_CTRL, value);  in atl2_check_eeprom_exist()
2752 	ATL2_WRITE_REG(hw, REG_VPD_DATA, 0);  in atl2_read_eeprom()
2754 	ATL2_WRITE_REG(hw, REG_VPD_CAP, Control);  in atl2_read_eeprom()