464 struct alx_hw {  struct
501 static inline int alx_hw_revision(struct alx_hw *hw)  in alx_hw_revision()  argument
506 static inline bool alx_hw_with_cr(struct alx_hw *hw)  in alx_hw_with_cr()
511 static inline bool alx_hw_giga(struct alx_hw *hw)  in alx_hw_giga()
516 static inline void alx_write_mem8(struct alx_hw *hw, u32 reg, u8 val)  in alx_write_mem8()
521 static inline void alx_write_mem16(struct alx_hw *hw, u32 reg, u16 val)  in alx_write_mem16()
526 static inline u16 alx_read_mem16(struct alx_hw *hw, u32 reg)  in alx_read_mem16()
531 static inline void alx_write_mem32(struct alx_hw *hw, u32 reg, u32 val)  in alx_write_mem32()
536 static inline u32 alx_read_mem32(struct alx_hw *hw, u32 reg)  in alx_read_mem32()
541 static inline void alx_post_write(struct alx_hw *hw)  in alx_post_write()
546 int alx_get_perm_macaddr(struct alx_hw *hw, u8 *addr);
547 void alx_reset_phy(struct alx_hw *hw);
548 void alx_reset_pcie(struct alx_hw *hw);
549 void alx_enable_aspm(struct alx_hw *hw, bool l0s_en, bool l1_en);
550 int alx_setup_speed_duplex(struct alx_hw *hw, u32 ethadv, u8 flowctrl);
551 void alx_post_phy_link(struct alx_hw *hw);
552 int alx_read_phy_reg(struct alx_hw *hw, u16 reg, u16 *phy_data);
553 int alx_write_phy_reg(struct alx_hw *hw, u16 reg, u16 phy_data);
554 int alx_read_phy_ext(struct alx_hw *hw, u8 dev, u16 reg, u16 *pdata);
555 int alx_write_phy_ext(struct alx_hw *hw, u8 dev, u16 reg, u16 data);
556 int alx_read_phy_link(struct alx_hw *hw);
557 int alx_clear_phy_intr(struct alx_hw *hw);
558 void alx_cfg_mac_flowcontrol(struct alx_hw *hw, u8 fc);
559 void alx_start_mac(struct alx_hw *hw);
560 int alx_reset_mac(struct alx_hw *hw);
561 void alx_set_macaddr(struct alx_hw *hw, const u8 *addr);
562 bool alx_phy_configured(struct alx_hw *hw);
563 void alx_configure_basic(struct alx_hw *hw);
564 void alx_mask_msix(struct alx_hw *hw, int index, bool mask);
565 void alx_disable_rss(struct alx_hw *hw);
566 bool alx_get_phy_info(struct alx_hw *hw);
567 void alx_update_hw_stats(struct alx_hw *hw);