Lines Matching +full:nand +full:- +full:ecc +full:- +full:strength
1 // SPDX-License-Identifier: GPL-2.0+
6 * https://github.com/yuq/sunxi-nfc-mtd
9 * https://github.com/hno/Allwinner-Info
16 #include <linux/dma-mapping.h>
70 #define NFC_PAGE_SHIFT(x) (((x) < 10 ? 0 : (x) - 10) << 8)
107 #define NFC_ADR_NUM(x) (((x) - 1) << 16)
161 * struct sunxi_nand_chip_sel - stores information related to NAND Chip Select
163 * @cs: the NAND CS id used to communicate with a NAND Chip
164 * @rb: the Ready/Busy pin ID. -1 means no R/B pin connected to the NFC
172 * struct sunxi_nand_hw_ecc - stores information related to HW ECC support
174 * @mode: the sunxi ECC mode field deduced from ECC requirements
181 * struct sunxi_nand_chip - stores NAND chip device related information
183 * @node: used to store NAND chips into a list
184 * @nand: base NAND chip structure
185 * @clk_rate: clk_rate required for this NAND chip
186 * @timing_cfg: TIMING_CFG register value for this NAND chip
187 * @timing_ctl: TIMING_CTL register value for this NAND chip
188 * @nsels: number of CS lines required by the NAND chip
193 struct nand_chip nand; member
201 static inline struct sunxi_nand_chip *to_sunxi_nand(struct nand_chip *nand) in to_sunxi_nand() argument
203 return container_of(nand, struct sunxi_nand_chip, nand); in to_sunxi_nand()
207 * NAND Controller capabilities structure: stores NAND controller capabilities
222 * struct sunxi_nfc - stores sunxi NAND controller information
226 * @regs: NAND controller registers
227 * @ahb_clk: NAND controller AHB clock
228 * @mod_clk: NAND controller mod clock
229 * @reset: NAND controller reset line
231 * @clk_rate: NAND controller current clock rate
232 * @chips: a list containing all the NAND chips attached to this NAND
234 * @complete: a completion object used to wait for NAND controller events
235 * @dmac: the DMA channel attached to the NAND controller
260 u32 st = readl(nfc->regs + NFC_REG_ST); in sunxi_nfc_interrupt()
261 u32 ien = readl(nfc->regs + NFC_REG_INT); in sunxi_nfc_interrupt()
267 complete(&nfc->complete); in sunxi_nfc_interrupt()
269 writel(st & NFC_INT_MASK, nfc->regs + NFC_REG_ST); in sunxi_nfc_interrupt()
270 writel(~st & ien & NFC_INT_MASK, nfc->regs + NFC_REG_INT); in sunxi_nfc_interrupt()
281 return -EINVAL; in sunxi_nfc_wait_events()
287 init_completion(&nfc->complete); in sunxi_nfc_wait_events()
289 writel(events, nfc->regs + NFC_REG_INT); in sunxi_nfc_wait_events()
291 ret = wait_for_completion_timeout(&nfc->complete, in sunxi_nfc_wait_events()
294 ret = -ETIMEDOUT; in sunxi_nfc_wait_events()
298 writel(0, nfc->regs + NFC_REG_INT); in sunxi_nfc_wait_events()
302 ret = readl_poll_timeout(nfc->regs + NFC_REG_ST, status, in sunxi_nfc_wait_events()
307 writel(events & NFC_INT_MASK, nfc->regs + NFC_REG_ST); in sunxi_nfc_wait_events()
310 dev_err(nfc->dev, "wait interrupt timedout\n"); in sunxi_nfc_wait_events()
320 ret = readl_poll_timeout(nfc->regs + NFC_REG_ST, status, in sunxi_nfc_wait_cmd_fifo_empty()
324 dev_err(nfc->dev, "wait for empty cmd FIFO timedout\n"); in sunxi_nfc_wait_cmd_fifo_empty()
334 writel(0, nfc->regs + NFC_REG_ECC_CTL); in sunxi_nfc_rst()
335 writel(NFC_RESET, nfc->regs + NFC_REG_CTL); in sunxi_nfc_rst()
337 ret = readl_poll_timeout(nfc->regs + NFC_REG_CTL, ctl, in sunxi_nfc_rst()
341 dev_err(nfc->dev, "wait for NAND controller reset timedout\n"); in sunxi_nfc_rst()
362 ret = dma_map_sg(nfc->dev, sg, 1, ddir); in sunxi_nfc_dma_op_prepare()
364 return -ENOMEM; in sunxi_nfc_dma_op_prepare()
366 dmad = dmaengine_prep_slave_sg(nfc->dmac, sg, 1, tdir, DMA_CTRL_ACK); in sunxi_nfc_dma_op_prepare()
368 ret = -EINVAL; in sunxi_nfc_dma_op_prepare()
372 writel(readl(nfc->regs + NFC_REG_CTL) | NFC_RAM_METHOD, in sunxi_nfc_dma_op_prepare()
373 nfc->regs + NFC_REG_CTL); in sunxi_nfc_dma_op_prepare()
374 writel(nchunks, nfc->regs + NFC_REG_SECTOR_NUM); in sunxi_nfc_dma_op_prepare()
375 writel(chunksize, nfc->regs + NFC_REG_CNT); in sunxi_nfc_dma_op_prepare()
376 if (nfc->caps->extra_mbus_conf) in sunxi_nfc_dma_op_prepare()
377 writel(chunksize * nchunks, nfc->regs + NFC_REG_MDMA_CNT); in sunxi_nfc_dma_op_prepare()
388 writel(readl(nfc->regs + NFC_REG_CTL) & ~NFC_RAM_METHOD, in sunxi_nfc_dma_op_prepare()
389 nfc->regs + NFC_REG_CTL); in sunxi_nfc_dma_op_prepare()
392 dma_unmap_sg(nfc->dev, sg, 1, ddir); in sunxi_nfc_dma_op_prepare()
400 dma_unmap_sg(nfc->dev, sg, 1, ddir); in sunxi_nfc_dma_op_cleanup()
401 writel(readl(nfc->regs + NFC_REG_CTL) & ~NFC_RAM_METHOD, in sunxi_nfc_dma_op_cleanup()
402 nfc->regs + NFC_REG_CTL); in sunxi_nfc_dma_op_cleanup()
405 static void sunxi_nfc_select_chip(struct nand_chip *nand, unsigned int cs) in sunxi_nfc_select_chip() argument
407 struct mtd_info *mtd = nand_to_mtd(nand); in sunxi_nfc_select_chip()
408 struct sunxi_nand_chip *sunxi_nand = to_sunxi_nand(nand); in sunxi_nfc_select_chip()
409 struct sunxi_nfc *nfc = to_sunxi_nfc(sunxi_nand->nand.controller); in sunxi_nfc_select_chip()
413 if (cs > 0 && cs >= sunxi_nand->nsels) in sunxi_nfc_select_chip()
416 ctl = readl(nfc->regs + NFC_REG_CTL) & in sunxi_nfc_select_chip()
419 sel = &sunxi_nand->sels[cs]; in sunxi_nfc_select_chip()
420 ctl |= NFC_CE_SEL(sel->cs) | NFC_EN | NFC_PAGE_SHIFT(nand->page_shift); in sunxi_nfc_select_chip()
421 if (sel->rb >= 0) in sunxi_nfc_select_chip()
422 ctl |= NFC_RB_SEL(sel->rb); in sunxi_nfc_select_chip()
424 writel(mtd->writesize, nfc->regs + NFC_REG_SPARE_AREA); in sunxi_nfc_select_chip()
426 if (nfc->clk_rate != sunxi_nand->clk_rate) { in sunxi_nfc_select_chip()
427 clk_set_rate(nfc->mod_clk, sunxi_nand->clk_rate); in sunxi_nfc_select_chip()
428 nfc->clk_rate = sunxi_nand->clk_rate; in sunxi_nfc_select_chip()
431 writel(sunxi_nand->timing_ctl, nfc->regs + NFC_REG_TIMING_CTL); in sunxi_nfc_select_chip()
432 writel(sunxi_nand->timing_cfg, nfc->regs + NFC_REG_TIMING_CFG); in sunxi_nfc_select_chip()
433 writel(ctl, nfc->regs + NFC_REG_CTL); in sunxi_nfc_select_chip()
436 static void sunxi_nfc_read_buf(struct nand_chip *nand, uint8_t *buf, int len) in sunxi_nfc_read_buf() argument
438 struct sunxi_nand_chip *sunxi_nand = to_sunxi_nand(nand); in sunxi_nfc_read_buf()
439 struct sunxi_nfc *nfc = to_sunxi_nfc(sunxi_nand->nand.controller); in sunxi_nfc_read_buf()
448 cnt = min(len - offs, NFC_SRAM_SIZE); in sunxi_nfc_read_buf()
454 writel(cnt, nfc->regs + NFC_REG_CNT); in sunxi_nfc_read_buf()
456 writel(tmp, nfc->regs + NFC_REG_CMD); in sunxi_nfc_read_buf()
467 memcpy_fromio(buf + offs, nfc->regs + NFC_RAM0_BASE, in sunxi_nfc_read_buf()
473 static void sunxi_nfc_write_buf(struct nand_chip *nand, const uint8_t *buf, in sunxi_nfc_write_buf() argument
476 struct sunxi_nand_chip *sunxi_nand = to_sunxi_nand(nand); in sunxi_nfc_write_buf()
477 struct sunxi_nfc *nfc = to_sunxi_nfc(sunxi_nand->nand.controller); in sunxi_nfc_write_buf()
486 cnt = min(len - offs, NFC_SRAM_SIZE); in sunxi_nfc_write_buf()
492 writel(cnt, nfc->regs + NFC_REG_CNT); in sunxi_nfc_write_buf()
493 memcpy_toio(nfc->regs + NFC_RAM0_BASE, buf + offs, cnt); in sunxi_nfc_write_buf()
496 writel(tmp, nfc->regs + NFC_REG_CMD); in sunxi_nfc_write_buf()
585 while (count--) in sunxi_nfc_randomizer_step()
592 static u16 sunxi_nfc_randomizer_state(struct nand_chip *nand, int page, in sunxi_nfc_randomizer_state() argument
593 bool ecc) in sunxi_nfc_randomizer_state() argument
595 struct mtd_info *mtd = nand_to_mtd(nand); in sunxi_nfc_randomizer_state()
597 int mod = mtd_div_by_ws(mtd->erasesize, mtd); in sunxi_nfc_randomizer_state()
602 if (ecc) { in sunxi_nfc_randomizer_state()
603 if (mtd->ecc_step_size == 512) in sunxi_nfc_randomizer_state()
612 static void sunxi_nfc_randomizer_config(struct nand_chip *nand, int page, in sunxi_nfc_randomizer_config() argument
613 bool ecc) in sunxi_nfc_randomizer_config() argument
615 struct sunxi_nfc *nfc = to_sunxi_nfc(nand->controller); in sunxi_nfc_randomizer_config()
616 u32 ecc_ctl = readl(nfc->regs + NFC_REG_ECC_CTL); in sunxi_nfc_randomizer_config()
619 if (!(nand->options & NAND_NEED_SCRAMBLING)) in sunxi_nfc_randomizer_config()
622 ecc_ctl = readl(nfc->regs + NFC_REG_ECC_CTL); in sunxi_nfc_randomizer_config()
623 state = sunxi_nfc_randomizer_state(nand, page, ecc); in sunxi_nfc_randomizer_config()
624 ecc_ctl = readl(nfc->regs + NFC_REG_ECC_CTL) & ~NFC_RANDOM_SEED_MSK; in sunxi_nfc_randomizer_config()
625 writel(ecc_ctl | NFC_RANDOM_SEED(state), nfc->regs + NFC_REG_ECC_CTL); in sunxi_nfc_randomizer_config()
628 static void sunxi_nfc_randomizer_enable(struct nand_chip *nand) in sunxi_nfc_randomizer_enable() argument
630 struct sunxi_nfc *nfc = to_sunxi_nfc(nand->controller); in sunxi_nfc_randomizer_enable()
632 if (!(nand->options & NAND_NEED_SCRAMBLING)) in sunxi_nfc_randomizer_enable()
635 writel(readl(nfc->regs + NFC_REG_ECC_CTL) | NFC_RANDOM_EN, in sunxi_nfc_randomizer_enable()
636 nfc->regs + NFC_REG_ECC_CTL); in sunxi_nfc_randomizer_enable()
639 static void sunxi_nfc_randomizer_disable(struct nand_chip *nand) in sunxi_nfc_randomizer_disable() argument
641 struct sunxi_nfc *nfc = to_sunxi_nfc(nand->controller); in sunxi_nfc_randomizer_disable()
643 if (!(nand->options & NAND_NEED_SCRAMBLING)) in sunxi_nfc_randomizer_disable()
646 writel(readl(nfc->regs + NFC_REG_ECC_CTL) & ~NFC_RANDOM_EN, in sunxi_nfc_randomizer_disable()
647 nfc->regs + NFC_REG_ECC_CTL); in sunxi_nfc_randomizer_disable()
650 static void sunxi_nfc_randomize_bbm(struct nand_chip *nand, int page, u8 *bbm) in sunxi_nfc_randomize_bbm() argument
652 u16 state = sunxi_nfc_randomizer_state(nand, page, true); in sunxi_nfc_randomize_bbm()
658 static void sunxi_nfc_randomizer_write_buf(struct nand_chip *nand, in sunxi_nfc_randomizer_write_buf() argument
660 bool ecc, int page) in sunxi_nfc_randomizer_write_buf() argument
662 sunxi_nfc_randomizer_config(nand, page, ecc); in sunxi_nfc_randomizer_write_buf()
663 sunxi_nfc_randomizer_enable(nand); in sunxi_nfc_randomizer_write_buf()
664 sunxi_nfc_write_buf(nand, buf, len); in sunxi_nfc_randomizer_write_buf()
665 sunxi_nfc_randomizer_disable(nand); in sunxi_nfc_randomizer_write_buf()
668 static void sunxi_nfc_randomizer_read_buf(struct nand_chip *nand, uint8_t *buf, in sunxi_nfc_randomizer_read_buf() argument
669 int len, bool ecc, int page) in sunxi_nfc_randomizer_read_buf() argument
671 sunxi_nfc_randomizer_config(nand, page, ecc); in sunxi_nfc_randomizer_read_buf()
672 sunxi_nfc_randomizer_enable(nand); in sunxi_nfc_randomizer_read_buf()
673 sunxi_nfc_read_buf(nand, buf, len); in sunxi_nfc_randomizer_read_buf()
674 sunxi_nfc_randomizer_disable(nand); in sunxi_nfc_randomizer_read_buf()
677 static void sunxi_nfc_hw_ecc_enable(struct nand_chip *nand) in sunxi_nfc_hw_ecc_enable() argument
679 struct sunxi_nfc *nfc = to_sunxi_nfc(nand->controller); in sunxi_nfc_hw_ecc_enable()
680 struct sunxi_nand_hw_ecc *data = nand->ecc.priv; in sunxi_nfc_hw_ecc_enable()
683 ecc_ctl = readl(nfc->regs + NFC_REG_ECC_CTL); in sunxi_nfc_hw_ecc_enable()
686 ecc_ctl |= NFC_ECC_EN | NFC_ECC_MODE(data->mode) | NFC_ECC_EXCEPTION | in sunxi_nfc_hw_ecc_enable()
689 if (nand->ecc.size == 512) in sunxi_nfc_hw_ecc_enable()
692 writel(ecc_ctl, nfc->regs + NFC_REG_ECC_CTL); in sunxi_nfc_hw_ecc_enable()
695 static void sunxi_nfc_hw_ecc_disable(struct nand_chip *nand) in sunxi_nfc_hw_ecc_disable() argument
697 struct sunxi_nfc *nfc = to_sunxi_nfc(nand->controller); in sunxi_nfc_hw_ecc_disable()
699 writel(readl(nfc->regs + NFC_REG_ECC_CTL) & ~NFC_ECC_EN, in sunxi_nfc_hw_ecc_disable()
700 nfc->regs + NFC_REG_ECC_CTL); in sunxi_nfc_hw_ecc_disable()
716 static void sunxi_nfc_hw_ecc_get_prot_oob_bytes(struct nand_chip *nand, u8 *oob, in sunxi_nfc_hw_ecc_get_prot_oob_bytes() argument
719 struct sunxi_nfc *nfc = to_sunxi_nfc(nand->controller); in sunxi_nfc_hw_ecc_get_prot_oob_bytes()
721 sunxi_nfc_user_data_to_buf(readl(nfc->regs + NFC_REG_USER_DATA(step)), in sunxi_nfc_hw_ecc_get_prot_oob_bytes()
724 /* De-randomize the Bad Block Marker. */ in sunxi_nfc_hw_ecc_get_prot_oob_bytes()
725 if (bbm && (nand->options & NAND_NEED_SCRAMBLING)) in sunxi_nfc_hw_ecc_get_prot_oob_bytes()
726 sunxi_nfc_randomize_bbm(nand, page, oob); in sunxi_nfc_hw_ecc_get_prot_oob_bytes()
729 static void sunxi_nfc_hw_ecc_set_prot_oob_bytes(struct nand_chip *nand, in sunxi_nfc_hw_ecc_set_prot_oob_bytes() argument
733 struct sunxi_nfc *nfc = to_sunxi_nfc(nand->controller); in sunxi_nfc_hw_ecc_set_prot_oob_bytes()
737 if (bbm && (nand->options & NAND_NEED_SCRAMBLING)) { in sunxi_nfc_hw_ecc_set_prot_oob_bytes()
739 sunxi_nfc_randomize_bbm(nand, page, user_data); in sunxi_nfc_hw_ecc_set_prot_oob_bytes()
744 nfc->regs + NFC_REG_USER_DATA(step)); in sunxi_nfc_hw_ecc_set_prot_oob_bytes()
747 static void sunxi_nfc_hw_ecc_update_stats(struct nand_chip *nand, in sunxi_nfc_hw_ecc_update_stats() argument
750 struct mtd_info *mtd = nand_to_mtd(nand); in sunxi_nfc_hw_ecc_update_stats()
753 mtd->ecc_stats.failed++; in sunxi_nfc_hw_ecc_update_stats()
755 mtd->ecc_stats.corrected += ret; in sunxi_nfc_hw_ecc_update_stats()
760 static int sunxi_nfc_hw_ecc_correct(struct nand_chip *nand, u8 *data, u8 *oob, in sunxi_nfc_hw_ecc_correct() argument
763 struct sunxi_nfc *nfc = to_sunxi_nfc(nand->controller); in sunxi_nfc_hw_ecc_correct()
764 struct nand_ecc_ctrl *ecc = &nand->ecc; in sunxi_nfc_hw_ecc_correct() local
770 return -EBADMSG; in sunxi_nfc_hw_ecc_correct()
775 if (unlikely(!(readl(nfc->regs + NFC_REG_PAT_ID) & 0x1))) { in sunxi_nfc_hw_ecc_correct()
783 memset(data, pattern, ecc->size); in sunxi_nfc_hw_ecc_correct()
786 memset(oob, pattern, ecc->bytes + 4); in sunxi_nfc_hw_ecc_correct()
791 tmp = readl(nfc->regs + NFC_REG_ECC_ERR_CNT(step)); in sunxi_nfc_hw_ecc_correct()
796 static int sunxi_nfc_hw_ecc_read_chunk(struct nand_chip *nand, in sunxi_nfc_hw_ecc_read_chunk() argument
803 struct sunxi_nfc *nfc = to_sunxi_nfc(nand->controller); in sunxi_nfc_hw_ecc_read_chunk()
804 struct nand_ecc_ctrl *ecc = &nand->ecc; in sunxi_nfc_hw_ecc_read_chunk() local
810 nand_change_read_column_op(nand, data_off, NULL, 0, false); in sunxi_nfc_hw_ecc_read_chunk()
812 sunxi_nfc_randomizer_read_buf(nand, NULL, ecc->size, false, page); in sunxi_nfc_hw_ecc_read_chunk()
814 if (data_off + ecc->size != oob_off) in sunxi_nfc_hw_ecc_read_chunk()
815 nand_change_read_column_op(nand, oob_off, NULL, 0, false); in sunxi_nfc_hw_ecc_read_chunk()
821 sunxi_nfc_randomizer_enable(nand); in sunxi_nfc_hw_ecc_read_chunk()
823 nfc->regs + NFC_REG_CMD); in sunxi_nfc_hw_ecc_read_chunk()
826 sunxi_nfc_randomizer_disable(nand); in sunxi_nfc_hw_ecc_read_chunk()
830 *cur_off = oob_off + ecc->bytes + 4; in sunxi_nfc_hw_ecc_read_chunk()
832 ret = sunxi_nfc_hw_ecc_correct(nand, data, oob_required ? oob : NULL, 0, in sunxi_nfc_hw_ecc_read_chunk()
833 readl(nfc->regs + NFC_REG_ECC_ST), in sunxi_nfc_hw_ecc_read_chunk()
840 * Re-read the data with the randomizer disabled to identify in sunxi_nfc_hw_ecc_read_chunk()
843 if (nand->options & NAND_NEED_SCRAMBLING) in sunxi_nfc_hw_ecc_read_chunk()
844 nand_change_read_column_op(nand, data_off, data, in sunxi_nfc_hw_ecc_read_chunk()
845 ecc->size, false); in sunxi_nfc_hw_ecc_read_chunk()
847 memcpy_fromio(data, nfc->regs + NFC_RAM0_BASE, in sunxi_nfc_hw_ecc_read_chunk()
848 ecc->size); in sunxi_nfc_hw_ecc_read_chunk()
850 nand_change_read_column_op(nand, oob_off, oob, ecc->bytes + 4, in sunxi_nfc_hw_ecc_read_chunk()
853 ret = nand_check_erased_ecc_chunk(data, ecc->size, in sunxi_nfc_hw_ecc_read_chunk()
854 oob, ecc->bytes + 4, in sunxi_nfc_hw_ecc_read_chunk()
855 NULL, 0, ecc->strength); in sunxi_nfc_hw_ecc_read_chunk()
859 memcpy_fromio(data, nfc->regs + NFC_RAM0_BASE, ecc->size); in sunxi_nfc_hw_ecc_read_chunk()
862 nand_change_read_column_op(nand, oob_off, NULL, 0, in sunxi_nfc_hw_ecc_read_chunk()
864 sunxi_nfc_randomizer_read_buf(nand, oob, ecc->bytes + 4, in sunxi_nfc_hw_ecc_read_chunk()
867 sunxi_nfc_hw_ecc_get_prot_oob_bytes(nand, oob, 0, in sunxi_nfc_hw_ecc_read_chunk()
872 sunxi_nfc_hw_ecc_update_stats(nand, max_bitflips, ret); in sunxi_nfc_hw_ecc_read_chunk()
877 static void sunxi_nfc_hw_ecc_read_extra_oob(struct nand_chip *nand, in sunxi_nfc_hw_ecc_read_extra_oob() argument
881 struct mtd_info *mtd = nand_to_mtd(nand); in sunxi_nfc_hw_ecc_read_extra_oob()
882 struct nand_ecc_ctrl *ecc = &nand->ecc; in sunxi_nfc_hw_ecc_read_extra_oob() local
883 int offset = ((ecc->bytes + 4) * ecc->steps); in sunxi_nfc_hw_ecc_read_extra_oob()
884 int len = mtd->oobsize - offset; in sunxi_nfc_hw_ecc_read_extra_oob()
890 nand_change_read_column_op(nand, mtd->writesize, NULL, 0, in sunxi_nfc_hw_ecc_read_extra_oob()
894 sunxi_nfc_read_buf(nand, oob + offset, len); in sunxi_nfc_hw_ecc_read_extra_oob()
896 sunxi_nfc_randomizer_read_buf(nand, oob + offset, len, in sunxi_nfc_hw_ecc_read_extra_oob()
900 *cur_off = mtd->oobsize + mtd->writesize; in sunxi_nfc_hw_ecc_read_extra_oob()
903 static int sunxi_nfc_hw_ecc_read_chunks_dma(struct nand_chip *nand, uint8_t *buf, in sunxi_nfc_hw_ecc_read_chunks_dma() argument
907 bool randomized = nand->options & NAND_NEED_SCRAMBLING; in sunxi_nfc_hw_ecc_read_chunks_dma()
908 struct sunxi_nfc *nfc = to_sunxi_nfc(nand->controller); in sunxi_nfc_hw_ecc_read_chunks_dma()
909 struct mtd_info *mtd = nand_to_mtd(nand); in sunxi_nfc_hw_ecc_read_chunks_dma()
910 struct nand_ecc_ctrl *ecc = &nand->ecc; in sunxi_nfc_hw_ecc_read_chunks_dma() local
920 ret = sunxi_nfc_dma_op_prepare(nfc, buf, ecc->size, nchunks, in sunxi_nfc_hw_ecc_read_chunks_dma()
925 sunxi_nfc_hw_ecc_enable(nand); in sunxi_nfc_hw_ecc_read_chunks_dma()
926 sunxi_nfc_randomizer_config(nand, page, false); in sunxi_nfc_hw_ecc_read_chunks_dma()
927 sunxi_nfc_randomizer_enable(nand); in sunxi_nfc_hw_ecc_read_chunks_dma()
930 NAND_CMD_READSTART, nfc->regs + NFC_REG_RCMD_SET); in sunxi_nfc_hw_ecc_read_chunks_dma()
932 dma_async_issue_pending(nfc->dmac); in sunxi_nfc_hw_ecc_read_chunks_dma()
935 nfc->regs + NFC_REG_CMD); in sunxi_nfc_hw_ecc_read_chunks_dma()
939 dmaengine_terminate_all(nfc->dmac); in sunxi_nfc_hw_ecc_read_chunks_dma()
941 sunxi_nfc_randomizer_disable(nand); in sunxi_nfc_hw_ecc_read_chunks_dma()
942 sunxi_nfc_hw_ecc_disable(nand); in sunxi_nfc_hw_ecc_read_chunks_dma()
949 status = readl(nfc->regs + NFC_REG_ECC_ST); in sunxi_nfc_hw_ecc_read_chunks_dma()
952 int data_off = i * ecc->size; in sunxi_nfc_hw_ecc_read_chunks_dma()
953 int oob_off = i * (ecc->bytes + 4); in sunxi_nfc_hw_ecc_read_chunks_dma()
955 u8 *oob = nand->oob_poi + oob_off; in sunxi_nfc_hw_ecc_read_chunks_dma()
958 ret = sunxi_nfc_hw_ecc_correct(nand, randomized ? data : NULL, in sunxi_nfc_hw_ecc_read_chunks_dma()
962 /* ECC errors are handled in the second loop. */ in sunxi_nfc_hw_ecc_read_chunks_dma()
968 nand_change_read_column_op(nand, in sunxi_nfc_hw_ecc_read_chunks_dma()
969 mtd->writesize + oob_off, in sunxi_nfc_hw_ecc_read_chunks_dma()
970 oob, ecc->bytes + 4, false); in sunxi_nfc_hw_ecc_read_chunks_dma()
972 sunxi_nfc_hw_ecc_get_prot_oob_bytes(nand, oob, i, in sunxi_nfc_hw_ecc_read_chunks_dma()
979 sunxi_nfc_hw_ecc_update_stats(nand, &max_bitflips, ret); in sunxi_nfc_hw_ecc_read_chunks_dma()
984 int data_off = i * ecc->size; in sunxi_nfc_hw_ecc_read_chunks_dma()
985 int oob_off = i * (ecc->bytes + 4); in sunxi_nfc_hw_ecc_read_chunks_dma()
987 u8 *oob = nand->oob_poi + oob_off; in sunxi_nfc_hw_ecc_read_chunks_dma()
993 * Re-read the data with the randomizer disabled to in sunxi_nfc_hw_ecc_read_chunks_dma()
998 nand_change_read_column_op(nand, data_off, in sunxi_nfc_hw_ecc_read_chunks_dma()
999 data, ecc->size, in sunxi_nfc_hw_ecc_read_chunks_dma()
1003 nand_change_read_column_op(nand, in sunxi_nfc_hw_ecc_read_chunks_dma()
1004 mtd->writesize + oob_off, in sunxi_nfc_hw_ecc_read_chunks_dma()
1005 oob, ecc->bytes + 4, false); in sunxi_nfc_hw_ecc_read_chunks_dma()
1007 ret = nand_check_erased_ecc_chunk(data, ecc->size, in sunxi_nfc_hw_ecc_read_chunks_dma()
1008 oob, ecc->bytes + 4, in sunxi_nfc_hw_ecc_read_chunks_dma()
1010 ecc->strength); in sunxi_nfc_hw_ecc_read_chunks_dma()
1014 sunxi_nfc_hw_ecc_update_stats(nand, &max_bitflips, ret); in sunxi_nfc_hw_ecc_read_chunks_dma()
1019 sunxi_nfc_hw_ecc_read_extra_oob(nand, nand->oob_poi, in sunxi_nfc_hw_ecc_read_chunks_dma()
1026 static int sunxi_nfc_hw_ecc_write_chunk(struct nand_chip *nand, in sunxi_nfc_hw_ecc_write_chunk() argument
1032 struct sunxi_nfc *nfc = to_sunxi_nfc(nand->controller); in sunxi_nfc_hw_ecc_write_chunk()
1033 struct nand_ecc_ctrl *ecc = &nand->ecc; in sunxi_nfc_hw_ecc_write_chunk() local
1037 nand_change_write_column_op(nand, data_off, NULL, 0, false); in sunxi_nfc_hw_ecc_write_chunk()
1039 sunxi_nfc_randomizer_write_buf(nand, data, ecc->size, false, page); in sunxi_nfc_hw_ecc_write_chunk()
1041 if (data_off + ecc->size != oob_off) in sunxi_nfc_hw_ecc_write_chunk()
1042 nand_change_write_column_op(nand, oob_off, NULL, 0, false); in sunxi_nfc_hw_ecc_write_chunk()
1048 sunxi_nfc_randomizer_enable(nand); in sunxi_nfc_hw_ecc_write_chunk()
1049 sunxi_nfc_hw_ecc_set_prot_oob_bytes(nand, oob, 0, bbm, page); in sunxi_nfc_hw_ecc_write_chunk()
1053 nfc->regs + NFC_REG_CMD); in sunxi_nfc_hw_ecc_write_chunk()
1056 sunxi_nfc_randomizer_disable(nand); in sunxi_nfc_hw_ecc_write_chunk()
1060 *cur_off = oob_off + ecc->bytes + 4; in sunxi_nfc_hw_ecc_write_chunk()
1065 static void sunxi_nfc_hw_ecc_write_extra_oob(struct nand_chip *nand, in sunxi_nfc_hw_ecc_write_extra_oob() argument
1069 struct mtd_info *mtd = nand_to_mtd(nand); in sunxi_nfc_hw_ecc_write_extra_oob()
1070 struct nand_ecc_ctrl *ecc = &nand->ecc; in sunxi_nfc_hw_ecc_write_extra_oob() local
1071 int offset = ((ecc->bytes + 4) * ecc->steps); in sunxi_nfc_hw_ecc_write_extra_oob()
1072 int len = mtd->oobsize - offset; in sunxi_nfc_hw_ecc_write_extra_oob()
1078 nand_change_write_column_op(nand, offset + mtd->writesize, in sunxi_nfc_hw_ecc_write_extra_oob()
1081 sunxi_nfc_randomizer_write_buf(nand, oob + offset, len, false, page); in sunxi_nfc_hw_ecc_write_extra_oob()
1084 *cur_off = mtd->oobsize + mtd->writesize; in sunxi_nfc_hw_ecc_write_extra_oob()
1087 static int sunxi_nfc_hw_ecc_read_page(struct nand_chip *nand, uint8_t *buf, in sunxi_nfc_hw_ecc_read_page() argument
1090 struct mtd_info *mtd = nand_to_mtd(nand); in sunxi_nfc_hw_ecc_read_page()
1091 struct nand_ecc_ctrl *ecc = &nand->ecc; in sunxi_nfc_hw_ecc_read_page() local
1096 sunxi_nfc_select_chip(nand, nand->cur_cs); in sunxi_nfc_hw_ecc_read_page()
1098 nand_read_page_op(nand, page, 0, NULL, 0); in sunxi_nfc_hw_ecc_read_page()
1100 sunxi_nfc_hw_ecc_enable(nand); in sunxi_nfc_hw_ecc_read_page()
1102 for (i = 0; i < ecc->steps; i++) { in sunxi_nfc_hw_ecc_read_page()
1103 int data_off = i * ecc->size; in sunxi_nfc_hw_ecc_read_page()
1104 int oob_off = i * (ecc->bytes + 4); in sunxi_nfc_hw_ecc_read_page()
1106 u8 *oob = nand->oob_poi + oob_off; in sunxi_nfc_hw_ecc_read_page()
1108 ret = sunxi_nfc_hw_ecc_read_chunk(nand, data, data_off, oob, in sunxi_nfc_hw_ecc_read_page()
1109 oob_off + mtd->writesize, in sunxi_nfc_hw_ecc_read_page()
1119 sunxi_nfc_hw_ecc_read_extra_oob(nand, nand->oob_poi, &cur_off, in sunxi_nfc_hw_ecc_read_page()
1122 sunxi_nfc_hw_ecc_disable(nand); in sunxi_nfc_hw_ecc_read_page()
1127 static int sunxi_nfc_hw_ecc_read_page_dma(struct nand_chip *nand, u8 *buf, in sunxi_nfc_hw_ecc_read_page_dma() argument
1132 sunxi_nfc_select_chip(nand, nand->cur_cs); in sunxi_nfc_hw_ecc_read_page_dma()
1134 nand_read_page_op(nand, page, 0, NULL, 0); in sunxi_nfc_hw_ecc_read_page_dma()
1136 ret = sunxi_nfc_hw_ecc_read_chunks_dma(nand, buf, oob_required, page, in sunxi_nfc_hw_ecc_read_page_dma()
1137 nand->ecc.steps); in sunxi_nfc_hw_ecc_read_page_dma()
1142 return sunxi_nfc_hw_ecc_read_page(nand, buf, oob_required, page); in sunxi_nfc_hw_ecc_read_page_dma()
1145 static int sunxi_nfc_hw_ecc_read_subpage(struct nand_chip *nand, in sunxi_nfc_hw_ecc_read_subpage() argument
1149 struct mtd_info *mtd = nand_to_mtd(nand); in sunxi_nfc_hw_ecc_read_subpage()
1150 struct nand_ecc_ctrl *ecc = &nand->ecc; in sunxi_nfc_hw_ecc_read_subpage() local
1154 sunxi_nfc_select_chip(nand, nand->cur_cs); in sunxi_nfc_hw_ecc_read_subpage()
1156 nand_read_page_op(nand, page, 0, NULL, 0); in sunxi_nfc_hw_ecc_read_subpage()
1158 sunxi_nfc_hw_ecc_enable(nand); in sunxi_nfc_hw_ecc_read_subpage()
1160 for (i = data_offs / ecc->size; in sunxi_nfc_hw_ecc_read_subpage()
1161 i < DIV_ROUND_UP(data_offs + readlen, ecc->size); i++) { in sunxi_nfc_hw_ecc_read_subpage()
1162 int data_off = i * ecc->size; in sunxi_nfc_hw_ecc_read_subpage()
1163 int oob_off = i * (ecc->bytes + 4); in sunxi_nfc_hw_ecc_read_subpage()
1165 u8 *oob = nand->oob_poi + oob_off; in sunxi_nfc_hw_ecc_read_subpage()
1167 ret = sunxi_nfc_hw_ecc_read_chunk(nand, data, data_off, in sunxi_nfc_hw_ecc_read_subpage()
1169 oob_off + mtd->writesize, in sunxi_nfc_hw_ecc_read_subpage()
1176 sunxi_nfc_hw_ecc_disable(nand); in sunxi_nfc_hw_ecc_read_subpage()
1181 static int sunxi_nfc_hw_ecc_read_subpage_dma(struct nand_chip *nand, in sunxi_nfc_hw_ecc_read_subpage_dma() argument
1185 int nchunks = DIV_ROUND_UP(data_offs + readlen, nand->ecc.size); in sunxi_nfc_hw_ecc_read_subpage_dma()
1188 sunxi_nfc_select_chip(nand, nand->cur_cs); in sunxi_nfc_hw_ecc_read_subpage_dma()
1190 nand_read_page_op(nand, page, 0, NULL, 0); in sunxi_nfc_hw_ecc_read_subpage_dma()
1192 ret = sunxi_nfc_hw_ecc_read_chunks_dma(nand, buf, false, page, nchunks); in sunxi_nfc_hw_ecc_read_subpage_dma()
1197 return sunxi_nfc_hw_ecc_read_subpage(nand, data_offs, readlen, in sunxi_nfc_hw_ecc_read_subpage_dma()
1201 static int sunxi_nfc_hw_ecc_write_page(struct nand_chip *nand, in sunxi_nfc_hw_ecc_write_page() argument
1205 struct mtd_info *mtd = nand_to_mtd(nand); in sunxi_nfc_hw_ecc_write_page()
1206 struct nand_ecc_ctrl *ecc = &nand->ecc; in sunxi_nfc_hw_ecc_write_page() local
1209 sunxi_nfc_select_chip(nand, nand->cur_cs); in sunxi_nfc_hw_ecc_write_page()
1211 nand_prog_page_begin_op(nand, page, 0, NULL, 0); in sunxi_nfc_hw_ecc_write_page()
1213 sunxi_nfc_hw_ecc_enable(nand); in sunxi_nfc_hw_ecc_write_page()
1215 for (i = 0; i < ecc->steps; i++) { in sunxi_nfc_hw_ecc_write_page()
1216 int data_off = i * ecc->size; in sunxi_nfc_hw_ecc_write_page()
1217 int oob_off = i * (ecc->bytes + 4); in sunxi_nfc_hw_ecc_write_page()
1219 const u8 *oob = nand->oob_poi + oob_off; in sunxi_nfc_hw_ecc_write_page()
1221 ret = sunxi_nfc_hw_ecc_write_chunk(nand, data, data_off, oob, in sunxi_nfc_hw_ecc_write_page()
1222 oob_off + mtd->writesize, in sunxi_nfc_hw_ecc_write_page()
1228 if (oob_required || (nand->options & NAND_NEED_SCRAMBLING)) in sunxi_nfc_hw_ecc_write_page()
1229 sunxi_nfc_hw_ecc_write_extra_oob(nand, nand->oob_poi, in sunxi_nfc_hw_ecc_write_page()
1232 sunxi_nfc_hw_ecc_disable(nand); in sunxi_nfc_hw_ecc_write_page()
1234 return nand_prog_page_end_op(nand); in sunxi_nfc_hw_ecc_write_page()
1237 static int sunxi_nfc_hw_ecc_write_subpage(struct nand_chip *nand, in sunxi_nfc_hw_ecc_write_subpage() argument
1242 struct mtd_info *mtd = nand_to_mtd(nand); in sunxi_nfc_hw_ecc_write_subpage()
1243 struct nand_ecc_ctrl *ecc = &nand->ecc; in sunxi_nfc_hw_ecc_write_subpage() local
1246 sunxi_nfc_select_chip(nand, nand->cur_cs); in sunxi_nfc_hw_ecc_write_subpage()
1248 nand_prog_page_begin_op(nand, page, 0, NULL, 0); in sunxi_nfc_hw_ecc_write_subpage()
1250 sunxi_nfc_hw_ecc_enable(nand); in sunxi_nfc_hw_ecc_write_subpage()
1252 for (i = data_offs / ecc->size; in sunxi_nfc_hw_ecc_write_subpage()
1253 i < DIV_ROUND_UP(data_offs + data_len, ecc->size); i++) { in sunxi_nfc_hw_ecc_write_subpage()
1254 int data_off = i * ecc->size; in sunxi_nfc_hw_ecc_write_subpage()
1255 int oob_off = i * (ecc->bytes + 4); in sunxi_nfc_hw_ecc_write_subpage()
1257 const u8 *oob = nand->oob_poi + oob_off; in sunxi_nfc_hw_ecc_write_subpage()
1259 ret = sunxi_nfc_hw_ecc_write_chunk(nand, data, data_off, oob, in sunxi_nfc_hw_ecc_write_subpage()
1260 oob_off + mtd->writesize, in sunxi_nfc_hw_ecc_write_subpage()
1266 sunxi_nfc_hw_ecc_disable(nand); in sunxi_nfc_hw_ecc_write_subpage()
1268 return nand_prog_page_end_op(nand); in sunxi_nfc_hw_ecc_write_subpage()
1271 static int sunxi_nfc_hw_ecc_write_page_dma(struct nand_chip *nand, in sunxi_nfc_hw_ecc_write_page_dma() argument
1276 struct sunxi_nfc *nfc = to_sunxi_nfc(nand->controller); in sunxi_nfc_hw_ecc_write_page_dma()
1277 struct nand_ecc_ctrl *ecc = &nand->ecc; in sunxi_nfc_hw_ecc_write_page_dma() local
1281 sunxi_nfc_select_chip(nand, nand->cur_cs); in sunxi_nfc_hw_ecc_write_page_dma()
1287 ret = sunxi_nfc_dma_op_prepare(nfc, buf, ecc->size, ecc->steps, in sunxi_nfc_hw_ecc_write_page_dma()
1292 for (i = 0; i < ecc->steps; i++) { in sunxi_nfc_hw_ecc_write_page_dma()
1293 const u8 *oob = nand->oob_poi + (i * (ecc->bytes + 4)); in sunxi_nfc_hw_ecc_write_page_dma()
1295 sunxi_nfc_hw_ecc_set_prot_oob_bytes(nand, oob, i, !i, page); in sunxi_nfc_hw_ecc_write_page_dma()
1298 nand_prog_page_begin_op(nand, page, 0, NULL, 0); in sunxi_nfc_hw_ecc_write_page_dma()
1300 sunxi_nfc_hw_ecc_enable(nand); in sunxi_nfc_hw_ecc_write_page_dma()
1301 sunxi_nfc_randomizer_config(nand, page, false); in sunxi_nfc_hw_ecc_write_page_dma()
1302 sunxi_nfc_randomizer_enable(nand); in sunxi_nfc_hw_ecc_write_page_dma()
1305 nfc->regs + NFC_REG_WCMD_SET); in sunxi_nfc_hw_ecc_write_page_dma()
1307 dma_async_issue_pending(nfc->dmac); in sunxi_nfc_hw_ecc_write_page_dma()
1311 nfc->regs + NFC_REG_CMD); in sunxi_nfc_hw_ecc_write_page_dma()
1315 dmaengine_terminate_all(nfc->dmac); in sunxi_nfc_hw_ecc_write_page_dma()
1317 sunxi_nfc_randomizer_disable(nand); in sunxi_nfc_hw_ecc_write_page_dma()
1318 sunxi_nfc_hw_ecc_disable(nand); in sunxi_nfc_hw_ecc_write_page_dma()
1325 if (oob_required || (nand->options & NAND_NEED_SCRAMBLING)) in sunxi_nfc_hw_ecc_write_page_dma()
1327 sunxi_nfc_hw_ecc_write_extra_oob(nand, nand->oob_poi, in sunxi_nfc_hw_ecc_write_page_dma()
1330 return nand_prog_page_end_op(nand); in sunxi_nfc_hw_ecc_write_page_dma()
1333 return sunxi_nfc_hw_ecc_write_page(nand, buf, oob_required, page); in sunxi_nfc_hw_ecc_write_page_dma()
1336 static int sunxi_nfc_hw_ecc_read_oob(struct nand_chip *nand, int page) in sunxi_nfc_hw_ecc_read_oob() argument
1338 u8 *buf = nand_get_data_buf(nand); in sunxi_nfc_hw_ecc_read_oob()
1340 return nand->ecc.read_page(nand, buf, 1, page); in sunxi_nfc_hw_ecc_read_oob()
1343 static int sunxi_nfc_hw_ecc_write_oob(struct nand_chip *nand, int page) in sunxi_nfc_hw_ecc_write_oob() argument
1345 struct mtd_info *mtd = nand_to_mtd(nand); in sunxi_nfc_hw_ecc_write_oob()
1346 u8 *buf = nand_get_data_buf(nand); in sunxi_nfc_hw_ecc_write_oob()
1349 memset(buf, 0xff, mtd->writesize); in sunxi_nfc_hw_ecc_write_oob()
1350 ret = nand->ecc.write_page(nand, buf, 1, page); in sunxi_nfc_hw_ecc_write_oob()
1355 return nand_prog_page_end_op(nand); in sunxi_nfc_hw_ecc_write_oob()
1373 return -EINVAL; in _sunxi_nand_lookup_timing()
1379 static int sunxi_nfc_setup_data_interface(struct nand_chip *nand, int csline, in sunxi_nfc_setup_data_interface() argument
1382 struct sunxi_nand_chip *sunxi_nand = to_sunxi_nand(nand); in sunxi_nfc_setup_data_interface()
1383 struct sunxi_nfc *nfc = to_sunxi_nfc(sunxi_nand->nand.controller); in sunxi_nfc_setup_data_interface()
1391 return -ENOTSUPP; in sunxi_nfc_setup_data_interface()
1394 if (timings->tCLS_min > min_clk_period) in sunxi_nfc_setup_data_interface()
1395 min_clk_period = timings->tCLS_min; in sunxi_nfc_setup_data_interface()
1398 if (timings->tCLH_min > min_clk_period) in sunxi_nfc_setup_data_interface()
1399 min_clk_period = timings->tCLH_min; in sunxi_nfc_setup_data_interface()
1402 if (timings->tCS_min > min_clk_period) in sunxi_nfc_setup_data_interface()
1403 min_clk_period = timings->tCS_min; in sunxi_nfc_setup_data_interface()
1406 if (timings->tCH_min > min_clk_period) in sunxi_nfc_setup_data_interface()
1407 min_clk_period = timings->tCH_min; in sunxi_nfc_setup_data_interface()
1410 if (timings->tWP_min > min_clk_period) in sunxi_nfc_setup_data_interface()
1411 min_clk_period = timings->tWP_min; in sunxi_nfc_setup_data_interface()
1414 if (timings->tWH_min > min_clk_period) in sunxi_nfc_setup_data_interface()
1415 min_clk_period = timings->tWH_min; in sunxi_nfc_setup_data_interface()
1418 if (timings->tALS_min > min_clk_period) in sunxi_nfc_setup_data_interface()
1419 min_clk_period = timings->tALS_min; in sunxi_nfc_setup_data_interface()
1422 if (timings->tDS_min > min_clk_period) in sunxi_nfc_setup_data_interface()
1423 min_clk_period = timings->tDS_min; in sunxi_nfc_setup_data_interface()
1426 if (timings->tDH_min > min_clk_period) in sunxi_nfc_setup_data_interface()
1427 min_clk_period = timings->tDH_min; in sunxi_nfc_setup_data_interface()
1430 if (timings->tRR_min > (min_clk_period * 3)) in sunxi_nfc_setup_data_interface()
1431 min_clk_period = DIV_ROUND_UP(timings->tRR_min, 3); in sunxi_nfc_setup_data_interface()
1434 if (timings->tALH_min > min_clk_period) in sunxi_nfc_setup_data_interface()
1435 min_clk_period = timings->tALH_min; in sunxi_nfc_setup_data_interface()
1438 if (timings->tRP_min > min_clk_period) in sunxi_nfc_setup_data_interface()
1439 min_clk_period = timings->tRP_min; in sunxi_nfc_setup_data_interface()
1442 if (timings->tREH_min > min_clk_period) in sunxi_nfc_setup_data_interface()
1443 min_clk_period = timings->tREH_min; in sunxi_nfc_setup_data_interface()
1446 if (timings->tRC_min > (min_clk_period * 2)) in sunxi_nfc_setup_data_interface()
1447 min_clk_period = DIV_ROUND_UP(timings->tRC_min, 2); in sunxi_nfc_setup_data_interface()
1450 if (timings->tWC_min > (min_clk_period * 2)) in sunxi_nfc_setup_data_interface()
1451 min_clk_period = DIV_ROUND_UP(timings->tWC_min, 2); in sunxi_nfc_setup_data_interface()
1453 /* T16 - T19 + tCAD */ in sunxi_nfc_setup_data_interface()
1454 if (timings->tWB_max > (min_clk_period * 20)) in sunxi_nfc_setup_data_interface()
1455 min_clk_period = DIV_ROUND_UP(timings->tWB_max, 20); in sunxi_nfc_setup_data_interface()
1457 if (timings->tADL_min > (min_clk_period * 32)) in sunxi_nfc_setup_data_interface()
1458 min_clk_period = DIV_ROUND_UP(timings->tADL_min, 32); in sunxi_nfc_setup_data_interface()
1460 if (timings->tWHR_min > (min_clk_period * 32)) in sunxi_nfc_setup_data_interface()
1461 min_clk_period = DIV_ROUND_UP(timings->tWHR_min, 32); in sunxi_nfc_setup_data_interface()
1463 if (timings->tRHW_min > (min_clk_period * 20)) in sunxi_nfc_setup_data_interface()
1464 min_clk_period = DIV_ROUND_UP(timings->tRHW_min, 20); in sunxi_nfc_setup_data_interface()
1467 * In non-EDO, tREA should be less than tRP to guarantee that the in sunxi_nfc_setup_data_interface()
1469 * the sunxi NAND controller does not allow us to have different in sunxi_nfc_setup_data_interface()
1475 * 2/ Use EDO mode (only works if timings->tRLOH > 0) in sunxi_nfc_setup_data_interface()
1477 if (timings->tREA_max > min_clk_period && !timings->tRLOH_min) in sunxi_nfc_setup_data_interface()
1478 min_clk_period = timings->tREA_max; in sunxi_nfc_setup_data_interface()
1480 tWB = sunxi_nand_lookup_timing(tWB_lut, timings->tWB_max, in sunxi_nfc_setup_data_interface()
1483 dev_err(nfc->dev, "unsupported tWB\n"); in sunxi_nfc_setup_data_interface()
1487 tADL = DIV_ROUND_UP(timings->tADL_min, min_clk_period) >> 3; in sunxi_nfc_setup_data_interface()
1489 dev_err(nfc->dev, "unsupported tADL\n"); in sunxi_nfc_setup_data_interface()
1490 return -EINVAL; in sunxi_nfc_setup_data_interface()
1493 tWHR = DIV_ROUND_UP(timings->tWHR_min, min_clk_period) >> 3; in sunxi_nfc_setup_data_interface()
1495 dev_err(nfc->dev, "unsupported tWHR\n"); in sunxi_nfc_setup_data_interface()
1496 return -EINVAL; in sunxi_nfc_setup_data_interface()
1499 tRHW = sunxi_nand_lookup_timing(tRHW_lut, timings->tRHW_min, in sunxi_nfc_setup_data_interface()
1502 dev_err(nfc->dev, "unsupported tRHW\n"); in sunxi_nfc_setup_data_interface()
1510 * TODO: according to ONFI specs this value only applies for DDR NAND, in sunxi_nfc_setup_data_interface()
1516 sunxi_nand->timing_cfg = NFC_TIMING_CFG(tWB, tADL, tWHR, tRHW, tCAD); in sunxi_nfc_setup_data_interface()
1527 sunxi_nand->clk_rate = NSEC_PER_SEC / min_clk_period; in sunxi_nfc_setup_data_interface()
1528 real_clk_rate = clk_round_rate(nfc->mod_clk, sunxi_nand->clk_rate); in sunxi_nfc_setup_data_interface()
1530 dev_err(nfc->dev, "Unable to round clk %lu\n", in sunxi_nfc_setup_data_interface()
1531 sunxi_nand->clk_rate); in sunxi_nfc_setup_data_interface()
1532 return -EINVAL; in sunxi_nfc_setup_data_interface()
1535 sunxi_nand->timing_ctl = 0; in sunxi_nfc_setup_data_interface()
1543 if (min_clk_period * 2 < 30 || min_clk_period * 1000 < timings->tREA_max) in sunxi_nfc_setup_data_interface()
1544 sunxi_nand->timing_ctl = NFC_TIMING_CTL_EDO; in sunxi_nfc_setup_data_interface()
1552 struct nand_chip *nand = mtd_to_nand(mtd); in sunxi_nand_ooblayout_ecc() local
1553 struct nand_ecc_ctrl *ecc = &nand->ecc; in sunxi_nand_ooblayout_ecc() local
1555 if (section >= ecc->steps) in sunxi_nand_ooblayout_ecc()
1556 return -ERANGE; in sunxi_nand_ooblayout_ecc()
1558 oobregion->offset = section * (ecc->bytes + 4) + 4; in sunxi_nand_ooblayout_ecc()
1559 oobregion->length = ecc->bytes; in sunxi_nand_ooblayout_ecc()
1567 struct nand_chip *nand = mtd_to_nand(mtd); in sunxi_nand_ooblayout_free() local
1568 struct nand_ecc_ctrl *ecc = &nand->ecc; in sunxi_nand_ooblayout_free() local
1570 if (section > ecc->steps) in sunxi_nand_ooblayout_free()
1571 return -ERANGE; in sunxi_nand_ooblayout_free()
1578 if (!section && ecc->mode == NAND_ECC_HW) { in sunxi_nand_ooblayout_free()
1579 oobregion->offset = 2; in sunxi_nand_ooblayout_free()
1580 oobregion->length = 2; in sunxi_nand_ooblayout_free()
1585 oobregion->offset = section * (ecc->bytes + 4); in sunxi_nand_ooblayout_free()
1587 if (section < ecc->steps) in sunxi_nand_ooblayout_free()
1588 oobregion->length = 4; in sunxi_nand_ooblayout_free()
1590 oobregion->offset = mtd->oobsize - oobregion->offset; in sunxi_nand_ooblayout_free()
1596 .ecc = sunxi_nand_ooblayout_ecc,
1600 static void sunxi_nand_hw_ecc_ctrl_cleanup(struct nand_ecc_ctrl *ecc) in sunxi_nand_hw_ecc_ctrl_cleanup() argument
1602 kfree(ecc->priv); in sunxi_nand_hw_ecc_ctrl_cleanup()
1605 static int sunxi_nand_hw_ecc_ctrl_init(struct nand_chip *nand, in sunxi_nand_hw_ecc_ctrl_init() argument
1606 struct nand_ecc_ctrl *ecc, in sunxi_nand_hw_ecc_ctrl_init() argument
1610 struct sunxi_nfc *nfc = to_sunxi_nfc(nand->controller); in sunxi_nand_hw_ecc_ctrl_init()
1611 struct mtd_info *mtd = nand_to_mtd(nand); in sunxi_nand_hw_ecc_ctrl_init()
1617 if (ecc->options & NAND_ECC_MAXIMIZE) { in sunxi_nand_hw_ecc_ctrl_init()
1620 ecc->size = 1024; in sunxi_nand_hw_ecc_ctrl_init()
1621 nsectors = mtd->writesize / ecc->size; in sunxi_nand_hw_ecc_ctrl_init()
1624 bytes = (mtd->oobsize - 2) / nsectors; in sunxi_nand_hw_ecc_ctrl_init()
1626 /* 4 non-ECC bytes are added before each ECC bytes section */ in sunxi_nand_hw_ecc_ctrl_init()
1627 bytes -= 4; in sunxi_nand_hw_ecc_ctrl_init()
1631 bytes--; in sunxi_nand_hw_ecc_ctrl_init()
1633 ecc->strength = bytes * 8 / fls(8 * ecc->size); in sunxi_nand_hw_ecc_ctrl_init()
1636 if (strengths[i] > ecc->strength) in sunxi_nand_hw_ecc_ctrl_init()
1641 ecc->strength = 0; in sunxi_nand_hw_ecc_ctrl_init()
1643 ecc->strength = strengths[i - 1]; in sunxi_nand_hw_ecc_ctrl_init()
1646 if (ecc->size != 512 && ecc->size != 1024) in sunxi_nand_hw_ecc_ctrl_init()
1647 return -EINVAL; in sunxi_nand_hw_ecc_ctrl_init()
1651 return -ENOMEM; in sunxi_nand_hw_ecc_ctrl_init()
1653 /* Prefer 1k ECC chunk over 512 ones */ in sunxi_nand_hw_ecc_ctrl_init()
1654 if (ecc->size == 512 && mtd->writesize > 512) { in sunxi_nand_hw_ecc_ctrl_init()
1655 ecc->size = 1024; in sunxi_nand_hw_ecc_ctrl_init()
1656 ecc->strength *= 2; in sunxi_nand_hw_ecc_ctrl_init()
1659 /* Add ECC info retrieval from DT */ in sunxi_nand_hw_ecc_ctrl_init()
1661 if (ecc->strength <= strengths[i]) { in sunxi_nand_hw_ecc_ctrl_init()
1663 * Update ecc->strength value with the actual strength in sunxi_nand_hw_ecc_ctrl_init()
1664 * that will be used by the ECC engine. in sunxi_nand_hw_ecc_ctrl_init()
1666 ecc->strength = strengths[i]; in sunxi_nand_hw_ecc_ctrl_init()
1672 dev_err(nfc->dev, "unsupported strength\n"); in sunxi_nand_hw_ecc_ctrl_init()
1673 ret = -ENOTSUPP; in sunxi_nand_hw_ecc_ctrl_init()
1677 data->mode = i; in sunxi_nand_hw_ecc_ctrl_init()
1679 /* HW ECC always request ECC bytes for 1024 bytes blocks */ in sunxi_nand_hw_ecc_ctrl_init()
1680 ecc->bytes = DIV_ROUND_UP(ecc->strength * fls(8 * 1024), 8); in sunxi_nand_hw_ecc_ctrl_init()
1682 /* HW ECC always work with even numbers of ECC bytes */ in sunxi_nand_hw_ecc_ctrl_init()
1683 ecc->bytes = ALIGN(ecc->bytes, 2); in sunxi_nand_hw_ecc_ctrl_init()
1685 nsectors = mtd->writesize / ecc->size; in sunxi_nand_hw_ecc_ctrl_init()
1687 if (mtd->oobsize < ((ecc->bytes + 4) * nsectors)) { in sunxi_nand_hw_ecc_ctrl_init()
1688 ret = -EINVAL; in sunxi_nand_hw_ecc_ctrl_init()
1692 ecc->read_oob = sunxi_nfc_hw_ecc_read_oob; in sunxi_nand_hw_ecc_ctrl_init()
1693 ecc->write_oob = sunxi_nfc_hw_ecc_write_oob; in sunxi_nand_hw_ecc_ctrl_init()
1695 ecc->priv = data; in sunxi_nand_hw_ecc_ctrl_init()
1697 if (nfc->dmac) { in sunxi_nand_hw_ecc_ctrl_init()
1698 ecc->read_page = sunxi_nfc_hw_ecc_read_page_dma; in sunxi_nand_hw_ecc_ctrl_init()
1699 ecc->read_subpage = sunxi_nfc_hw_ecc_read_subpage_dma; in sunxi_nand_hw_ecc_ctrl_init()
1700 ecc->write_page = sunxi_nfc_hw_ecc_write_page_dma; in sunxi_nand_hw_ecc_ctrl_init()
1701 nand->options |= NAND_USE_BOUNCE_BUFFER; in sunxi_nand_hw_ecc_ctrl_init()
1703 ecc->read_page = sunxi_nfc_hw_ecc_read_page; in sunxi_nand_hw_ecc_ctrl_init()
1704 ecc->read_subpage = sunxi_nfc_hw_ecc_read_subpage; in sunxi_nand_hw_ecc_ctrl_init()
1705 ecc->write_page = sunxi_nfc_hw_ecc_write_page; in sunxi_nand_hw_ecc_ctrl_init()
1709 ecc->write_subpage = sunxi_nfc_hw_ecc_write_subpage; in sunxi_nand_hw_ecc_ctrl_init()
1710 ecc->read_oob_raw = nand_read_oob_std; in sunxi_nand_hw_ecc_ctrl_init()
1711 ecc->write_oob_raw = nand_write_oob_std; in sunxi_nand_hw_ecc_ctrl_init()
1721 static void sunxi_nand_ecc_cleanup(struct nand_ecc_ctrl *ecc) in sunxi_nand_ecc_cleanup() argument
1723 switch (ecc->mode) { in sunxi_nand_ecc_cleanup()
1725 sunxi_nand_hw_ecc_ctrl_cleanup(ecc); in sunxi_nand_ecc_cleanup()
1733 static int sunxi_nand_attach_chip(struct nand_chip *nand) in sunxi_nand_attach_chip() argument
1735 struct nand_ecc_ctrl *ecc = &nand->ecc; in sunxi_nand_attach_chip() local
1736 struct device_node *np = nand_get_flash_node(nand); in sunxi_nand_attach_chip()
1739 if (nand->bbt_options & NAND_BBT_USE_FLASH) in sunxi_nand_attach_chip()
1740 nand->bbt_options |= NAND_BBT_NO_OOB; in sunxi_nand_attach_chip()
1742 if (nand->options & NAND_NEED_SCRAMBLING) in sunxi_nand_attach_chip()
1743 nand->options |= NAND_NO_SUBPAGE_WRITE; in sunxi_nand_attach_chip()
1745 nand->options |= NAND_SUBPAGE_READ; in sunxi_nand_attach_chip()
1747 if (!ecc->size) { in sunxi_nand_attach_chip()
1748 ecc->size = nand->base.eccreq.step_size; in sunxi_nand_attach_chip()
1749 ecc->strength = nand->base.eccreq.strength; in sunxi_nand_attach_chip()
1752 if (!ecc->size || !ecc->strength) in sunxi_nand_attach_chip()
1753 return -EINVAL; in sunxi_nand_attach_chip()
1755 switch (ecc->mode) { in sunxi_nand_attach_chip()
1757 ret = sunxi_nand_hw_ecc_ctrl_init(nand, ecc, np); in sunxi_nand_attach_chip()
1765 return -EINVAL; in sunxi_nand_attach_chip()
1771 static int sunxi_nfc_exec_subop(struct nand_chip *nand, in sunxi_nfc_exec_subop() argument
1774 struct sunxi_nfc *nfc = to_sunxi_nfc(nand->controller); in sunxi_nfc_exec_subop()
1780 for (i = 0; i < subop->ninstrs; i++) { in sunxi_nfc_exec_subop()
1781 const struct nand_op_instr *instr = &subop->instrs[i]; in sunxi_nfc_exec_subop()
1783 switch (instr->type) { in sunxi_nfc_exec_subop()
1787 return -EINVAL; in sunxi_nfc_exec_subop()
1790 extcmd |= instr->ctx.cmd.opcode; in sunxi_nfc_exec_subop()
1793 NFC_CMD(instr->ctx.cmd.opcode); in sunxi_nfc_exec_subop()
1801 u32 addr = instr->ctx.addr.addrs[j + start]; in sunxi_nfc_exec_subop()
1818 if (instr->type == NAND_OP_DATA_OUT_INSTR) { in sunxi_nfc_exec_subop()
1820 memcpy_toio(nfc->regs + NFC_RAM0_BASE, in sunxi_nfc_exec_subop()
1821 instr->ctx.data.buf.out + start, in sunxi_nfc_exec_subop()
1824 inbuf = instr->ctx.data.buf.in + start; in sunxi_nfc_exec_subop()
1840 writel(addrs[0], nfc->regs + NFC_REG_ADDR_LOW); in sunxi_nfc_exec_subop()
1841 writel(addrs[1], nfc->regs + NFC_REG_ADDR_HIGH); in sunxi_nfc_exec_subop()
1846 nfc->regs + in sunxi_nfc_exec_subop()
1851 writel(cnt, nfc->regs + NFC_REG_CNT); in sunxi_nfc_exec_subop()
1853 writel(cmd, nfc->regs + NFC_REG_CMD); in sunxi_nfc_exec_subop()
1862 memcpy_fromio(inbuf, nfc->regs + NFC_RAM0_BASE, cnt); in sunxi_nfc_exec_subop()
1867 static int sunxi_nfc_soft_waitrdy(struct nand_chip *nand, in sunxi_nfc_soft_waitrdy() argument
1870 return nand_soft_waitrdy(nand, in sunxi_nfc_soft_waitrdy()
1871 subop->instrs[0].ctx.waitrdy.timeout_ms); in sunxi_nfc_soft_waitrdy()
1904 static int sunxi_nfc_exec_op(struct nand_chip *nand, in sunxi_nfc_exec_op() argument
1907 struct sunxi_nand_chip *sunxi_nand = to_sunxi_nand(nand); in sunxi_nfc_exec_op()
1910 sunxi_nfc_select_chip(nand, op->cs); in sunxi_nfc_exec_op()
1912 if (sunxi_nand->sels[op->cs].rb >= 0) in sunxi_nfc_exec_op()
1917 return nand_op_parser_exec_op(nand, parser, op, check_only); in sunxi_nfc_exec_op()
1931 struct nand_chip *nand; in sunxi_nand_chip_init() local
1938 return -EINVAL; in sunxi_nand_chip_init()
1943 return -EINVAL; in sunxi_nand_chip_init()
1950 return -ENOMEM; in sunxi_nand_chip_init()
1953 sunxi_nand->nsels = nsels; in sunxi_nand_chip_init()
1967 return -EINVAL; in sunxi_nand_chip_init()
1970 if (test_and_set_bit(tmp, &nfc->assigned_cs)) { in sunxi_nand_chip_init()
1972 return -EINVAL; in sunxi_nand_chip_init()
1975 sunxi_nand->sels[i].cs = tmp; in sunxi_nand_chip_init()
1979 sunxi_nand->sels[i].rb = tmp; in sunxi_nand_chip_init()
1981 sunxi_nand->sels[i].rb = -1; in sunxi_nand_chip_init()
1984 nand = &sunxi_nand->nand; in sunxi_nand_chip_init()
1986 nand->controller = &nfc->controller; in sunxi_nand_chip_init()
1987 nand->controller->ops = &sunxi_nand_controller_ops; in sunxi_nand_chip_init()
1990 * Set the ECC mode to the default value in case nothing is specified in sunxi_nand_chip_init()
1993 nand->ecc.mode = NAND_ECC_HW; in sunxi_nand_chip_init()
1994 nand_set_flash_node(nand, np); in sunxi_nand_chip_init()
1996 mtd = nand_to_mtd(nand); in sunxi_nand_chip_init()
1997 mtd->dev.parent = dev; in sunxi_nand_chip_init()
1999 ret = nand_scan(nand, nsels); in sunxi_nand_chip_init()
2006 nand_release(nand); in sunxi_nand_chip_init()
2010 list_add_tail(&sunxi_nand->node, &nfc->chips); in sunxi_nand_chip_init()
2017 struct device_node *np = dev->of_node; in sunxi_nand_chips_init()
2023 dev_err(dev, "too many NAND chips: %d (max = 8)\n", nchips); in sunxi_nand_chips_init()
2024 return -EINVAL; in sunxi_nand_chips_init()
2042 while (!list_empty(&nfc->chips)) { in sunxi_nand_chips_cleanup()
2043 sunxi_nand = list_first_entry(&nfc->chips, in sunxi_nand_chips_cleanup()
2046 nand_release(&sunxi_nand->nand); in sunxi_nand_chips_cleanup()
2047 sunxi_nand_ecc_cleanup(&sunxi_nand->nand.ecc); in sunxi_nand_chips_cleanup()
2048 list_del(&sunxi_nand->node); in sunxi_nand_chips_cleanup()
2054 struct device *dev = &pdev->dev; in sunxi_nfc_probe()
2062 return -ENOMEM; in sunxi_nfc_probe()
2064 nfc->dev = dev; in sunxi_nfc_probe()
2065 nand_controller_init(&nfc->controller); in sunxi_nfc_probe()
2066 INIT_LIST_HEAD(&nfc->chips); in sunxi_nfc_probe()
2069 nfc->regs = devm_ioremap_resource(dev, r); in sunxi_nfc_probe()
2070 if (IS_ERR(nfc->regs)) in sunxi_nfc_probe()
2071 return PTR_ERR(nfc->regs); in sunxi_nfc_probe()
2079 nfc->ahb_clk = devm_clk_get(dev, "ahb"); in sunxi_nfc_probe()
2080 if (IS_ERR(nfc->ahb_clk)) { in sunxi_nfc_probe()
2082 return PTR_ERR(nfc->ahb_clk); in sunxi_nfc_probe()
2085 ret = clk_prepare_enable(nfc->ahb_clk); in sunxi_nfc_probe()
2089 nfc->mod_clk = devm_clk_get(dev, "mod"); in sunxi_nfc_probe()
2090 if (IS_ERR(nfc->mod_clk)) { in sunxi_nfc_probe()
2092 ret = PTR_ERR(nfc->mod_clk); in sunxi_nfc_probe()
2096 ret = clk_prepare_enable(nfc->mod_clk); in sunxi_nfc_probe()
2100 nfc->reset = devm_reset_control_get_optional_exclusive(dev, "ahb"); in sunxi_nfc_probe()
2101 if (IS_ERR(nfc->reset)) { in sunxi_nfc_probe()
2102 ret = PTR_ERR(nfc->reset); in sunxi_nfc_probe()
2106 ret = reset_control_deassert(nfc->reset); in sunxi_nfc_probe()
2112 nfc->caps = of_device_get_match_data(&pdev->dev); in sunxi_nfc_probe()
2113 if (!nfc->caps) { in sunxi_nfc_probe()
2114 ret = -EINVAL; in sunxi_nfc_probe()
2122 writel(0, nfc->regs + NFC_REG_INT); in sunxi_nfc_probe()
2124 0, "sunxi-nand", nfc); in sunxi_nfc_probe()
2128 nfc->dmac = dma_request_slave_channel(dev, "rxtx"); in sunxi_nfc_probe()
2129 if (nfc->dmac) { in sunxi_nfc_probe()
2132 dmac_cfg.src_addr = r->start + nfc->caps->reg_io_data; in sunxi_nfc_probe()
2136 dmac_cfg.src_maxburst = nfc->caps->dma_maxburst; in sunxi_nfc_probe()
2137 dmac_cfg.dst_maxburst = nfc->caps->dma_maxburst; in sunxi_nfc_probe()
2138 dmaengine_slave_config(nfc->dmac, &dmac_cfg); in sunxi_nfc_probe()
2140 if (nfc->caps->extra_mbus_conf) in sunxi_nfc_probe()
2141 writel(readl(nfc->regs + NFC_REG_CTL) | in sunxi_nfc_probe()
2142 NFC_DMA_TYPE_NORMAL, nfc->regs + NFC_REG_CTL); in sunxi_nfc_probe()
2152 dev_err(dev, "failed to init nand chips\n"); in sunxi_nfc_probe()
2159 if (nfc->dmac) in sunxi_nfc_probe()
2160 dma_release_channel(nfc->dmac); in sunxi_nfc_probe()
2162 reset_control_assert(nfc->reset); in sunxi_nfc_probe()
2164 clk_disable_unprepare(nfc->mod_clk); in sunxi_nfc_probe()
2166 clk_disable_unprepare(nfc->ahb_clk); in sunxi_nfc_probe()
2177 reset_control_assert(nfc->reset); in sunxi_nfc_remove()
2179 if (nfc->dmac) in sunxi_nfc_remove()
2180 dma_release_channel(nfc->dmac); in sunxi_nfc_remove()
2181 clk_disable_unprepare(nfc->mod_clk); in sunxi_nfc_remove()
2182 clk_disable_unprepare(nfc->ahb_clk); in sunxi_nfc_remove()
2200 .compatible = "allwinner,sun4i-a10-nand",
2204 .compatible = "allwinner,sun8i-a23-nand-controller",
2223 MODULE_DESCRIPTION("Allwinner NAND Flash Controller driver");