1 // SPDX-License-Identifier: GPL-2.0-only
4  *   This is the generic MTD driver for NAND flash devices. It should be
5  *   capable of working with almost all NAND chips currently available.
8  *	http://www.linux-mtd.infradead.org/doc/nand.html
11  *		  2002-2006 Thomas Gleixner (tglx@linutronix.de)
21  *	Check, if mtd->ecctype should be set to MTD_ECC_HW
22  *	if we have HW ECC support.
53 	struct nand_ecc_ctrl *ecc = &chip->ecc;  in nand_ooblayout_ecc_sp()  local
56 		return -ERANGE;  in nand_ooblayout_ecc_sp()
59 		oobregion->offset = 0;  in nand_ooblayout_ecc_sp()
60 		if (mtd->oobsize == 16)  in nand_ooblayout_ecc_sp()
61 			oobregion->length = 4;  in nand_ooblayout_ecc_sp()
63 			oobregion->length = 3;  in nand_ooblayout_ecc_sp()
65 		if (mtd->oobsize == 8)  in nand_ooblayout_ecc_sp()
66 			return -ERANGE;  in nand_ooblayout_ecc_sp()
68 		oobregion->offset = 6;  in nand_ooblayout_ecc_sp()
69 		oobregion->length = ecc->total - 4;  in nand_ooblayout_ecc_sp()
79 		return -ERANGE;  in nand_ooblayout_free_sp()
81 	if (mtd->oobsize == 16) {  in nand_ooblayout_free_sp()
83 			return -ERANGE;  in nand_ooblayout_free_sp()
85 		oobregion->length = 8;  in nand_ooblayout_free_sp()
86 		oobregion->offset = 8;  in nand_ooblayout_free_sp()
88 		oobregion->length = 2;  in nand_ooblayout_free_sp()
90 			oobregion->offset = 3;  in nand_ooblayout_free_sp()
92 			oobregion->offset = 6;  in nand_ooblayout_free_sp()
99 	.ecc = nand_ooblayout_ecc_sp,
108 	struct nand_ecc_ctrl *ecc = &chip->ecc;  in nand_ooblayout_ecc_lp()  local
110 	if (section || !ecc->total)  in nand_ooblayout_ecc_lp()
111 		return -ERANGE;  in nand_ooblayout_ecc_lp()
113 	oobregion->length = ecc->total;  in nand_ooblayout_ecc_lp()
114 	oobregion->offset = mtd->oobsize - oobregion->length;  in nand_ooblayout_ecc_lp()
123 	struct nand_ecc_ctrl *ecc = &chip->ecc;  in nand_ooblayout_free_lp()  local
126 		return -ERANGE;  in nand_ooblayout_free_lp()
128 	oobregion->length = mtd->oobsize - ecc->total - 2;  in nand_ooblayout_free_lp()
129 	oobregion->offset = 2;  in nand_ooblayout_free_lp()
135 	.ecc = nand_ooblayout_ecc_lp,
141  * Support the old "large page" layout used for 1-bit Hamming ECC where ECC
148 	struct nand_ecc_ctrl *ecc = &chip->ecc;  in nand_ooblayout_ecc_lp_hamming()  local
151 		return -ERANGE;  in nand_ooblayout_ecc_lp_hamming()
153 	switch (mtd->oobsize) {  in nand_ooblayout_ecc_lp_hamming()
155 		oobregion->offset = 40;  in nand_ooblayout_ecc_lp_hamming()
158 		oobregion->offset = 80;  in nand_ooblayout_ecc_lp_hamming()
161 		return -EINVAL;  in nand_ooblayout_ecc_lp_hamming()
164 	oobregion->length = ecc->total;  in nand_ooblayout_ecc_lp_hamming()
165 	if (oobregion->offset + oobregion->length > mtd->oobsize)  in nand_ooblayout_ecc_lp_hamming()
166 		return -ERANGE;  in nand_ooblayout_ecc_lp_hamming()
175 	struct nand_ecc_ctrl *ecc = &chip->ecc;  in nand_ooblayout_free_lp_hamming()  local
179 		return -ERANGE;  in nand_ooblayout_free_lp_hamming()
181 	switch (mtd->oobsize) {  in nand_ooblayout_free_lp_hamming()
189 		return -EINVAL;  in nand_ooblayout_free_lp_hamming()
193 		oobregion->offset = 2;  in nand_ooblayout_free_lp_hamming()
194 		oobregion->length = ecc_offset - 2;  in nand_ooblayout_free_lp_hamming()
196 		oobregion->offset = ecc_offset + ecc->total;  in nand_ooblayout_free_lp_hamming()
197 		oobregion->length = mtd->oobsize - oobregion->offset;  in nand_ooblayout_free_lp_hamming()
204 	.ecc = nand_ooblayout_ecc_lp_hamming,
213 	if (ofs & ((1ULL << chip->phys_erase_shift) - 1)) {  in check_offs_len()
215 		ret = -EINVAL;  in check_offs_len()
219 	if (len & ((1ULL << chip->phys_erase_shift) - 1)) {  in check_offs_len()
221 		ret = -EINVAL;  in check_offs_len()
228  * nand_select_target() - Select a NAND target (A.K.A. die)
229  * @chip: NAND chip object
233  * Select a NAND target so that further operations executed on @chip go to the
234  * selected NAND target.
242 	if (WARN_ON(cs > nanddev_ntargets(&chip->base)))  in nand_select_target()
245 	chip->cur_cs = cs;  in nand_select_target()
247 	if (chip->legacy.select_chip)  in nand_select_target()
248 		chip->legacy.select_chip(chip, cs);  in nand_select_target()
253  * nand_deselect_target() - Deselect the currently selected target
254  * @chip: NAND chip object
256  * Deselect the currently selected NAND target. The result of operations
261 	if (chip->legacy.select_chip)  in nand_deselect_target()
262 		chip->legacy.select_chip(chip, -1);  in nand_deselect_target()
264 	chip->cur_cs = -1;  in nand_deselect_target()
269  * nand_release_device - [GENERIC] release chip
270  * @chip: NAND chip object
277 	mutex_unlock(&chip->controller->lock);  in nand_release_device()
278 	mutex_unlock(&chip->lock);  in nand_release_device()
282  * nand_bbm_get_next_page - Get the next page for bad block markers
283  * @chip: NAND chip object
288  * available, -EINVAL is returned.
293 	int last_page = ((mtd->erasesize - mtd->writesize) >>  in nand_bbm_get_next_page()
294 			 chip->page_shift) & chip->pagemask;  in nand_bbm_get_next_page()
296 	if (page == 0 && chip->options & NAND_BBM_FIRSTPAGE)  in nand_bbm_get_next_page()
298 	else if (page <= 1 && chip->options & NAND_BBM_SECONDPAGE)  in nand_bbm_get_next_page()
300 	else if (page <= last_page && chip->options & NAND_BBM_LASTPAGE)  in nand_bbm_get_next_page()
303 	return -EINVAL;  in nand_bbm_get_next_page()
307  * nand_block_bad - [DEFAULT] Read bad block marker from the chip
308  * @chip: NAND chip object
319 	first_page = (int)(ofs >> chip->page_shift) & chip->pagemask;  in nand_block_bad()
323 		res = chip->ecc.read_oob(chip, first_page + page_offset);  in nand_block_bad()
327 		bad = chip->oob_poi[chip->badblockpos];  in nand_block_bad()
329 		if (likely(chip->badblockbits == 8))  in nand_block_bad()
332 			res = hweight8(bad) < chip->badblockbits;  in nand_block_bad()
344 	if (chip->legacy.block_bad)  in nand_isbad_bbm()
345 		return chip->legacy.block_bad(chip, ofs);  in nand_isbad_bbm()
351  * nand_get_device - [GENERIC] Get chip for selected access
352  * @chip: NAND chip structure
356  * Return: -EBUSY if the chip has been suspended, 0 otherwise
360 	mutex_lock(&chip->lock);  in nand_get_device()
361 	if (chip->suspended) {  in nand_get_device()
362 		mutex_unlock(&chip->lock);  in nand_get_device()
363 		return -EBUSY;  in nand_get_device()
365 	mutex_lock(&chip->controller->lock);  in nand_get_device()
371  * nand_check_wp - [GENERIC] check if the chip is write protected
372  * @chip: NAND chip object
383 	if (chip->options & NAND_BROKEN_XD)  in nand_check_wp()
395  * nand_fill_oob - [INTERN] Transfer client buffer to oob
396  * @chip: NAND chip object
411 	memset(chip->oob_poi, 0xff, mtd->oobsize);  in nand_fill_oob()
413 	switch (ops->mode) {  in nand_fill_oob()
417 		memcpy(chip->oob_poi + ops->ooboffs, oob, len);  in nand_fill_oob()
421 		ret = mtd_ooblayout_set_databytes(mtd, oob, chip->oob_poi,  in nand_fill_oob()
422 						  ops->ooboffs, len);  in nand_fill_oob()
433  * nand_do_write_oob - [MTD Interface] NAND write out-of-band
434  * @chip: NAND chip object
438  * NAND write out-of-band.
447 			 __func__, (unsigned int)to, (int)ops->ooblen);  in nand_do_write_oob()
452 	if ((ops->ooboffs + ops->ooblen) > len) {  in nand_do_write_oob()
455 		return -EINVAL;  in nand_do_write_oob()
458 	chipnr = (int)(to >> chip->chip_shift);  in nand_do_write_oob()
473 	page = (int)(to >> chip->page_shift);  in nand_do_write_oob()
478 		return -EROFS;  in nand_do_write_oob()
482 	if (page == chip->pagecache.page)  in nand_do_write_oob()
483 		chip->pagecache.page = -1;  in nand_do_write_oob()
485 	nand_fill_oob(chip, ops->oobbuf, ops->ooblen, ops);  in nand_do_write_oob()
487 	if (ops->mode == MTD_OPS_RAW)  in nand_do_write_oob()
488 		status = chip->ecc.write_oob_raw(chip, page & chip->pagemask);  in nand_do_write_oob()
490 		status = chip->ecc.write_oob(chip, page & chip->pagemask);  in nand_do_write_oob()
497 	ops->oobretlen = ops->ooblen;  in nand_do_write_oob()
503  * nand_default_block_markbad - [DEFAULT] mark a block bad via bad block marker
504  * @chip: NAND chip object
520 	ops.ooboffs = chip->badblockpos;  in nand_default_block_markbad()
521 	if (chip->options & NAND_BUSWIDTH_16) {  in nand_default_block_markbad()
533 					ofs + (page_offset * mtd->writesize),  in nand_default_block_markbad()
546  * nand_markbad_bbm - mark a block by updating the BBM
547  * @chip: NAND chip object
552 	if (chip->legacy.block_markbad)  in nand_markbad_bbm()
553 		return chip->legacy.block_markbad(chip, ofs);  in nand_markbad_bbm()
559  * nand_block_markbad_lowlevel - mark a block bad
560  * @chip: NAND chip object
563  * This function performs the generic NAND bad block marking steps (i.e., bad
565  * specify how to write bad block markers to OOB (chip->legacy.block_markbad).
582 	if (!(chip->bbt_options & NAND_BBT_NO_OOB_BBM)) {  in nand_block_markbad_lowlevel()
588 		einfo.len = 1ULL << chip->phys_erase_shift;  in nand_block_markbad_lowlevel()
601 	if (chip->bbt) {  in nand_block_markbad_lowlevel()
608 		mtd->ecc_stats.badblocks++;  in nand_block_markbad_lowlevel()
614  * nand_block_isreserved - [GENERIC] Check if a block is marked reserved.
624 	if (!chip->bbt)  in nand_block_isreserved()
631  * nand_block_checkbad - [GENERIC] Check if a block is marked bad
632  * @chip: NAND chip object
642 	if (chip->bbt)  in nand_block_checkbad()
649  * nand_soft_waitrdy - Poll STATUS reg until RDY bit is set to 1
650  * @chip: NAND chip structure
653  * Poll the STATUS register using ->exec_op() until the RDY bit becomes 1.
654  * If that does not happen whitin the specified timeout, -ETIMEDOUT is
658  * to the NAND R/B pin.
660  * Be aware that calling this helper from an ->exec_op() implementation means
661  * ->exec_op() must be re-entrant.
663  * Return 0 if the NAND chip is ready, a negative error otherwise.
672 		return -ENOTSUPP;  in nand_soft_waitrdy()
675 	timings = nand_get_sdr_timings(&chip->data_interface);  in nand_soft_waitrdy()
676 	ndelay(PSEC_TO_NSEC(timings->tWB_max));  in nand_soft_waitrdy()
709 	return status & NAND_STATUS_READY ? 0 : -ETIMEDOUT;  in nand_soft_waitrdy()
714  * nand_gpio_waitrdy - Poll R/B GPIO pin until ready
715  * @chip: NAND chip structure
720  * whitin the specified timeout, -ETIMEDOUT is returned.
723  * NAND R/B pin over GPIO.
739 	return gpiod_get_value_cansleep(gpiod) ? 0 : -ETIMEDOUT;  in nand_gpio_waitrdy()
744  * panic_nand_wait - [GENERIC] wait until the command is done
745  * @chip: NAND chip structure
756 		if (chip->legacy.dev_ready) {  in panic_nand_wait()
757 			if (chip->legacy.dev_ready(chip))  in panic_nand_wait()
777 	return (chip->parameters.supports_set_get_features &&  in nand_supports_get_features()
778 		test_bit(addr, chip->parameters.get_feature_list));  in nand_supports_get_features()
783 	return (chip->parameters.supports_set_get_features &&  in nand_supports_set_features()
784 		test_bit(addr, chip->parameters.set_feature_list));  in nand_supports_set_features()
788  * nand_reset_data_interface - Reset data interface and timings
789  * @chip: The NAND chip
806 	 * To transition from NV-DDR or NV-DDR2 to the SDR data  in nand_reset_data_interface()
818 	ret = chip->controller->ops->setup_data_interface(chip, chipnr,  in nand_reset_data_interface()
819 							&chip->data_interface);  in nand_reset_data_interface()
827  * nand_setup_data_interface - Setup the best data interface and timings
828  * @chip: The NAND chip
831  * Find and configure the best data interface and NAND timings supported by
834  * and if the NAND chip does not support ONFI, relies on the
835  * ->onfi_timing_mode_default specified in the nand_ids table.
842 		chip->onfi_timing_mode_default,  in nand_setup_data_interface()
849 	/* Change the mode on the chip side (if supported by the NAND chip) */  in nand_setup_data_interface()
860 	ret = chip->controller->ops->setup_data_interface(chip, chipnr,  in nand_setup_data_interface()
861 							&chip->data_interface);  in nand_setup_data_interface()
877 	if (tmode_param[0] != chip->onfi_timing_mode_default) {  in nand_setup_data_interface()
878 		pr_warn("timing mode %d not acknowledged by the NAND chip\n",  in nand_setup_data_interface()
879 			chip->onfi_timing_mode_default);  in nand_setup_data_interface()
899  * nand_init_data_interface - find the best data interface and timings
900  * @chip: The NAND chip
902  * Find the best data interface and NAND timings supported by the chip
905  * and if the NAND chip does not support ONFI, relies on the
906  * ->onfi_timing_mode_default specified in the nand_ids table. After this
907  * function nand_chip->data_interface is initialized with the best timing mode
921 	 * if the NAND does not support ONFI, fallback to the default ONFI  in nand_init_data_interface()
924 	if (chip->parameters.onfi) {  in nand_init_data_interface()
925 		modes = chip->parameters.onfi->async_timing_mode;  in nand_init_data_interface()
927 		if (!chip->onfi_timing_mode_default)  in nand_init_data_interface()
930 		modes = GENMASK(chip->onfi_timing_mode_default, 0);  in nand_init_data_interface()
933 	for (mode = fls(modes) - 1; mode >= 0; mode--) {  in nand_init_data_interface()
942 		ret = chip->controller->ops->setup_data_interface(chip,  in nand_init_data_interface()
944 						 &chip->data_interface);  in nand_init_data_interface()
946 			chip->onfi_timing_mode_default = mode;  in nand_init_data_interface()
955  * nand_fill_column_cycles - fill the column cycles of an address
956  * @chip: The NAND chip
961  * on the NAND bus width and the page size.
972 	if (offset_in_page > mtd->writesize + mtd->oobsize)  in nand_fill_column_cycles()
973 		return -EINVAL;  in nand_fill_column_cycles()
980 	if (mtd->writesize <= 512 && offset_in_page >= mtd->writesize)  in nand_fill_column_cycles()
981 		offset_in_page -= mtd->writesize;  in nand_fill_column_cycles()
984 	 * The offset in page is expressed in bytes, if the NAND bus is 16-bit  in nand_fill_column_cycles()
987 	if (chip->options & NAND_BUSWIDTH_16) {  in nand_fill_column_cycles()
989 			return -EINVAL;  in nand_fill_column_cycles()
1000 	if (mtd->writesize <= 512)  in nand_fill_column_cycles()
1014 		nand_get_sdr_timings(&chip->data_interface);  in nand_sp_exec_read_page_op()
1018 		NAND_OP_ADDR(3, addrs, PSEC_TO_NSEC(sdr->tWB_max)),  in nand_sp_exec_read_page_op()
1019 		NAND_OP_WAIT_RDY(PSEC_TO_MSEC(sdr->tR_max),  in nand_sp_exec_read_page_op()
1020 				 PSEC_TO_NSEC(sdr->tRR_min)),  in nand_sp_exec_read_page_op()
1023 	struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs);  in nand_sp_exec_read_page_op()
1028 		op.ninstrs--;  in nand_sp_exec_read_page_op()
1030 	if (offset_in_page >= mtd->writesize)  in nand_sp_exec_read_page_op()
1033 		 !(chip->options & NAND_BUSWIDTH_16))  in nand_sp_exec_read_page_op()
1043 	if (chip->options & NAND_ROW_ADDR_3) {  in nand_sp_exec_read_page_op()
1056 		nand_get_sdr_timings(&chip->data_interface);  in nand_lp_exec_read_page_op()
1061 		NAND_OP_CMD(NAND_CMD_READSTART, PSEC_TO_NSEC(sdr->tWB_max)),  in nand_lp_exec_read_page_op()
1062 		NAND_OP_WAIT_RDY(PSEC_TO_MSEC(sdr->tR_max),  in nand_lp_exec_read_page_op()
1063 				 PSEC_TO_NSEC(sdr->tRR_min)),  in nand_lp_exec_read_page_op()
1066 	struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs);  in nand_lp_exec_read_page_op()
1071 		op.ninstrs--;  in nand_lp_exec_read_page_op()
1080 	if (chip->options & NAND_ROW_ADDR_3) {  in nand_lp_exec_read_page_op()
1089  * nand_read_page_op - Do a READ PAGE operation
1090  * @chip: The NAND chip
1107 		return -EINVAL;  in nand_read_page_op()
1109 	if (offset_in_page + len > mtd->writesize + mtd->oobsize)  in nand_read_page_op()
1110 		return -EINVAL;  in nand_read_page_op()
1113 		if (mtd->writesize > 512)  in nand_read_page_op()
1122 	chip->legacy.cmdfunc(chip, NAND_CMD_READ0, offset_in_page, page);  in nand_read_page_op()
1124 		chip->legacy.read_buf(chip, buf, len);  in nand_read_page_op()
1131  * nand_read_param_page_op - Do a READ PARAMETER PAGE operation
1132  * @chip: The NAND chip
1149 		return -EINVAL;  in nand_read_param_page_op()
1153 			nand_get_sdr_timings(&chip->data_interface);  in nand_read_param_page_op()
1156 			NAND_OP_ADDR(1, &page, PSEC_TO_NSEC(sdr->tWB_max)),  in nand_read_param_page_op()
1157 			NAND_OP_WAIT_RDY(PSEC_TO_MSEC(sdr->tR_max),  in nand_read_param_page_op()
1158 					 PSEC_TO_NSEC(sdr->tRR_min)),  in nand_read_param_page_op()
1161 		struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs);  in nand_read_param_page_op()
1165 			op.ninstrs--;  in nand_read_param_page_op()
1170 	chip->legacy.cmdfunc(chip, NAND_CMD_PARAM, page, -1);  in nand_read_param_page_op()
1172 		p[i] = chip->legacy.read_byte(chip);  in nand_read_param_page_op()
1178  * nand_change_read_column_op - Do a CHANGE READ COLUMN operation
1179  * @chip: The NAND chip
1183  * @force_8bit: force 8-bit bus access
1197 		return -EINVAL;  in nand_change_read_column_op()
1199 	if (offset_in_page + len > mtd->writesize + mtd->oobsize)  in nand_change_read_column_op()
1200 		return -EINVAL;  in nand_change_read_column_op()
1203 	if (mtd->writesize <= 512)  in nand_change_read_column_op()
1204 		return -ENOTSUPP;  in nand_change_read_column_op()
1208 			nand_get_sdr_timings(&chip->data_interface);  in nand_change_read_column_op()
1214 				    PSEC_TO_NSEC(sdr->tCCS_min)),  in nand_change_read_column_op()
1217 		struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs);  in nand_change_read_column_op()
1226 			op.ninstrs--;  in nand_change_read_column_op()
1233 	chip->legacy.cmdfunc(chip, NAND_CMD_RNDOUT, offset_in_page, -1);  in nand_change_read_column_op()
1235 		chip->legacy.read_buf(chip, buf, len);  in nand_change_read_column_op()
1242  * nand_read_oob_op - Do a READ OOB operation
1243  * @chip: The NAND chip
1260 		return -EINVAL;  in nand_read_oob_op()
1262 	if (offset_in_oob + len > mtd->oobsize)  in nand_read_oob_op()
1263 		return -EINVAL;  in nand_read_oob_op()
1267 					 mtd->writesize + offset_in_oob,  in nand_read_oob_op()
1270 	chip->legacy.cmdfunc(chip, NAND_CMD_READOOB, offset_in_oob, page);  in nand_read_oob_op()
1272 		chip->legacy.read_buf(chip, buf, len);  in nand_read_oob_op()
1284 		nand_get_sdr_timings(&chip->data_interface);  in nand_exec_prog_page_op()
1289 		 * with a large page NAND and adjusted if we're dealing  in nand_exec_prog_page_op()
1290 		 * with a small page NAND and the page offset is > 255.  in nand_exec_prog_page_op()
1294 		NAND_OP_ADDR(0, addrs, PSEC_TO_NSEC(sdr->tADL_min)),  in nand_exec_prog_page_op()
1296 		NAND_OP_CMD(NAND_CMD_PAGEPROG, PSEC_TO_NSEC(sdr->tWB_max)),  in nand_exec_prog_page_op()
1297 		NAND_OP_WAIT_RDY(PSEC_TO_MSEC(sdr->tPROG_max), 0),  in nand_exec_prog_page_op()
1299 	struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs);  in nand_exec_prog_page_op()
1309 	if (chip->options & NAND_ROW_ADDR_3)  in nand_exec_prog_page_op()
1316 		op.ninstrs -= 2;  in nand_exec_prog_page_op()
1319 			op.ninstrs--;  in nand_exec_prog_page_op()
1322 	if (mtd->writesize <= 512) {  in nand_exec_prog_page_op()
1328 		if (offset_in_page >= mtd->writesize)  in nand_exec_prog_page_op()
1331 			 !(chip->options & NAND_BUSWIDTH_16))  in nand_exec_prog_page_op()
1336 		 * NAND.  in nand_exec_prog_page_op()
1339 		op.ninstrs--;  in nand_exec_prog_page_op()
1354  * nand_prog_page_begin_op - starts a PROG PAGE operation
1355  * @chip: The NAND chip
1373 		return -EINVAL;  in nand_prog_page_begin_op()
1375 	if (offset_in_page + len > mtd->writesize + mtd->oobsize)  in nand_prog_page_begin_op()
1376 		return -EINVAL;  in nand_prog_page_begin_op()
1382 	chip->legacy.cmdfunc(chip, NAND_CMD_SEQIN, offset_in_page, page);  in nand_prog_page_begin_op()
1385 		chip->legacy.write_buf(chip, buf, len);  in nand_prog_page_begin_op()
1392  * nand_prog_page_end_op - ends a PROG PAGE operation
1393  * @chip: The NAND chip
1407 			nand_get_sdr_timings(&chip->data_interface);  in nand_prog_page_end_op()
1410 				    PSEC_TO_NSEC(sdr->tWB_max)),  in nand_prog_page_end_op()
1411 			NAND_OP_WAIT_RDY(PSEC_TO_MSEC(sdr->tPROG_max), 0),  in nand_prog_page_end_op()
1413 		struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs);  in nand_prog_page_end_op()
1423 		chip->legacy.cmdfunc(chip, NAND_CMD_PAGEPROG, -1, -1);  in nand_prog_page_end_op()
1424 		ret = chip->legacy.waitfunc(chip);  in nand_prog_page_end_op()
1432 		return -EIO;  in nand_prog_page_end_op()
1439  * nand_prog_page_op - Do a full PROG PAGE operation
1440  * @chip: The NAND chip
1459 		return -EINVAL;  in nand_prog_page_op()
1461 	if (offset_in_page + len > mtd->writesize + mtd->oobsize)  in nand_prog_page_op()
1462 		return -EINVAL;  in nand_prog_page_op()
1468 		chip->legacy.cmdfunc(chip, NAND_CMD_SEQIN, offset_in_page,  in nand_prog_page_op()
1470 		chip->legacy.write_buf(chip, buf, len);  in nand_prog_page_op()
1471 		chip->legacy.cmdfunc(chip, NAND_CMD_PAGEPROG, -1, -1);  in nand_prog_page_op()
1472 		status = chip->legacy.waitfunc(chip);  in nand_prog_page_op()
1476 		return -EIO;  in nand_prog_page_op()
1483  * nand_change_write_column_op - Do a CHANGE WRITE COLUMN operation
1484  * @chip: The NAND chip
1486  * @buf: buffer containing the data to send to the NAND
1488  * @force_8bit: force 8-bit bus access
1503 		return -EINVAL;  in nand_change_write_column_op()
1505 	if (offset_in_page + len > mtd->writesize + mtd->oobsize)  in nand_change_write_column_op()
1506 		return -EINVAL;  in nand_change_write_column_op()
1509 	if (mtd->writesize <= 512)  in nand_change_write_column_op()
1510 		return -ENOTSUPP;  in nand_change_write_column_op()
1514 			nand_get_sdr_timings(&chip->data_interface);  in nand_change_write_column_op()
1518 			NAND_OP_ADDR(2, addrs, PSEC_TO_NSEC(sdr->tCCS_min)),  in nand_change_write_column_op()
1521 		struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs);  in nand_change_write_column_op()
1532 			op.ninstrs--;  in nand_change_write_column_op()
1537 	chip->legacy.cmdfunc(chip, NAND_CMD_RNDIN, offset_in_page, -1);  in nand_change_write_column_op()
1539 		chip->legacy.write_buf(chip, buf, len);  in nand_change_write_column_op()
1546  * nand_readid_op - Do a READID operation
1547  * @chip: The NAND chip
1553  * NAND.
1565 		return -EINVAL;  in nand_readid_op()
1569 			nand_get_sdr_timings(&chip->data_interface);  in nand_readid_op()
1572 			NAND_OP_ADDR(1, &addr, PSEC_TO_NSEC(sdr->tADL_min)),  in nand_readid_op()
1575 		struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs);  in nand_readid_op()
1579 			op.ninstrs--;  in nand_readid_op()
1584 	chip->legacy.cmdfunc(chip, NAND_CMD_READID, addr, -1);  in nand_readid_op()
1587 		id[i] = chip->legacy.read_byte(chip);  in nand_readid_op()
1594  * nand_status_op - Do a STATUS operation
1595  * @chip: The NAND chip
1596  * @status: out variable to store the NAND status
1599  * the NAND.
1608 			nand_get_sdr_timings(&chip->data_interface);  in nand_status_op()
1611 				    PSEC_TO_NSEC(sdr->tADL_min)),  in nand_status_op()
1614 		struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs);  in nand_status_op()
1617 			op.ninstrs--;  in nand_status_op()
1622 	chip->legacy.cmdfunc(chip, NAND_CMD_STATUS, -1, -1);  in nand_status_op()
1624 		*status = chip->legacy.read_byte(chip);  in nand_status_op()
1631  * nand_exit_status_op - Exit a STATUS operation
1632  * @chip: The NAND chip
1647 		struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs);  in nand_exit_status_op()
1652 	chip->legacy.cmdfunc(chip, NAND_CMD_READ0, -1, -1);  in nand_exit_status_op()
1658  * nand_erase_op - Do an erase operation
1659  * @chip: The NAND chip
1662  * This function sends an ERASE command and waits for the NAND to be ready
1671 			    (chip->phys_erase_shift - chip->page_shift);  in nand_erase_op()
1677 			nand_get_sdr_timings(&chip->data_interface);  in nand_erase_op()
1683 				    PSEC_TO_MSEC(sdr->tWB_max)),  in nand_erase_op()
1684 			NAND_OP_WAIT_RDY(PSEC_TO_MSEC(sdr->tBERS_max), 0),  in nand_erase_op()
1686 		struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs);  in nand_erase_op()
1688 		if (chip->options & NAND_ROW_ADDR_3)  in nand_erase_op()
1699 		chip->legacy.cmdfunc(chip, NAND_CMD_ERASE1, -1, page);  in nand_erase_op()
1700 		chip->legacy.cmdfunc(chip, NAND_CMD_ERASE2, -1, -1);  in nand_erase_op()
1702 		ret = chip->legacy.waitfunc(chip);  in nand_erase_op()
1710 		return -EIO;  in nand_erase_op()
1717  * nand_set_features_op - Do a SET FEATURES operation
1718  * @chip: The NAND chip
1722  * This function sends a SET FEATURES command and waits for the NAND to be
1736 			nand_get_sdr_timings(&chip->data_interface);  in nand_set_features_op()
1739 			NAND_OP_ADDR(1, &feature, PSEC_TO_NSEC(sdr->tADL_min)),  in nand_set_features_op()
1741 					      PSEC_TO_NSEC(sdr->tWB_max)),  in nand_set_features_op()
1742 			NAND_OP_WAIT_RDY(PSEC_TO_MSEC(sdr->tFEAT_max), 0),  in nand_set_features_op()
1744 		struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs);  in nand_set_features_op()
1749 	chip->legacy.cmdfunc(chip, NAND_CMD_SET_FEATURES, feature, -1);  in nand_set_features_op()
1751 		chip->legacy.write_byte(chip, params[i]);  in nand_set_features_op()
1753 	ret = chip->legacy.waitfunc(chip);  in nand_set_features_op()
1758 		return -EIO;  in nand_set_features_op()
1764  * nand_get_features_op - Do a GET FEATURES operation
1765  * @chip: The NAND chip
1769  * This function sends a GET FEATURES command and waits for the NAND to be
1783 			nand_get_sdr_timings(&chip->data_interface);  in nand_get_features_op()
1786 			NAND_OP_ADDR(1, &feature, PSEC_TO_NSEC(sdr->tWB_max)),  in nand_get_features_op()
1787 			NAND_OP_WAIT_RDY(PSEC_TO_MSEC(sdr->tFEAT_max),  in nand_get_features_op()
1788 					 PSEC_TO_NSEC(sdr->tRR_min)),  in nand_get_features_op()
1792 		struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs);  in nand_get_features_op()
1797 	chip->legacy.cmdfunc(chip, NAND_CMD_GET_FEATURES, feature, -1);  in nand_get_features_op()
1799 		params[i] = chip->legacy.read_byte(chip);  in nand_get_features_op()
1812 		struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs);  in nand_wait_rdy_op()
1818 	if (!chip->legacy.dev_ready)  in nand_wait_rdy_op()
1819 		udelay(chip->legacy.chip_delay);  in nand_wait_rdy_op()
1827  * nand_reset_op - Do a reset operation
1828  * @chip: The NAND chip
1830  * This function sends a RESET command and waits for the NAND to be ready
1840 			nand_get_sdr_timings(&chip->data_interface);  in nand_reset_op()
1842 			NAND_OP_CMD(NAND_CMD_RESET, PSEC_TO_NSEC(sdr->tWB_max)),  in nand_reset_op()
1843 			NAND_OP_WAIT_RDY(PSEC_TO_MSEC(sdr->tRST_max), 0),  in nand_reset_op()
1845 		struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs);  in nand_reset_op()
1850 	chip->legacy.cmdfunc(chip, NAND_CMD_RESET, -1, -1);  in nand_reset_op()
1857  * nand_read_data_op - Read data from the NAND
1858  * @chip: The NAND chip
1861  * @force_8bit: force 8-bit bus access
1864  * another NAND operation like nand_read_page_op().
1873 		return -EINVAL;  in nand_read_data_op()
1879 		struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs);  in nand_read_data_op()
1891 			p[i] = chip->legacy.read_byte(chip);  in nand_read_data_op()
1893 		chip->legacy.read_buf(chip, buf, len);  in nand_read_data_op()
1901  * nand_write_data_op - Write data from the NAND
1902  * @chip: The NAND chip
1905  * @force_8bit: force 8-bit bus access
1908  * another NAND operation like nand_write_page_begin_op().
1917 		return -EINVAL;  in nand_write_data_op()
1923 		struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs);  in nand_write_data_op()
1935 			chip->legacy.write_byte(chip, p[i]);  in nand_write_data_op()
1937 		chip->legacy.write_buf(chip, buf, len);  in nand_write_data_op()
1945  * struct nand_op_parser_ctx - Context used by the parser
1948  * @subop: Sub-operation to be passed to the NAND controller
1950  * This structure is used by the core to split NAND operations into
1951  * sub-operations that can be handled by the NAND controller.
1960  * nand_op_parser_must_split_instr - Checks if an instruction must be split
1970  * Some NAND controllers are limited and cannot send X address cycles with a
1973  * controller-operation into two or more chunks.
1984 	switch (pat->type) {  in nand_op_parser_must_split_instr()
1986 		if (!pat->ctx.addr.maxcycles)  in nand_op_parser_must_split_instr()
1989 		if (instr->ctx.addr.naddrs - *start_offset >  in nand_op_parser_must_split_instr()
1990 		    pat->ctx.addr.maxcycles) {  in nand_op_parser_must_split_instr()
1991 			*start_offset += pat->ctx.addr.maxcycles;  in nand_op_parser_must_split_instr()
1998 		if (!pat->ctx.data.maxlen)  in nand_op_parser_must_split_instr()
2001 		if (instr->ctx.data.len - *start_offset >  in nand_op_parser_must_split_instr()
2002 		    pat->ctx.data.maxlen) {  in nand_op_parser_must_split_instr()
2003 			*start_offset += pat->ctx.data.maxlen;  in nand_op_parser_must_split_instr()
2016  * nand_op_parser_match_pat - Checks if a pattern matches the instructions
2021  * Check if @pat matches the set or a sub-set of instructions remaining in @ctx.
2023  * @ctx->subop is updated with the set of instructions to be passed to the
2030 	unsigned int instr_offset = ctx->subop.first_instr_start_off;  in nand_op_parser_match_pat()
2031 	const struct nand_op_instr *end = ctx->instrs + ctx->ninstrs;  in nand_op_parser_match_pat()
2032 	const struct nand_op_instr *instr = ctx->subop.instrs;  in nand_op_parser_match_pat()
2035 	for (i = 0, ninstrs = 0; i < pat->nelems && instr < end; i++) {  in nand_op_parser_match_pat()
2043 		if (instr->type != pat->elems[i].type) {  in nand_op_parser_match_pat()
2044 			if (!pat->elems[i].optional)  in nand_op_parser_match_pat()
2058 		if (nand_op_parser_must_split_instr(&pat->elems[i], instr,  in nand_op_parser_match_pat()
2084 	for (; i < pat->nelems; i++) {  in nand_op_parser_match_pat()
2085 		if (!pat->elems[i].optional)  in nand_op_parser_match_pat()
2093 	ctx->subop.ninstrs = ninstrs;  in nand_op_parser_match_pat()
2094 	ctx->subop.last_instr_end_off = instr_offset;  in nand_op_parser_match_pat()
2108 	for (i = 0; i < ctx->ninstrs; i++) {  in nand_op_parser_trace()
2109 		instr = &ctx->instrs[i];  in nand_op_parser_trace()
2111 		if (instr == &ctx->subop.instrs[0])  in nand_op_parser_trace()
2112 			prefix = "    ->";  in nand_op_parser_trace()
2116 		if (instr == &ctx->subop.instrs[ctx->subop.ninstrs - 1])  in nand_op_parser_trace()
2130 	if (a->subop.ninstrs < b->subop.ninstrs)  in nand_op_parser_cmp_ctx()
2131 		return -1;  in nand_op_parser_cmp_ctx()
2132 	else if (a->subop.ninstrs > b->subop.ninstrs)  in nand_op_parser_cmp_ctx()
2135 	if (a->subop.last_instr_end_off < b->subop.last_instr_end_off)  in nand_op_parser_cmp_ctx()
2136 		return -1;  in nand_op_parser_cmp_ctx()
2137 	else if (a->subop.last_instr_end_off > b->subop.last_instr_end_off)  in nand_op_parser_cmp_ctx()
2144  * nand_op_parser_exec_op - exec_op parser
2145  * @chip: the NAND chip
2147  * @op: the NAND operation to address
2151  * Helper function designed to ease integration of NAND controller drivers that
2154  * multiple sub-operations (if required) and pass them back to the ->exec()
2157  * NAND controller drivers should call this function from their own ->exec_op()
2163  * matching pattern->exec() hook.
2170 		.subop.instrs = op->instrs,  in nand_op_parser_exec_op()
2171 		.instrs = op->instrs,  in nand_op_parser_exec_op()
2172 		.ninstrs = op->ninstrs,  in nand_op_parser_exec_op()
2176 	while (ctx.subop.instrs < op->instrs + op->ninstrs) {  in nand_op_parser_exec_op()
2179 		int ret, best_pattern = -1;  in nand_op_parser_exec_op()
2181 		for (i = 0; i < parser->npatterns; i++) {  in nand_op_parser_exec_op()
2184 			pattern = &parser->patterns[i];  in nand_op_parser_exec_op()
2197 			pr_debug("->exec_op() parser: pattern not found!\n");  in nand_op_parser_exec_op()
2198 			return -ENOTSUPP;  in nand_op_parser_exec_op()
2205 			pattern = &parser->patterns[best_pattern];  in nand_op_parser_exec_op()
2206 			ret = pattern->exec(chip, &ctx.subop);  in nand_op_parser_exec_op()
2217 			ctx.subop.instrs -= 1;  in nand_op_parser_exec_op()
2228 	return instr && (instr->type == NAND_OP_DATA_IN_INSTR ||  in nand_instr_is_data()
2229 			 instr->type == NAND_OP_DATA_OUT_INSTR);  in nand_instr_is_data()
2235 	return subop && instr_idx < subop->ninstrs;  in nand_subop_instr_is_valid()
2244 	return subop->first_instr_start_off;  in nand_subop_get_start_off()
2248  * nand_subop_get_addr_start_off - Get the start offset in an address array
2249  * @subop: The entire sub-operation
2250  * @instr_idx: Index of the instruction inside the sub-operation
2253  * ->addr.addrs field of address instructions. This is wrong as address
2262 		    subop->instrs[instr_idx].type != NAND_OP_ADDR_INSTR))  in nand_subop_get_addr_start_off()
2270  * nand_subop_get_num_addr_cyc - Get the remaining address cycles to assert
2271  * @subop: The entire sub-operation
2272  * @instr_idx: Index of the instruction inside the sub-operation
2275  * ->addr->naddrs field of a data instruction. This is wrong as instructions
2286 		    subop->instrs[instr_idx].type != NAND_OP_ADDR_INSTR))  in nand_subop_get_num_addr_cyc()
2291 	if (instr_idx == subop->ninstrs - 1 &&  in nand_subop_get_num_addr_cyc()
2292 	    subop->last_instr_end_off)  in nand_subop_get_num_addr_cyc()
2293 		end_off = subop->last_instr_end_off;  in nand_subop_get_num_addr_cyc()
2295 		end_off = subop->instrs[instr_idx].ctx.addr.naddrs;  in nand_subop_get_num_addr_cyc()
2297 	return end_off - start_off;  in nand_subop_get_num_addr_cyc()
2302  * nand_subop_get_data_start_off - Get the start offset in a data array
2303  * @subop: The entire sub-operation
2304  * @instr_idx: Index of the instruction inside the sub-operation
2307  * ->data->buf.{in,out} field of data instructions. This is wrong as data
2316 		    !nand_instr_is_data(&subop->instrs[instr_idx])))  in nand_subop_get_data_start_off()
2324  * nand_subop_get_data_len - Get the number of bytes to retrieve
2325  * @subop: The entire sub-operation
2326  * @instr_idx: Index of the instruction inside the sub-operation
2329  * ->data->len field of a data instruction. This is wrong as data instructions
2340 		    !nand_instr_is_data(&subop->instrs[instr_idx])))  in nand_subop_get_data_len()
2345 	if (instr_idx == subop->ninstrs - 1 &&  in nand_subop_get_data_len()
2346 	    subop->last_instr_end_off)  in nand_subop_get_data_len()
2347 		end_off = subop->last_instr_end_off;  in nand_subop_get_data_len()
2349 		end_off = subop->instrs[instr_idx].ctx.data.len;  in nand_subop_get_data_len()
2351 	return end_off - start_off;  in nand_subop_get_data_len()
2356  * nand_reset - Reset and initialize a NAND device
2357  * @chip: The NAND chip
2368 	struct nand_data_interface saved_data_intf = chip->data_interface;  in nand_reset()
2376 	 * The CS line has to be released before we can apply the new NAND  in nand_reset()
2387 	 * A nand_reset_data_interface() put both the NAND chip and the NAND  in nand_reset()
2390 	 * nand_setup_data_interface() uses ->set/get_features() which would  in nand_reset()
2393 	if (!chip->onfi_timing_mode_default)  in nand_reset()
2396 	chip->data_interface = saved_data_intf;  in nand_reset()
2406  * nand_get_features - wrapper to perform a GET_FEATURE
2407  * @chip: NAND chip info structure
2411  * Returns 0 for success, a negative error otherwise. Returns -ENOTSUPP if the
2418 		return -ENOTSUPP;  in nand_get_features()
2420 	if (chip->legacy.get_features)  in nand_get_features()
2421 		return chip->legacy.get_features(chip, addr, subfeature_param);  in nand_get_features()
2427  * nand_set_features - wrapper to perform a SET_FEATURE
2428  * @chip: NAND chip info structure
2432  * Returns 0 for success, a negative error otherwise. Returns -ENOTSUPP if the
2439 		return -ENOTSUPP;  in nand_set_features()
2441 	if (chip->legacy.set_features)  in nand_set_features()
2442 		return chip->legacy.set_features(chip, addr, subfeature_param);  in nand_set_features()
2448  * nand_check_erased_buf - check if a buffer contains (almost) only 0xff data
2463  * bitflips_threshold, or -ERROR_CODE for bitflips in excess of the
2473 	     len--, bitmap++) {  in nand_check_erased_buf()
2475 		bitflips += BITS_PER_BYTE - weight;  in nand_check_erased_buf()
2477 			return -EBADMSG;  in nand_check_erased_buf()
2481 	     len -= sizeof(long), bitmap += sizeof(long)) {  in nand_check_erased_buf()
2486 		bitflips += BITS_PER_LONG - weight;  in nand_check_erased_buf()
2488 			return -EBADMSG;  in nand_check_erased_buf()
2491 	for (; len > 0; len--, bitmap++) {  in nand_check_erased_buf()
2493 		bitflips += BITS_PER_BYTE - weight;  in nand_check_erased_buf()
2495 			return -EBADMSG;  in nand_check_erased_buf()
2502  * nand_check_erased_ecc_chunk - check if an ECC chunk contains (almost) only
2506  * @ecc: ECC buffer
2507  * @ecclen: ECC length
2512  * Check if a data buffer and its associated ECC and OOB data contains only
2519  * 1/ ECC algorithms are working on pre-defined block sizes which are usually
2520  *    different from the NAND page size. When fixing bitflips, ECC engines will
2521  *    report the number of errors per chunk, and the NAND core infrastructure
2527  *    the payload data but also their associated ECC data, because a user might
2529  *    shouldn't consider the chunk as erased, and checking ECC bytes prevent
2532  *    data are protected by the ECC engine.
2534  *    extra OOB data to an ECC chunk.
2537  * bitflips_threshold, or -ERROR_CODE for bitflips in excess of the
2541 				void *ecc, int ecclen,  in nand_check_erased_ecc_chunk()  argument
2552 	bitflips_threshold -= data_bitflips;  in nand_check_erased_ecc_chunk()
2554 	ecc_bitflips = nand_check_erased_buf(ecc, ecclen, bitflips_threshold);  in nand_check_erased_ecc_chunk()
2558 	bitflips_threshold -= ecc_bitflips;  in nand_check_erased_ecc_chunk()
2569 		memset(ecc, 0xff, ecclen);  in nand_check_erased_ecc_chunk()
2579  * nand_read_page_raw_notsupp - dummy read raw page function
2580  * @chip: nand chip info structure
2582  * @oob_required: caller requires OOB data read to chip->oob_poi
2585  * Returns -ENOTSUPP unconditionally.
2590 	return -ENOTSUPP;  in nand_read_page_raw_notsupp()
2594  * nand_read_page_raw - [INTERN] read raw page data without ecc
2595  * @chip: nand chip info structure
2597  * @oob_required: caller requires OOB data read to chip->oob_poi
2600  * Not for syndrome calculating ECC controllers, which use a special oob layout.
2608 	ret = nand_read_page_op(chip, page, 0, buf, mtd->writesize);  in nand_read_page_raw()
2613 		ret = nand_read_data_op(chip, chip->oob_poi, mtd->oobsize,  in nand_read_page_raw()
2624  * nand_read_page_raw_syndrome - [INTERN] read raw page data without ecc
2625  * @chip: nand chip info structure
2627  * @oob_required: caller requires OOB data read to chip->oob_poi
2636 	int eccsize = chip->ecc.size;  in nand_read_page_raw_syndrome()
2637 	int eccbytes = chip->ecc.bytes;  in nand_read_page_raw_syndrome()
2638 	uint8_t *oob = chip->oob_poi;  in nand_read_page_raw_syndrome()
2645 	for (steps = chip->ecc.steps; steps > 0; steps--) {  in nand_read_page_raw_syndrome()
2652 		if (chip->ecc.prepad) {  in nand_read_page_raw_syndrome()
2653 			ret = nand_read_data_op(chip, oob, chip->ecc.prepad,  in nand_read_page_raw_syndrome()
2658 			oob += chip->ecc.prepad;  in nand_read_page_raw_syndrome()
2667 		if (chip->ecc.postpad) {  in nand_read_page_raw_syndrome()
2668 			ret = nand_read_data_op(chip, oob, chip->ecc.postpad,  in nand_read_page_raw_syndrome()
2673 			oob += chip->ecc.postpad;  in nand_read_page_raw_syndrome()
2677 	size = mtd->oobsize - (oob - chip->oob_poi);  in nand_read_page_raw_syndrome()
2688  * nand_read_page_swecc - [REPLACEABLE] software ECC based page read function
2689  * @chip: nand chip info structure
2691  * @oob_required: caller requires OOB data read to chip->oob_poi
2698 	int i, eccsize = chip->ecc.size, ret;  in nand_read_page_swecc()
2699 	int eccbytes = chip->ecc.bytes;  in nand_read_page_swecc()
2700 	int eccsteps = chip->ecc.steps;  in nand_read_page_swecc()
2702 	uint8_t *ecc_calc = chip->ecc.calc_buf;  in nand_read_page_swecc()
2703 	uint8_t *ecc_code = chip->ecc.code_buf;  in nand_read_page_swecc()
2706 	chip->ecc.read_page_raw(chip, buf, 1, page);  in nand_read_page_swecc()
2708 	for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize)  in nand_read_page_swecc()
2709 		chip->ecc.calculate(chip, p, &ecc_calc[i]);  in nand_read_page_swecc()
2711 	ret = mtd_ooblayout_get_eccbytes(mtd, ecc_code, chip->oob_poi, 0,  in nand_read_page_swecc()
2712 					 chip->ecc.total);  in nand_read_page_swecc()
2716 	eccsteps = chip->ecc.steps;  in nand_read_page_swecc()
2719 	for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {  in nand_read_page_swecc()
2722 		stat = chip->ecc.correct(chip, p, &ecc_code[i], &ecc_calc[i]);  in nand_read_page_swecc()
2724 			mtd->ecc_stats.failed++;  in nand_read_page_swecc()
2726 			mtd->ecc_stats.corrected += stat;  in nand_read_page_swecc()
2734  * nand_read_subpage - [REPLACEABLE] ECC based sub-page read function
2735  * @chip: nand chip info structure
2749 	int busw = (chip->options & NAND_BUSWIDTH_16) ? 2 : 1;  in nand_read_subpage()
2754 	/* Column address within the page aligned to ECC size (256bytes) */  in nand_read_subpage()
2755 	start_step = data_offs / chip->ecc.size;  in nand_read_subpage()
2756 	end_step = (data_offs + readlen - 1) / chip->ecc.size;  in nand_read_subpage()
2757 	num_steps = end_step - start_step + 1;  in nand_read_subpage()
2758 	index = start_step * chip->ecc.bytes;  in nand_read_subpage()
2760 	/* Data size aligned to ECC ecc.size */  in nand_read_subpage()
2761 	datafrag_len = num_steps * chip->ecc.size;  in nand_read_subpage()
2762 	eccfrag_len = num_steps * chip->ecc.bytes;  in nand_read_subpage()
2764 	data_col_addr = start_step * chip->ecc.size;  in nand_read_subpage()
2771 	/* Calculate ECC */  in nand_read_subpage()
2772 	for (i = 0; i < eccfrag_len ; i += chip->ecc.bytes, p += chip->ecc.size)  in nand_read_subpage()
2773 		chip->ecc.calculate(chip, p, &chip->ecc.calc_buf[i]);  in nand_read_subpage()
2777 	 * ecc.pos. Let's make sure that there are no gaps in ECC positions.  in nand_read_subpage()
2787 		ret = nand_change_read_column_op(chip, mtd->writesize,  in nand_read_subpage()
2788 						 chip->oob_poi, mtd->oobsize,  in nand_read_subpage()
2794 		 * Send the command to read the particular ECC bytes take care  in nand_read_subpage()
2797 		aligned_pos = oobregion.offset & ~(busw - 1);  in nand_read_subpage()
2799 		if (oobregion.offset & (busw - 1))  in nand_read_subpage()
2801 		if ((oobregion.offset + (num_steps * chip->ecc.bytes)) &  in nand_read_subpage()
2802 		    (busw - 1))  in nand_read_subpage()
2806 						 mtd->writesize + aligned_pos,  in nand_read_subpage()
2807 						 &chip->oob_poi[aligned_pos],  in nand_read_subpage()
2813 	ret = mtd_ooblayout_get_eccbytes(mtd, chip->ecc.code_buf,  in nand_read_subpage()
2814 					 chip->oob_poi, index, eccfrag_len);  in nand_read_subpage()
2819 	for (i = 0; i < eccfrag_len ; i += chip->ecc.bytes, p += chip->ecc.size) {  in nand_read_subpage()
2822 		stat = chip->ecc.correct(chip, p, &chip->ecc.code_buf[i],  in nand_read_subpage()
2823 					 &chip->ecc.calc_buf[i]);  in nand_read_subpage()
2824 		if (stat == -EBADMSG &&  in nand_read_subpage()
2825 		    (chip->ecc.options & NAND_ECC_GENERIC_ERASED_CHECK)) {  in nand_read_subpage()
2827 			stat = nand_check_erased_ecc_chunk(p, chip->ecc.size,  in nand_read_subpage()
2828 						&chip->ecc.code_buf[i],  in nand_read_subpage()
2829 						chip->ecc.bytes,  in nand_read_subpage()
2831 						chip->ecc.strength);  in nand_read_subpage()
2835 			mtd->ecc_stats.failed++;  in nand_read_subpage()
2837 			mtd->ecc_stats.corrected += stat;  in nand_read_subpage()
2845  * nand_read_page_hwecc - [REPLACEABLE] hardware ECC based page read function
2846  * @chip: nand chip info structure
2848  * @oob_required: caller requires OOB data read to chip->oob_poi
2851  * Not for syndrome calculating ECC controllers which need a special oob layout.
2857 	int i, eccsize = chip->ecc.size, ret;  in nand_read_page_hwecc()
2858 	int eccbytes = chip->ecc.bytes;  in nand_read_page_hwecc()
2859 	int eccsteps = chip->ecc.steps;  in nand_read_page_hwecc()
2861 	uint8_t *ecc_calc = chip->ecc.calc_buf;  in nand_read_page_hwecc()
2862 	uint8_t *ecc_code = chip->ecc.code_buf;  in nand_read_page_hwecc()
2869 	for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {  in nand_read_page_hwecc()
2870 		chip->ecc.hwctl(chip, NAND_ECC_READ);  in nand_read_page_hwecc()
2876 		chip->ecc.calculate(chip, p, &ecc_calc[i]);  in nand_read_page_hwecc()
2879 	ret = nand_read_data_op(chip, chip->oob_poi, mtd->oobsize, false);  in nand_read_page_hwecc()
2883 	ret = mtd_ooblayout_get_eccbytes(mtd, ecc_code, chip->oob_poi, 0,  in nand_read_page_hwecc()
2884 					 chip->ecc.total);  in nand_read_page_hwecc()
2888 	eccsteps = chip->ecc.steps;  in nand_read_page_hwecc()
2891 	for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {  in nand_read_page_hwecc()
2894 		stat = chip->ecc.correct(chip, p, &ecc_code[i], &ecc_calc[i]);  in nand_read_page_hwecc()
2895 		if (stat == -EBADMSG &&  in nand_read_page_hwecc()
2896 		    (chip->ecc.options & NAND_ECC_GENERIC_ERASED_CHECK)) {  in nand_read_page_hwecc()
2901 						chip->ecc.strength);  in nand_read_page_hwecc()
2905 			mtd->ecc_stats.failed++;  in nand_read_page_hwecc()
2907 			mtd->ecc_stats.corrected += stat;  in nand_read_page_hwecc()
2915  * nand_read_page_hwecc_oob_first - [REPLACEABLE] hw ecc, read oob first
2916  * @chip: nand chip info structure
2918  * @oob_required: caller requires OOB data read to chip->oob_poi
2921  * Hardware ECC for large page chips, require OOB to be read first. For this
2922  * ECC mode, the write_page method is re-used from ECC_HW. These methods
2923  * read/write ECC from the OOB area, unlike the ECC_HW_SYNDROME support with
2924  * multiple ECC steps, follows the "infix ECC" scheme and reads/writes ECC from
2925  * the data area, by overwriting the NAND manufacturer bad block markings.
2931 	int i, eccsize = chip->ecc.size, ret;  in nand_read_page_hwecc_oob_first()
2932 	int eccbytes = chip->ecc.bytes;  in nand_read_page_hwecc_oob_first()
2933 	int eccsteps = chip->ecc.steps;  in nand_read_page_hwecc_oob_first()
2935 	uint8_t *ecc_code = chip->ecc.code_buf;  in nand_read_page_hwecc_oob_first()
2936 	uint8_t *ecc_calc = chip->ecc.calc_buf;  in nand_read_page_hwecc_oob_first()
2940 	ret = nand_read_oob_op(chip, page, 0, chip->oob_poi, mtd->oobsize);  in nand_read_page_hwecc_oob_first()
2948 	ret = mtd_ooblayout_get_eccbytes(mtd, ecc_code, chip->oob_poi, 0,  in nand_read_page_hwecc_oob_first()
2949 					 chip->ecc.total);  in nand_read_page_hwecc_oob_first()
2953 	for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {  in nand_read_page_hwecc_oob_first()
2956 		chip->ecc.hwctl(chip, NAND_ECC_READ);  in nand_read_page_hwecc_oob_first()
2962 		chip->ecc.calculate(chip, p, &ecc_calc[i]);  in nand_read_page_hwecc_oob_first()
2964 		stat = chip->ecc.correct(chip, p, &ecc_code[i], NULL);  in nand_read_page_hwecc_oob_first()
2965 		if (stat == -EBADMSG &&  in nand_read_page_hwecc_oob_first()
2966 		    (chip->ecc.options & NAND_ECC_GENERIC_ERASED_CHECK)) {  in nand_read_page_hwecc_oob_first()
2971 						chip->ecc.strength);  in nand_read_page_hwecc_oob_first()
2975 			mtd->ecc_stats.failed++;  in nand_read_page_hwecc_oob_first()
2977 			mtd->ecc_stats.corrected += stat;  in nand_read_page_hwecc_oob_first()
2985  * nand_read_page_syndrome - [REPLACEABLE] hardware ECC syndrome based page read
2986  * @chip: nand chip info structure
2988  * @oob_required: caller requires OOB data read to chip->oob_poi
2998 	int ret, i, eccsize = chip->ecc.size;  in nand_read_page_syndrome()
2999 	int eccbytes = chip->ecc.bytes;  in nand_read_page_syndrome()
3000 	int eccsteps = chip->ecc.steps;  in nand_read_page_syndrome()
3001 	int eccpadbytes = eccbytes + chip->ecc.prepad + chip->ecc.postpad;  in nand_read_page_syndrome()
3003 	uint8_t *oob = chip->oob_poi;  in nand_read_page_syndrome()
3010 	for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {  in nand_read_page_syndrome()
3013 		chip->ecc.hwctl(chip, NAND_ECC_READ);  in nand_read_page_syndrome()
3019 		if (chip->ecc.prepad) {  in nand_read_page_syndrome()
3020 			ret = nand_read_data_op(chip, oob, chip->ecc.prepad,  in nand_read_page_syndrome()
3025 			oob += chip->ecc.prepad;  in nand_read_page_syndrome()
3028 		chip->ecc.hwctl(chip, NAND_ECC_READSYN);  in nand_read_page_syndrome()
3034 		stat = chip->ecc.correct(chip, p, oob, NULL);  in nand_read_page_syndrome()
3038 		if (chip->ecc.postpad) {  in nand_read_page_syndrome()
3039 			ret = nand_read_data_op(chip, oob, chip->ecc.postpad,  in nand_read_page_syndrome()
3044 			oob += chip->ecc.postpad;  in nand_read_page_syndrome()
3047 		if (stat == -EBADMSG &&  in nand_read_page_syndrome()
3048 		    (chip->ecc.options & NAND_ECC_GENERIC_ERASED_CHECK)) {  in nand_read_page_syndrome()
3050 			stat = nand_check_erased_ecc_chunk(p, chip->ecc.size,  in nand_read_page_syndrome()
3051 							   oob - eccpadbytes,  in nand_read_page_syndrome()
3054 							   chip->ecc.strength);  in nand_read_page_syndrome()
3058 			mtd->ecc_stats.failed++;  in nand_read_page_syndrome()
3060 			mtd->ecc_stats.corrected += stat;  in nand_read_page_syndrome()
3066 	i = mtd->oobsize - (oob - chip->oob_poi);  in nand_read_page_syndrome()
3077  * nand_transfer_oob - [INTERN] Transfer oob to client buffer
3078  * @chip: NAND chip object
3089 	switch (ops->mode) {  in nand_transfer_oob()
3093 		memcpy(oob, chip->oob_poi + ops->ooboffs, len);  in nand_transfer_oob()
3097 		ret = mtd_ooblayout_get_databytes(mtd, oob, chip->oob_poi,  in nand_transfer_oob()
3098 						  ops->ooboffs, len);  in nand_transfer_oob()
3109  * nand_setup_read_retry - [INTERN] Set the READ RETRY mode
3110  * @chip: NAND chip object
3114  * when there are too many bitflips in a page (i.e., ECC error). After setting
3121 	if (retry_mode >= chip->read_retries)  in nand_setup_read_retry()
3122 		return -EINVAL;  in nand_setup_read_retry()
3124 	if (!chip->setup_read_retry)  in nand_setup_read_retry()
3125 		return -EOPNOTSUPP;  in nand_setup_read_retry()
3127 	return chip->setup_read_retry(chip, retry_mode);  in nand_setup_read_retry()
3134 	if (!(chip->options & NAND_NEED_READRDY))  in nand_wait_readrdy()
3137 	sdr = nand_get_sdr_timings(&chip->data_interface);  in nand_wait_readrdy()
3138 	WARN_ON(nand_wait_rdy_op(chip, PSEC_TO_MSEC(sdr->tR_max), 0));  in nand_wait_readrdy()
3142  * nand_do_read_ops - [INTERN] Read data with ECC
3143  * @chip: NAND chip object
3155 	uint32_t readlen = ops->len;  in nand_do_read_ops()
3156 	uint32_t oobreadlen = ops->ooblen;  in nand_do_read_ops()
3165 	chipnr = (int)(from >> chip->chip_shift);  in nand_do_read_ops()
3168 	realpage = (int)(from >> chip->page_shift);  in nand_do_read_ops()
3169 	page = realpage & chip->pagemask;  in nand_do_read_ops()
3171 	col = (int)(from & (mtd->writesize - 1));  in nand_do_read_ops()
3173 	buf = ops->datbuf;  in nand_do_read_ops()
3174 	oob = ops->oobbuf;  in nand_do_read_ops()
3178 		unsigned int ecc_failures = mtd->ecc_stats.failed;  in nand_do_read_ops()
3180 		bytes = min(mtd->writesize - col, readlen);  in nand_do_read_ops()
3181 		aligned = (bytes == mtd->writesize);  in nand_do_read_ops()
3185 		else if (chip->options & NAND_USE_BOUNCE_BUFFER)  in nand_do_read_ops()
3188 						 chip->buf_align);  in nand_do_read_ops()
3193 		if (realpage != chip->pagecache.page || oob) {  in nand_do_read_ops()
3194 			bufpoi = use_bufpoi ? chip->data_buf : buf;  in nand_do_read_ops()
3203 			 * the read methods return max bitflips per ecc step.  in nand_do_read_ops()
3205 			if (unlikely(ops->mode == MTD_OPS_RAW))  in nand_do_read_ops()
3206 				ret = chip->ecc.read_page_raw(chip, bufpoi,  in nand_do_read_ops()
3211 				ret = chip->ecc.read_subpage(chip, col, bytes,  in nand_do_read_ops()
3214 				ret = chip->ecc.read_page(chip, bufpoi,  in nand_do_read_ops()
3219 					chip->pagecache.page = -1;  in nand_do_read_ops()
3226 				    !(mtd->ecc_stats.failed - ecc_failures) &&  in nand_do_read_ops()
3227 				    (ops->mode != MTD_OPS_RAW)) {  in nand_do_read_ops()
3228 					chip->pagecache.page = realpage;  in nand_do_read_ops()
3229 					chip->pagecache.bitflips = ret;  in nand_do_read_ops()
3232 					chip->pagecache.page = -1;  in nand_do_read_ops()
3234 				memcpy(buf, chip->data_buf + col, bytes);  in nand_do_read_ops()
3243 					oobreadlen -= toread;  in nand_do_read_ops()
3249 			if (mtd->ecc_stats.failed - ecc_failures) {  in nand_do_read_ops()
3250 				if (retry_mode + 1 < chip->read_retries) {  in nand_do_read_ops()
3258 					mtd->ecc_stats.failed = ecc_failures;  in nand_do_read_ops()
3269 			memcpy(buf, chip->data_buf + col, bytes);  in nand_do_read_ops()
3272 					     chip->pagecache.bitflips);  in nand_do_read_ops()
3275 		readlen -= bytes;  in nand_do_read_ops()
3293 		page = realpage & chip->pagemask;  in nand_do_read_ops()
3303 	ops->retlen = ops->len - (size_t) readlen;  in nand_do_read_ops()
3305 		ops->oobretlen = ops->ooblen - oobreadlen;  in nand_do_read_ops()
3311 		return -EBADMSG;  in nand_do_read_ops()
3317  * nand_read_oob_std - [REPLACEABLE] the most common OOB data read function
3318  * @chip: nand chip info structure
3325 	return nand_read_oob_op(chip, page, 0, chip->oob_poi, mtd->oobsize);  in nand_read_oob_std()
3330  * nand_read_oob_syndrome - [REPLACEABLE] OOB data read function for HW ECC
3332  * @chip: nand chip info structure
3338 	int length = mtd->oobsize;  in nand_read_oob_syndrome()
3339 	int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad;  in nand_read_oob_syndrome()
3340 	int eccsize = chip->ecc.size;  in nand_read_oob_syndrome()
3341 	uint8_t *bufpoi = chip->oob_poi;  in nand_read_oob_syndrome()
3344 	ret = nand_read_page_op(chip, page, chip->ecc.size, NULL, 0);  in nand_read_oob_syndrome()
3348 	for (i = 0; i < chip->ecc.steps; i++) {  in nand_read_oob_syndrome()
3353 			if (mtd->writesize > 512)  in nand_read_oob_syndrome()
3372 		length -= toread;  in nand_read_oob_syndrome()
3384  * nand_write_oob_std - [REPLACEABLE] the most common OOB data write function
3385  * @chip: nand chip info structure
3392 	return nand_prog_page_op(chip, page, mtd->writesize, chip->oob_poi,  in nand_write_oob_std()
3393 				 mtd->oobsize);  in nand_write_oob_std()
3398  * nand_write_oob_syndrome - [REPLACEABLE] OOB data write function for HW ECC
3399  *			     with syndrome - only for large page flash
3400  * @chip: nand chip info structure
3406 	int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad;  in nand_write_oob_syndrome()
3407 	int eccsize = chip->ecc.size, length = mtd->oobsize;  in nand_write_oob_syndrome()
3408 	int ret, i, len, pos, sndcmd = 0, steps = chip->ecc.steps;  in nand_write_oob_syndrome()
3409 	const uint8_t *bufpoi = chip->oob_poi;  in nand_write_oob_syndrome()
3412 	 * data-ecc-data-ecc ... ecc-oob  in nand_write_oob_syndrome()
3414 	 * data-pad-ecc-pad-data-pad .... ecc-pad-oob  in nand_write_oob_syndrome()
3416 	if (!chip->ecc.prepad && !chip->ecc.postpad) {  in nand_write_oob_syndrome()
3428 			if (mtd->writesize <= 512) {  in nand_write_oob_syndrome()
3440 					len -= num;  in nand_write_oob_syndrome()
3459 		length -= len;  in nand_write_oob_syndrome()
3471  * nand_do_read_oob - [INTERN] NAND read out-of-band
3472  * @chip: NAND chip object
3476  * NAND read out-of-band data from the spare area.
3485 	int readlen = ops->ooblen;  in nand_do_read_oob()
3487 	uint8_t *buf = ops->oobbuf;  in nand_do_read_oob()
3493 	stats = mtd->ecc_stats;  in nand_do_read_oob()
3497 	chipnr = (int)(from >> chip->chip_shift);  in nand_do_read_oob()
3501 	realpage = (int)(from >> chip->page_shift);  in nand_do_read_oob()
3502 	page = realpage & chip->pagemask;  in nand_do_read_oob()
3505 		if (ops->mode == MTD_OPS_RAW)  in nand_do_read_oob()
3506 			ret = chip->ecc.read_oob_raw(chip, page);  in nand_do_read_oob()
3508 			ret = chip->ecc.read_oob(chip, page);  in nand_do_read_oob()
3520 		readlen -= len;  in nand_do_read_oob()
3527 		page = realpage & chip->pagemask;  in nand_do_read_oob()
3537 	ops->oobretlen = ops->ooblen - readlen;  in nand_do_read_oob()
3542 	if (mtd->ecc_stats.failed - stats.failed)  in nand_do_read_oob()
3543 		return -EBADMSG;  in nand_do_read_oob()
3549  * nand_read_oob - [MTD Interface] NAND read data and/or out-of-band
3554  * NAND read data and/or out-of-band data.
3562 	ops->retlen = 0;  in nand_read_oob()
3564 	if (ops->mode != MTD_OPS_PLACE_OOB &&  in nand_read_oob()
3565 	    ops->mode != MTD_OPS_AUTO_OOB &&  in nand_read_oob()
3566 	    ops->mode != MTD_OPS_RAW)  in nand_read_oob()
3567 		return -ENOTSUPP;  in nand_read_oob()
3573 	if (!ops->datbuf)  in nand_read_oob()
3583  * nand_write_page_raw_notsupp - dummy raw page write function
3584  * @chip: nand chip info structure
3586  * @oob_required: must write chip->oob_poi to OOB
3589  * Returns -ENOTSUPP unconditionally.
3594 	return -ENOTSUPP;  in nand_write_page_raw_notsupp()
3598  * nand_write_page_raw - [INTERN] raw page write function
3599  * @chip: nand chip info structure
3601  * @oob_required: must write chip->oob_poi to OOB
3604  * Not for syndrome calculating ECC controllers, which use a special oob layout.
3612 	ret = nand_prog_page_begin_op(chip, page, 0, buf, mtd->writesize);  in nand_write_page_raw()
3617 		ret = nand_write_data_op(chip, chip->oob_poi, mtd->oobsize,  in nand_write_page_raw()
3628  * nand_write_page_raw_syndrome - [INTERN] raw page write function
3629  * @chip: nand chip info structure
3631  * @oob_required: must write chip->oob_poi to OOB
3634  * We need a special oob layout and handling even when ECC isn't checked.
3641 	int eccsize = chip->ecc.size;  in nand_write_page_raw_syndrome()
3642 	int eccbytes = chip->ecc.bytes;  in nand_write_page_raw_syndrome()
3643 	uint8_t *oob = chip->oob_poi;  in nand_write_page_raw_syndrome()
3650 	for (steps = chip->ecc.steps; steps > 0; steps--) {  in nand_write_page_raw_syndrome()
3657 		if (chip->ecc.prepad) {  in nand_write_page_raw_syndrome()
3658 			ret = nand_write_data_op(chip, oob, chip->ecc.prepad,  in nand_write_page_raw_syndrome()
3663 			oob += chip->ecc.prepad;  in nand_write_page_raw_syndrome()
3672 		if (chip->ecc.postpad) {  in nand_write_page_raw_syndrome()
3673 			ret = nand_write_data_op(chip, oob, chip->ecc.postpad,  in nand_write_page_raw_syndrome()
3678 			oob += chip->ecc.postpad;  in nand_write_page_raw_syndrome()
3682 	size = mtd->oobsize - (oob - chip->oob_poi);  in nand_write_page_raw_syndrome()
3692  * nand_write_page_swecc - [REPLACEABLE] software ECC based page write function
3693  * @chip: nand chip info structure
3695  * @oob_required: must write chip->oob_poi to OOB
3702 	int i, eccsize = chip->ecc.size, ret;  in nand_write_page_swecc()
3703 	int eccbytes = chip->ecc.bytes;  in nand_write_page_swecc()
3704 	int eccsteps = chip->ecc.steps;  in nand_write_page_swecc()
3705 	uint8_t *ecc_calc = chip->ecc.calc_buf;  in nand_write_page_swecc()
3708 	/* Software ECC calculation */  in nand_write_page_swecc()
3709 	for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize)  in nand_write_page_swecc()
3710 		chip->ecc.calculate(chip, p, &ecc_calc[i]);  in nand_write_page_swecc()
3712 	ret = mtd_ooblayout_set_eccbytes(mtd, ecc_calc, chip->oob_poi, 0,  in nand_write_page_swecc()
3713 					 chip->ecc.total);  in nand_write_page_swecc()
3717 	return chip->ecc.write_page_raw(chip, buf, 1, page);  in nand_write_page_swecc()
3721  * nand_write_page_hwecc - [REPLACEABLE] hardware ECC based page write function
3722  * @chip: nand chip info structure
3724  * @oob_required: must write chip->oob_poi to OOB
3731 	int i, eccsize = chip->ecc.size, ret;  in nand_write_page_hwecc()
3732 	int eccbytes = chip->ecc.bytes;  in nand_write_page_hwecc()
3733 	int eccsteps = chip->ecc.steps;  in nand_write_page_hwecc()
3734 	uint8_t *ecc_calc = chip->ecc.calc_buf;  in nand_write_page_hwecc()
3741 	for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {  in nand_write_page_hwecc()
3742 		chip->ecc.hwctl(chip, NAND_ECC_WRITE);  in nand_write_page_hwecc()
3748 		chip->ecc.calculate(chip, p, &ecc_calc[i]);  in nand_write_page_hwecc()
3751 	ret = mtd_ooblayout_set_eccbytes(mtd, ecc_calc, chip->oob_poi, 0,  in nand_write_page_hwecc()
3752 					 chip->ecc.total);  in nand_write_page_hwecc()
3756 	ret = nand_write_data_op(chip, chip->oob_poi, mtd->oobsize, false);  in nand_write_page_hwecc()
3765  * nand_write_subpage_hwecc - [REPLACEABLE] hardware ECC based subpage write
3766  * @chip:	nand chip info structure
3770  * @oob_required: must write chip->oob_poi to OOB
3778 	uint8_t *oob_buf  = chip->oob_poi;  in nand_write_subpage_hwecc()
3779 	uint8_t *ecc_calc = chip->ecc.calc_buf;  in nand_write_subpage_hwecc()
3780 	int ecc_size      = chip->ecc.size;  in nand_write_subpage_hwecc()
3781 	int ecc_bytes     = chip->ecc.bytes;  in nand_write_subpage_hwecc()
3782 	int ecc_steps     = chip->ecc.steps;  in nand_write_subpage_hwecc()
3784 	uint32_t end_step   = (offset + data_len - 1) / ecc_size;  in nand_write_subpage_hwecc()
3785 	int oob_bytes       = mtd->oobsize / ecc_steps;  in nand_write_subpage_hwecc()
3794 		chip->ecc.hwctl(chip, NAND_ECC_WRITE);  in nand_write_subpage_hwecc()
3801 		/* mask ECC of un-touched subpages by padding 0xFF */  in nand_write_subpage_hwecc()
3805 			chip->ecc.calculate(chip, buf, ecc_calc);  in nand_write_subpage_hwecc()
3807 		/* mask OOB of un-touched subpages by padding 0xFF */  in nand_write_subpage_hwecc()
3817 	/* copy calculated ECC for whole page to chip->buffer->oob */  in nand_write_subpage_hwecc()
3818 	/* this include masked-value(0xFF) for unwritten subpages */  in nand_write_subpage_hwecc()
3819 	ecc_calc = chip->ecc.calc_buf;  in nand_write_subpage_hwecc()
3820 	ret = mtd_ooblayout_set_eccbytes(mtd, ecc_calc, chip->oob_poi, 0,  in nand_write_subpage_hwecc()
3821 					 chip->ecc.total);  in nand_write_subpage_hwecc()
3825 	/* write OOB buffer to NAND device */  in nand_write_subpage_hwecc()
3826 	ret = nand_write_data_op(chip, chip->oob_poi, mtd->oobsize, false);  in nand_write_subpage_hwecc()
3835  * nand_write_page_syndrome - [REPLACEABLE] hardware ECC syndrome based page write
3836  * @chip: nand chip info structure
3838  * @oob_required: must write chip->oob_poi to OOB
3848 	int i, eccsize = chip->ecc.size;  in nand_write_page_syndrome()
3849 	int eccbytes = chip->ecc.bytes;  in nand_write_page_syndrome()
3850 	int eccsteps = chip->ecc.steps;  in nand_write_page_syndrome()
3852 	uint8_t *oob = chip->oob_poi;  in nand_write_page_syndrome()
3859 	for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {  in nand_write_page_syndrome()
3860 		chip->ecc.hwctl(chip, NAND_ECC_WRITE);  in nand_write_page_syndrome()
3866 		if (chip->ecc.prepad) {  in nand_write_page_syndrome()
3867 			ret = nand_write_data_op(chip, oob, chip->ecc.prepad,  in nand_write_page_syndrome()
3872 			oob += chip->ecc.prepad;  in nand_write_page_syndrome()
3875 		chip->ecc.calculate(chip, p, oob);  in nand_write_page_syndrome()
3883 		if (chip->ecc.postpad) {  in nand_write_page_syndrome()
3884 			ret = nand_write_data_op(chip, oob, chip->ecc.postpad,  in nand_write_page_syndrome()
3889 			oob += chip->ecc.postpad;  in nand_write_page_syndrome()
3894 	i = mtd->oobsize - (oob - chip->oob_poi);  in nand_write_page_syndrome()
3905  * nand_write_page - write one page
3906  * @chip: NAND chip descriptor
3910  * @oob_required: must write chip->oob_poi to OOB
3921 	if (!(chip->options & NAND_NO_SUBPAGE_WRITE) &&  in nand_write_page()
3922 		chip->ecc.write_subpage)  in nand_write_page()
3923 		subpage = offset || (data_len < mtd->writesize);  in nand_write_page()
3928 		status = chip->ecc.write_page_raw(chip, buf, oob_required,  in nand_write_page()
3931 		status = chip->ecc.write_subpage(chip, offset, data_len, buf,  in nand_write_page()
3934 		status = chip->ecc.write_page(chip, buf, oob_required, page);  in nand_write_page()
3942 #define NOTALIGNED(x)	((x & (chip->subpagesize - 1)) != 0)
3945  * nand_do_write_ops - [INTERN] NAND write with ECC
3946  * @chip: NAND chip object
3950  * NAND write with ECC.
3957 	uint32_t writelen = ops->len;  in nand_do_write_ops()
3959 	uint32_t oobwritelen = ops->ooblen;  in nand_do_write_ops()
3962 	uint8_t *oob = ops->oobbuf;  in nand_do_write_ops()
3963 	uint8_t *buf = ops->datbuf;  in nand_do_write_ops()
3967 	ops->retlen = 0;  in nand_do_write_ops()
3972 	if (NOTALIGNED(to) || NOTALIGNED(ops->len)) {  in nand_do_write_ops()
3975 		return -EINVAL;  in nand_do_write_ops()
3978 	column = to & (mtd->writesize - 1);  in nand_do_write_ops()
3980 	chipnr = (int)(to >> chip->chip_shift);  in nand_do_write_ops()
3985 		ret = -EIO;  in nand_do_write_ops()
3989 	realpage = (int)(to >> chip->page_shift);  in nand_do_write_ops()
3990 	page = realpage & chip->pagemask;  in nand_do_write_ops()
3993 	if (to <= ((loff_t)chip->pagecache.page << chip->page_shift) &&  in nand_do_write_ops()
3994 	    ((loff_t)chip->pagecache.page << chip->page_shift) < (to + ops->len))  in nand_do_write_ops()
3995 		chip->pagecache.page = -1;  in nand_do_write_ops()
3998 	if (oob && ops->ooboffs && (ops->ooboffs + ops->ooblen > oobmaxlen)) {  in nand_do_write_ops()
3999 		ret = -EINVAL;  in nand_do_write_ops()
4004 		int bytes = mtd->writesize;  in nand_do_write_ops()
4007 		int part_pagewr = (column || writelen < mtd->writesize);  in nand_do_write_ops()
4011 		else if (chip->options & NAND_USE_BOUNCE_BUFFER)  in nand_do_write_ops()
4014 						 chip->buf_align);  in nand_do_write_ops()
4023 				bytes = min_t(int, bytes - column, writelen);  in nand_do_write_ops()
4025 			memset(wbuf, 0xff, mtd->writesize);  in nand_do_write_ops()
4032 			oobwritelen -= len;  in nand_do_write_ops()
4035 			memset(chip->oob_poi, 0xff, mtd->oobsize);  in nand_do_write_ops()
4040 				      (ops->mode == MTD_OPS_RAW));  in nand_do_write_ops()
4044 		writelen -= bytes;  in nand_do_write_ops()
4052 		page = realpage & chip->pagemask;  in nand_do_write_ops()
4061 	ops->retlen = ops->len - writelen;  in nand_do_write_ops()
4063 		ops->oobretlen = ops->ooblen;  in nand_do_write_ops()
4071  * panic_nand_write - [MTD Interface] NAND write with ECC
4078  * NAND write with ECC. Used when performing writes in interrupt context, this
4085 	int chipnr = (int)(to >> chip->chip_shift);  in panic_nand_write()
4106  * nand_write_oob - [MTD Interface] NAND write data and/or out-of-band
4117 	ops->retlen = 0;  in nand_write_oob()
4123 	switch (ops->mode) {  in nand_write_oob()
4133 	if (!ops->datbuf)  in nand_write_oob()
4144  * nand_erase - [MTD Interface] erase block(s)
4156  * nand_erase_nand - [INTERN] erase block(s)
4157  * @chip: NAND chip object
4170 			__func__, (unsigned long long)instr->addr,  in nand_erase_nand()
4171 			(unsigned long long)instr->len);  in nand_erase_nand()
4173 	if (check_offs_len(chip, instr->addr, instr->len))  in nand_erase_nand()
4174 		return -EINVAL;  in nand_erase_nand()
4182 	page = (int)(instr->addr >> chip->page_shift);  in nand_erase_nand()
4183 	chipnr = (int)(instr->addr >> chip->chip_shift);  in nand_erase_nand()
4186 	pages_per_block = 1 << (chip->phys_erase_shift - chip->page_shift);  in nand_erase_nand()
4188 	/* Select the NAND device */  in nand_erase_nand()
4195 		ret = -EIO;  in nand_erase_nand()
4200 	len = instr->len;  in nand_erase_nand()
4205 					chip->page_shift, allowbbt)) {  in nand_erase_nand()
4208 			ret = -EIO;  in nand_erase_nand()
4216 		if (page <= chip->pagecache.page && chip->pagecache.page <  in nand_erase_nand()
4218 			chip->pagecache.page = -1;  in nand_erase_nand()
4220 		ret = nand_erase_op(chip, (page & chip->pagemask) >>  in nand_erase_nand()
4221 				    (chip->phys_erase_shift - chip->page_shift));  in nand_erase_nand()
4225 			instr->fail_addr =  in nand_erase_nand()
4226 				((loff_t)page << chip->page_shift);  in nand_erase_nand()
4231 		len -= (1ULL << chip->phys_erase_shift);  in nand_erase_nand()
4235 		if (len && !(page & chip->pagemask)) {  in nand_erase_nand()
4254  * nand_sync - [MTD Interface] sync
4272  * nand_block_isbad - [MTD Interface] Check if block at offset is bad
4279 	int chipnr = (int)(offs >> chip->chip_shift);  in nand_block_isbad()
4282 	/* Select the NAND device */  in nand_block_isbad()
4298  * nand_block_markbad - [MTD Interface] Mark block at the given offset as bad
4318  * nand_suspend - [MTD Interface] Suspend the NAND flash
4325 	mutex_lock(&chip->lock);  in nand_suspend()
4326 	chip->suspended = 1;  in nand_suspend()
4327 	mutex_unlock(&chip->lock);  in nand_suspend()
4333  * nand_resume - [MTD Interface] Resume the NAND flash
4340 	mutex_lock(&chip->lock);  in nand_resume()
4341 	if (chip->suspended)  in nand_resume()
4342 		chip->suspended = 0;  in nand_resume()
4346 	mutex_unlock(&chip->lock);  in nand_resume()
4350  * nand_shutdown - [MTD Interface] Finish the current NAND operation and
4363 	if (!chip->controller) {  in nand_set_defaults()
4364 		chip->controller = &chip->legacy.dummy_controller;  in nand_set_defaults()
4365 		nand_controller_init(chip->controller);  in nand_set_defaults()
4370 	if (!chip->buf_align)  in nand_set_defaults()
4371 		chip->buf_align = 1;  in nand_set_defaults()
4380 	s[len - 1] = 0;  in sanitize_string()
4383 	for (i = 0; i < len - 1; i++) {  in sanitize_string()
4393  * nand_id_has_period - Check if an ID string has a given wraparound period
4400  * period of 3). This is a helper function for nand_id_len(). Returns non-zero
4414  * nand_id_len - Get the length of an ID string returned by CMD_READID
4425 	/* Find last non-zero byte */  in nand_id_len()
4426 	for (last_nonzero = arrlen - 1; last_nonzero >= 0; last_nonzero--)  in nand_id_len()
4444 	if (last_nonzero < arrlen - 1)  in nand_id_len()
4462  * Many new NAND share similar device ID codes, which represent the size of the
4464  * manufacturer-specific "extended ID" decoding patterns.
4471 	u8 *id_data = chip->id.data;  in nand_decode_ext_id()
4473 	memorg = nanddev_get_memorg(&chip->base);  in nand_decode_ext_id()
4476 	memorg->bits_per_cell = nand_get_bits_per_cell(id_data[2]);  in nand_decode_ext_id()
4481 	memorg->pagesize = 1024 << (extid & 0x03);  in nand_decode_ext_id()
4482 	mtd->writesize = memorg->pagesize;  in nand_decode_ext_id()
4485 	memorg->oobsize = (8 << (extid & 0x01)) * (mtd->writesize >> 9);  in nand_decode_ext_id()
4486 	mtd->oobsize = memorg->oobsize;  in nand_decode_ext_id()
4489 	memorg->pages_per_eraseblock = ((64 * 1024) << (extid & 0x03)) /  in nand_decode_ext_id()
4490 				       memorg->pagesize;  in nand_decode_ext_id()
4491 	mtd->erasesize = (64 * 1024) << (extid & 0x03);  in nand_decode_ext_id()
4495 		chip->options |= NAND_BUSWIDTH_16;  in nand_decode_ext_id()
4509 	memorg = nanddev_get_memorg(&chip->base);  in nand_decode_id()
4511 	memorg->pages_per_eraseblock = type->erasesize / type->pagesize;  in nand_decode_id()
4512 	mtd->erasesize = type->erasesize;  in nand_decode_id()
4513 	memorg->pagesize = type->pagesize;  in nand_decode_id()
4514 	mtd->writesize = memorg->pagesize;  in nand_decode_id()
4515 	memorg->oobsize = memorg->pagesize / 32;  in nand_decode_id()
4516 	mtd->oobsize = memorg->oobsize;  in nand_decode_id()
4518 	/* All legacy ID NAND are small-page, SLC */  in nand_decode_id()
4519 	memorg->bits_per_cell = 1;  in nand_decode_id()
4525  * page size, cell-type information).
4532 	if (mtd->writesize > 512 || (chip->options & NAND_BUSWIDTH_16))  in nand_decode_bbm_options()
4533 		chip->badblockpos = NAND_BBM_POS_LARGE;  in nand_decode_bbm_options()
4535 		chip->badblockpos = NAND_BBM_POS_SMALL;  in nand_decode_bbm_options()
4540 	return type->id_len;  in is_full_id_nand()
4548 	u8 *id_data = chip->id.data;  in find_full_id_nand()
4550 	memorg = nanddev_get_memorg(&chip->base);  in find_full_id_nand()
4552 	if (!strncmp(type->id, id_data, type->id_len)) {  in find_full_id_nand()
4553 		memorg->pagesize = type->pagesize;  in find_full_id_nand()
4554 		mtd->writesize = memorg->pagesize;  in find_full_id_nand()
4555 		memorg->pages_per_eraseblock = type->erasesize /  in find_full_id_nand()
4556 					       type->pagesize;  in find_full_id_nand()
4557 		mtd->erasesize = type->erasesize;  in find_full_id_nand()
4558 		memorg->oobsize = type->oobsize;  in find_full_id_nand()
4559 		mtd->oobsize = memorg->oobsize;  in find_full_id_nand()
4561 		memorg->bits_per_cell = nand_get_bits_per_cell(id_data[2]);  in find_full_id_nand()
4562 		memorg->eraseblocks_per_lun =  in find_full_id_nand()
4563 			DIV_ROUND_DOWN_ULL((u64)type->chipsize << 20,  in find_full_id_nand()
4564 					   memorg->pagesize *  in find_full_id_nand()
4565 					   memorg->pages_per_eraseblock);  in find_full_id_nand()
4566 		chip->options |= type->options;  in find_full_id_nand()
4567 		chip->base.eccreq.strength = NAND_ECC_STRENGTH(type);  in find_full_id_nand()
4568 		chip->base.eccreq.step_size = NAND_ECC_STEP(type);  in find_full_id_nand()
4569 		chip->onfi_timing_mode_default =  in find_full_id_nand()
4570 					type->onfi_timing_mode_default;  in find_full_id_nand()
4572 		chip->parameters.model = kstrdup(type->name, GFP_KERNEL);  in find_full_id_nand()
4573 		if (!chip->parameters.model)  in find_full_id_nand()
4582  * Manufacturer detection. Only used when the NAND is not ONFI or JEDEC
4583  * compliant and does not have a full-id or legacy-id entry in the nand_ids
4592 	if (chip->manufacturer.desc && chip->manufacturer.desc->ops &&  in nand_manufacturer_detect()
4593 	    chip->manufacturer.desc->ops->detect) {  in nand_manufacturer_detect()
4596 		memorg = nanddev_get_memorg(&chip->base);  in nand_manufacturer_detect()
4599 		memorg->bits_per_cell = nand_get_bits_per_cell(chip->id.data[2]);  in nand_manufacturer_detect()
4600 		chip->manufacturer.desc->ops->detect(chip);  in nand_manufacturer_detect()
4610  * their ->init() hook.
4614 	if (!chip->manufacturer.desc || !chip->manufacturer.desc->ops ||  in nand_manufacturer_init()
4615 	    !chip->manufacturer.desc->ops->init)  in nand_manufacturer_init()
4618 	return chip->manufacturer.desc->ops->init(chip);  in nand_manufacturer_init()
4625  * ->cleanup() hook.
4630 	if (chip->manufacturer.desc && chip->manufacturer.desc->ops &&  in nand_manufacturer_cleanup()
4631 	    chip->manufacturer.desc->ops->cleanup)  in nand_manufacturer_cleanup()
4632 		chip->manufacturer.desc->ops->cleanup(chip);  in nand_manufacturer_cleanup()
4638 	return manufacturer ? manufacturer->name : "Unknown";  in nand_manufacturer_name()
4650 	u8 *id_data = chip->id.data;  in nand_detect()
4656 	 * unassigned by the ID-based detection logic.  in nand_detect()
4658 	memorg = nanddev_get_memorg(&chip->base);  in nand_detect()
4659 	memorg->planes_per_lun = 1;  in nand_detect()
4660 	memorg->luns_per_target = 1;  in nand_detect()
4664 	 * after power-up.  in nand_detect()
4683 	 * Try again to make sure, as some systems the bus-hold or other  in nand_detect()
4685 	 * possibly credible NAND flash to appear. If the two results do  in nand_detect()
4690 	ret = nand_readid_op(chip, 0, id_data, sizeof(chip->id.data));  in nand_detect()
4697 		return -ENODEV;  in nand_detect()
4700 	chip->id.len = nand_id_len(id_data, ARRAY_SIZE(chip->id.data));  in nand_detect()
4704 	chip->manufacturer.desc = manufacturer;  in nand_detect()
4710 	 * Save the NAND_BUSWIDTH_16 flag before letting auto-detection logic  in nand_detect()
4712 	 * This is required to make sure initial NAND bus width set by the  in nand_detect()
4713 	 * NAND controller driver is coherent with the real NAND bus width  in nand_detect()
4714 	 * (extracted by auto-detection code).  in nand_detect()
4716 	busw = chip->options & NAND_BUSWIDTH_16;  in nand_detect()
4720 	 * before starting auto-detection.  in nand_detect()
4722 	chip->options &= ~NAND_BUSWIDTH_16;  in nand_detect()
4724 	for (; type->name != NULL; type++) {  in nand_detect()
4728 		} else if (dev_id == type->dev_id) {  in nand_detect()
4733 	if (!type->name || !type->pagesize) {  in nand_detect()
4749 	if (!type->name)  in nand_detect()
4750 		return -ENODEV;  in nand_detect()
4752 	chip->parameters.model = kstrdup(type->name, GFP_KERNEL);  in nand_detect()
4753 	if (!chip->parameters.model)  in nand_detect()
4754 		return -ENOMEM;  in nand_detect()
4756 	if (!type->pagesize)  in nand_detect()
4762 	chip->options |= type->options;  in nand_detect()
4764 	memorg->eraseblocks_per_lun =  in nand_detect()
4765 			DIV_ROUND_DOWN_ULL((u64)type->chipsize << 20,  in nand_detect()
4766 					   memorg->pagesize *  in nand_detect()
4767 					   memorg->pages_per_eraseblock);  in nand_detect()
4770 	if (!mtd->name)  in nand_detect()
4771 		mtd->name = chip->parameters.model;  in nand_detect()
4773 	if (chip->options & NAND_BUSWIDTH_AUTO) {  in nand_detect()
4776 	} else if (busw != (chip->options & NAND_BUSWIDTH_16)) {  in nand_detect()
4784 			mtd->name);  in nand_detect()
4786 			(chip->options & NAND_BUSWIDTH_16) ? 16 : 8);  in nand_detect()
4787 		ret = -EINVAL;  in nand_detect()
4795 	chip->page_shift = ffs(mtd->writesize) - 1;  in nand_detect()
4796 	/* Convert chipsize to number of pages per chip -1 */  in nand_detect()
4797 	targetsize = nanddev_target_size(&chip->base);  in nand_detect()
4798 	chip->pagemask = (targetsize >> chip->page_shift) - 1;  in nand_detect()
4800 	chip->bbt_erase_shift = chip->phys_erase_shift =  in nand_detect()
4801 		ffs(mtd->erasesize) - 1;  in nand_detect()
4803 		chip->chip_shift = ffs((unsigned)targetsize) - 1;  in nand_detect()
4805 		chip->chip_shift = ffs((unsigned)(targetsize >> 32));  in nand_detect()
4806 		chip->chip_shift += 32 - 1;  in nand_detect()
4809 	if (chip->chip_shift - chip->page_shift > 16)  in nand_detect()
4810 		chip->options |= NAND_ROW_ADDR_3;  in nand_detect()
4812 	chip->badblockbits = 8;  in nand_detect()
4819 		chip->parameters.model);  in nand_detect()
4822 		mtd->erasesize >> 10, mtd->writesize, mtd->oobsize);  in nand_detect()
4826 	kfree(chip->parameters.model);  in nand_detect()
4837 	[NAND_ECC_ON_DIE]	= "on-die",
4845 	err = of_property_read_string(np, "nand-ecc-mode", &pm);  in of_get_nand_ecc_mode()
4861 	return -ENODEV;  in of_get_nand_ecc_mode()
4875 	err = of_property_read_string(np, "nand-ecc-algo", &pm);  in of_get_nand_ecc_algo()
4880 		return -ENODEV;  in of_get_nand_ecc_algo()
4884 	 * For backward compatibility we also read "nand-ecc-mode" checking  in of_get_nand_ecc_algo()
4885 	 * for some obsoleted values that were specifying ECC algorithm.  in of_get_nand_ecc_algo()
4887 	err = of_property_read_string(np, "nand-ecc-mode", &pm);  in of_get_nand_ecc_algo()
4896 	return -ENODEV;  in of_get_nand_ecc_algo()
4904 	ret = of_property_read_u32(np, "nand-ecc-step-size", &val);  in of_get_nand_ecc_step_size()
4913 	ret = of_property_read_u32(np, "nand-ecc-strength", &val);  in of_get_nand_ecc_strength()
4921 	if (of_property_read_u32(np, "nand-bus-width", &val))  in of_get_nand_bus_width()
4929 		return -EIO;  in of_get_nand_bus_width()
4935 	return of_property_read_bool(np, "nand-on-flash-bbt");  in of_get_nand_on_flash_bbt()
4947 		chip->options |= NAND_BUSWIDTH_16;  in nand_dt_init()
4949 	if (of_property_read_bool(dn, "nand-is-boot-medium"))  in nand_dt_init()
4950 		chip->options |= NAND_IS_BOOT_MEDIUM;  in nand_dt_init()
4953 		chip->bbt_options |= NAND_BBT_USE_FLASH;  in nand_dt_init()
4961 		chip->ecc.mode = ecc_mode;  in nand_dt_init()
4964 		chip->ecc.algo = ecc_algo;  in nand_dt_init()
4967 		chip->ecc.strength = ecc_strength;  in nand_dt_init()
4970 		chip->ecc.size = ecc_step;  in nand_dt_init()
4972 	if (of_property_read_bool(dn, "nand-ecc-maximize"))  in nand_dt_init()
4973 		chip->ecc.options |= NAND_ECC_MAXIMIZE;  in nand_dt_init()
4979  * nand_scan_ident - Scan for the NAND device
4980  * @chip: NAND chip object
4982  * @table: alternative NAND ID table
4988  * to tweak some ECC-related parameters before nand_scan_tail(). This separation
4990  * as been banned for the benefit of the ->init_ecc()/cleanup_ecc() hooks.
5001 	memorg = nanddev_get_memorg(&chip->base);  in nand_scan_ident()
5004 	chip->cur_cs = -1;  in nand_scan_ident()
5006 	mutex_init(&chip->lock);  in nand_scan_ident()
5015 	if (!mtd->name && mtd->dev.parent)  in nand_scan_ident()
5016 		mtd->name = dev_name(mtd->dev.parent);  in nand_scan_ident()
5025 	memorg->ntargets = maxchips;  in nand_scan_ident()
5030 		if (!(chip->options & NAND_SCAN_SILENT_NODEV))  in nand_scan_ident()
5031 			pr_warn("No NAND device found\n");  in nand_scan_ident()
5036 	nand_maf_id = chip->id.data[0];  in nand_scan_ident()
5037 	nand_dev_id = chip->id.data[1];  in nand_scan_ident()
5066 	memorg->ntargets = i;  in nand_scan_ident()
5067 	mtd->size = i * nanddev_target_size(&chip->base);  in nand_scan_ident()
5074 	kfree(chip->parameters.model);  in nand_scan_ident_cleanup()
5075 	kfree(chip->parameters.onfi);  in nand_scan_ident_cleanup()
5081 	struct nand_ecc_ctrl *ecc = &chip->ecc;  in nand_set_ecc_soft_ops()  local
5083 	if (WARN_ON(ecc->mode != NAND_ECC_SOFT))  in nand_set_ecc_soft_ops()
5084 		return -EINVAL;  in nand_set_ecc_soft_ops()
5086 	switch (ecc->algo) {  in nand_set_ecc_soft_ops()
5088 		ecc->calculate = nand_calculate_ecc;  in nand_set_ecc_soft_ops()
5089 		ecc->correct = nand_correct_data;  in nand_set_ecc_soft_ops()
5090 		ecc->read_page = nand_read_page_swecc;  in nand_set_ecc_soft_ops()
5091 		ecc->read_subpage = nand_read_subpage;  in nand_set_ecc_soft_ops()
5092 		ecc->write_page = nand_write_page_swecc;  in nand_set_ecc_soft_ops()
5093 		ecc->read_page_raw = nand_read_page_raw;  in nand_set_ecc_soft_ops()
5094 		ecc->write_page_raw = nand_write_page_raw;  in nand_set_ecc_soft_ops()
5095 		ecc->read_oob = nand_read_oob_std;  in nand_set_ecc_soft_ops()
5096 		ecc->write_oob = nand_write_oob_std;  in nand_set_ecc_soft_ops()
5097 		if (!ecc->size)  in nand_set_ecc_soft_ops()
5098 			ecc->size = 256;  in nand_set_ecc_soft_ops()
5099 		ecc->bytes = 3;  in nand_set_ecc_soft_ops()
5100 		ecc->strength = 1;  in nand_set_ecc_soft_ops()
5103 			ecc->options |= NAND_ECC_SOFT_HAMMING_SM_ORDER;  in nand_set_ecc_soft_ops()
5109 			return -EINVAL;  in nand_set_ecc_soft_ops()
5111 		ecc->calculate = nand_bch_calculate_ecc;  in nand_set_ecc_soft_ops()
5112 		ecc->correct = nand_bch_correct_data;  in nand_set_ecc_soft_ops()
5113 		ecc->read_page = nand_read_page_swecc;  in nand_set_ecc_soft_ops()
5114 		ecc->read_subpage = nand_read_subpage;  in nand_set_ecc_soft_ops()
5115 		ecc->write_page = nand_write_page_swecc;  in nand_set_ecc_soft_ops()
5116 		ecc->read_page_raw = nand_read_page_raw;  in nand_set_ecc_soft_ops()
5117 		ecc->write_page_raw = nand_write_page_raw;  in nand_set_ecc_soft_ops()
5118 		ecc->read_oob = nand_read_oob_std;  in nand_set_ecc_soft_ops()
5119 		ecc->write_oob = nand_write_oob_std;  in nand_set_ecc_soft_ops()
5122 		* Board driver should supply ecc.size and ecc.strength  in nand_set_ecc_soft_ops()
5126 		if (!ecc->size && (mtd->oobsize >= 64)) {  in nand_set_ecc_soft_ops()
5127 			ecc->size = 512;  in nand_set_ecc_soft_ops()
5128 			ecc->strength = 4;  in nand_set_ecc_soft_ops()
5132 		 * if no ecc placement scheme was provided pickup the default  in nand_set_ecc_soft_ops()
5135 		if (!mtd->ooblayout) {  in nand_set_ecc_soft_ops()
5137 			if (mtd->oobsize < 64) {  in nand_set_ecc_soft_ops()
5139 				return -EINVAL;  in nand_set_ecc_soft_ops()
5147 		 * We can only maximize ECC config when the default layout is  in nand_set_ecc_soft_ops()
5151 		if (mtd->ooblayout == &nand_ooblayout_lp_ops &&  in nand_set_ecc_soft_ops()
5152 		    ecc->options & NAND_ECC_MAXIMIZE) {  in nand_set_ecc_soft_ops()
5156 			ecc->size = 1024;  in nand_set_ecc_soft_ops()
5157 			steps = mtd->writesize / ecc->size;  in nand_set_ecc_soft_ops()
5160 			bytes = (mtd->oobsize - 2) / steps;  in nand_set_ecc_soft_ops()
5161 			ecc->strength = bytes * 8 / fls(8 * ecc->size);  in nand_set_ecc_soft_ops()
5165 		ecc->bytes = 0;  in nand_set_ecc_soft_ops()
5166 		ecc->priv = nand_bch_init(mtd);  in nand_set_ecc_soft_ops()
5167 		if (!ecc->priv) {  in nand_set_ecc_soft_ops()
5168 			WARN(1, "BCH ECC initialization failed!\n");  in nand_set_ecc_soft_ops()
5169 			return -EINVAL;  in nand_set_ecc_soft_ops()
5173 		WARN(1, "Unsupported ECC algorithm!\n");  in nand_set_ecc_soft_ops()
5174 		return -EINVAL;  in nand_set_ecc_soft_ops()
5179  * nand_check_ecc_caps - check the sanity of preset ECC settings
5180  * @chip: nand chip info structure
5181  * @caps: ECC caps info structure
5182  * @oobavail: OOB size that the ECC engine can use
5184  * When ECC step size and strength are already set, check if they are supported
5185  * by the controller and the calculated ECC bytes fit within the chip's OOB.
5186  * On success, the calculated ECC bytes is set.
5194 	int preset_step = chip->ecc.size;  in nand_check_ecc_caps()
5195 	int preset_strength = chip->ecc.strength;  in nand_check_ecc_caps()
5196 	int ecc_bytes, nsteps = mtd->writesize / preset_step;  in nand_check_ecc_caps()
5199 	for (i = 0; i < caps->nstepinfos; i++) {  in nand_check_ecc_caps()
5200 		stepinfo = &caps->stepinfos[i];  in nand_check_ecc_caps()
5202 		if (stepinfo->stepsize != preset_step)  in nand_check_ecc_caps()
5205 		for (j = 0; j < stepinfo->nstrengths; j++) {  in nand_check_ecc_caps()
5206 			if (stepinfo->strengths[j] != preset_strength)  in nand_check_ecc_caps()
5209 			ecc_bytes = caps->calc_ecc_bytes(preset_step,  in nand_check_ecc_caps()
5215 				pr_err("ECC (step, strength) = (%d, %d) does not fit in OOB",  in nand_check_ecc_caps()
5217 				return -ENOSPC;  in nand_check_ecc_caps()
5220 			chip->ecc.bytes = ecc_bytes;  in nand_check_ecc_caps()
5226 	pr_err("ECC (step, strength) = (%d, %d) not supported on this controller",  in nand_check_ecc_caps()
5229 	return -ENOTSUPP;  in nand_check_ecc_caps()
5233  * nand_match_ecc_req - meet the chip's requirement with least ECC bytes
5234  * @chip: nand chip info structure
5235  * @caps: ECC engine caps info structure
5236  * @oobavail: OOB size that the ECC engine can use
5238  * If a chip's ECC requirement is provided, try to meet it with the least
5239  * number of ECC bytes (i.e. with the largest number of OOB-free bytes).
5240  * On success, the chosen ECC settings are set.
5248 	int req_step = chip->base.eccreq.step_size;  in nand_match_ecc_req()
5249 	int req_strength = chip->base.eccreq.strength;  in nand_match_ecc_req()
5255 	/* No information provided by the NAND chip */  in nand_match_ecc_req()
5257 		return -ENOTSUPP;  in nand_match_ecc_req()
5260 	req_corr = mtd->writesize / req_step * req_strength;  in nand_match_ecc_req()
5262 	for (i = 0; i < caps->nstepinfos; i++) {  in nand_match_ecc_req()
5263 		stepinfo = &caps->stepinfos[i];  in nand_match_ecc_req()
5264 		step_size = stepinfo->stepsize;  in nand_match_ecc_req()
5266 		for (j = 0; j < stepinfo->nstrengths; j++) {  in nand_match_ecc_req()
5267 			strength = stepinfo->strengths[j];  in nand_match_ecc_req()
5277 			if (mtd->writesize % step_size)  in nand_match_ecc_req()
5280 			nsteps = mtd->writesize / step_size;  in nand_match_ecc_req()
5282 			ecc_bytes = caps->calc_ecc_bytes(step_size, strength);  in nand_match_ecc_req()
5293 			 * with the least number of ECC bytes.  in nand_match_ecc_req()
5305 		return -ENOTSUPP;  in nand_match_ecc_req()
5307 	chip->ecc.size = best_step;  in nand_match_ecc_req()
5308 	chip->ecc.strength = best_strength;  in nand_match_ecc_req()
5309 	chip->ecc.bytes = best_ecc_bytes;  in nand_match_ecc_req()
5315  * nand_maximize_ecc - choose the max ECC strength available
5316  * @chip: nand chip info structure
5317  * @caps: ECC engine caps info structure
5318  * @oobavail: OOB size that the ECC engine can use
5320  * Choose the max ECC strength that is supported on the controller, and can fit
5321  * within the chip's OOB.  On success, the chosen ECC settings are set.
5335 	for (i = 0; i < caps->nstepinfos; i++) {  in nand_maximize_ecc()
5336 		stepinfo = &caps->stepinfos[i];  in nand_maximize_ecc()
5337 		step_size = stepinfo->stepsize;  in nand_maximize_ecc()
5339 		/* If chip->ecc.size is already set, respect it */  in nand_maximize_ecc()
5340 		if (chip->ecc.size && step_size != chip->ecc.size)  in nand_maximize_ecc()
5343 		for (j = 0; j < stepinfo->nstrengths; j++) {  in nand_maximize_ecc()
5344 			strength = stepinfo->strengths[j];  in nand_maximize_ecc()
5346 			if (mtd->writesize % step_size)  in nand_maximize_ecc()
5349 			nsteps = mtd->writesize / step_size;  in nand_maximize_ecc()
5351 			ecc_bytes = caps->calc_ecc_bytes(step_size, strength);  in nand_maximize_ecc()
5375 		return -ENOTSUPP;  in nand_maximize_ecc()
5377 	chip->ecc.size = best_step;  in nand_maximize_ecc()
5378 	chip->ecc.strength = best_strength;  in nand_maximize_ecc()
5379 	chip->ecc.bytes = best_ecc_bytes;  in nand_maximize_ecc()
5385  * nand_ecc_choose_conf - Set the ECC strength and ECC step size
5386  * @chip: nand chip info structure
5387  * @caps: ECC engine caps info structure
5388  * @oobavail: OOB size that the ECC engine can use
5390  * Choose the ECC configuration according to following logic
5392  * 1. If both ECC step size and ECC strength are already set (usually by DT)
5394  * 2. If NAND_ECC_MAXIMIZE is set, then select maximum ECC strength.
5395  * 3. Otherwise, try to match the ECC step size and ECC strength closest
5397  *    requirement then fallback to the maximum ECC step size and ECC strength.
5399  * On success, the chosen ECC settings are set.
5406 	if (WARN_ON(oobavail < 0 || oobavail > mtd->oobsize))  in nand_ecc_choose_conf()
5407 		return -EINVAL;  in nand_ecc_choose_conf()
5409 	if (chip->ecc.size && chip->ecc.strength)  in nand_ecc_choose_conf()
5412 	if (chip->ecc.options & NAND_ECC_MAXIMIZE)  in nand_ecc_choose_conf()
5439 	struct nand_ecc_ctrl *ecc = &chip->ecc;  in nand_ecc_strength_good()  local
5442 	if (ecc->size == 0 || chip->base.eccreq.step_size == 0)  in nand_ecc_strength_good()
5450 	corr = (mtd->writesize * ecc->strength) / ecc->size;  in nand_ecc_strength_good()
5451 	ds_corr = (mtd->writesize * chip->base.eccreq.strength) /  in nand_ecc_strength_good()
5452 		  chip->base.eccreq.step_size;  in nand_ecc_strength_good()
5454 	return corr >= ds_corr && ecc->strength >= chip->base.eccreq.strength;  in nand_ecc_strength_good()
5457 static int rawnand_erase(struct nand_device *nand, const struct nand_pos *pos)  in rawnand_erase()  argument
5459 	struct nand_chip *chip = container_of(nand, struct nand_chip,  in rawnand_erase()
5461 	unsigned int eb = nanddev_pos_to_row(nand, pos);  in rawnand_erase()
5464 	eb >>= nand->rowconv.eraseblock_addr_shift;  in rawnand_erase()
5466 	nand_select_target(chip, pos->target);  in rawnand_erase()
5473 static int rawnand_markbad(struct nand_device *nand,  in rawnand_markbad()  argument
5476 	struct nand_chip *chip = container_of(nand, struct nand_chip,  in rawnand_markbad()
5479 	return nand_markbad_bbm(chip, nanddev_pos_to_offs(nand, pos));  in rawnand_markbad()
5482 static bool rawnand_isbad(struct nand_device *nand, const struct nand_pos *pos)  in rawnand_isbad()  argument
5484 	struct nand_chip *chip = container_of(nand, struct nand_chip,  in rawnand_isbad()
5488 	nand_select_target(chip, pos->target);  in rawnand_isbad()
5489 	ret = nand_isbad_bbm(chip, nanddev_pos_to_offs(nand, pos));  in rawnand_isbad()
5502  * nand_scan_tail - Scan for the NAND device
5503  * @chip: NAND chip object
5512 	struct nand_ecc_ctrl *ecc = &chip->ecc;  in nand_scan_tail()  local
5515 	/* New bad blocks should be marked in OOB, flash-based BBT, or both */  in nand_scan_tail()
5516 	if (WARN_ON((chip->bbt_options & NAND_BBT_NO_OOB_BBM) &&  in nand_scan_tail()
5517 		   !(chip->bbt_options & NAND_BBT_USE_FLASH))) {  in nand_scan_tail()
5518 		return -EINVAL;  in nand_scan_tail()
5521 	chip->data_buf = kmalloc(mtd->writesize + mtd->oobsize, GFP_KERNEL);  in nand_scan_tail()
5522 	if (!chip->data_buf)  in nand_scan_tail()
5523 		return -ENOMEM;  in nand_scan_tail()
5526 	 * FIXME: some NAND manufacturer drivers expect the first die to be  in nand_scan_tail()
5527 	 * selected when manufacturer->init() is called. They should be fixed  in nand_scan_tail()
5528 	 * to explictly select the relevant die when interacting with the NAND  in nand_scan_tail()
5538 	chip->oob_poi = chip->data_buf + mtd->writesize;  in nand_scan_tail()
5543 	if (!mtd->ooblayout &&  in nand_scan_tail()
5544 	    !(ecc->mode == NAND_ECC_SOFT && ecc->algo == NAND_ECC_BCH)) {  in nand_scan_tail()
5545 		switch (mtd->oobsize) {  in nand_scan_tail()
5558 			 * ->oobsize, but we must keep the old large/small  in nand_scan_tail()
5559 			 * page with ECC layout when ->oobsize <= 128 for  in nand_scan_tail()
5562 			if (ecc->mode == NAND_ECC_NONE) {  in nand_scan_tail()
5569 				mtd->oobsize);  in nand_scan_tail()
5570 			ret = -EINVAL;  in nand_scan_tail()
5576 	 * Check ECC mode, default to software if 3byte/512byte hardware ECC is  in nand_scan_tail()
5577 	 * selected and we have 256 byte pagesize fallback to software ECC  in nand_scan_tail()
5580 	switch (ecc->mode) {  in nand_scan_tail()
5583 		if (!ecc->calculate || !ecc->correct || !ecc->hwctl) {  in nand_scan_tail()
5584 			WARN(1, "No ECC functions supplied; hardware ECC not possible\n");  in nand_scan_tail()
5585 			ret = -EINVAL;  in nand_scan_tail()
5588 		if (!ecc->read_page)  in nand_scan_tail()
5589 			ecc->read_page = nand_read_page_hwecc_oob_first;  in nand_scan_tail()
5594 		if (!ecc->read_page)  in nand_scan_tail()
5595 			ecc->read_page = nand_read_page_hwecc;  in nand_scan_tail()
5596 		if (!ecc->write_page)  in nand_scan_tail()
5597 			ecc->write_page = nand_write_page_hwecc;  in nand_scan_tail()
5598 		if (!ecc->read_page_raw)  in nand_scan_tail()
5599 			ecc->read_page_raw = nand_read_page_raw;  in nand_scan_tail()
5600 		if (!ecc->write_page_raw)  in nand_scan_tail()
5601 			ecc->write_page_raw = nand_write_page_raw;  in nand_scan_tail()
5602 		if (!ecc->read_oob)  in nand_scan_tail()
5603 			ecc->read_oob = nand_read_oob_std;  in nand_scan_tail()
5604 		if (!ecc->write_oob)  in nand_scan_tail()
5605 			ecc->write_oob = nand_write_oob_std;  in nand_scan_tail()
5606 		if (!ecc->read_subpage)  in nand_scan_tail()
5607 			ecc->read_subpage = nand_read_subpage;  in nand_scan_tail()
5608 		if (!ecc->write_subpage && ecc->hwctl && ecc->calculate)  in nand_scan_tail()
5609 			ecc->write_subpage = nand_write_subpage_hwecc;  in nand_scan_tail()
5613 		if ((!ecc->calculate || !ecc->correct || !ecc->hwctl) &&  in nand_scan_tail()
5614 		    (!ecc->read_page ||  in nand_scan_tail()
5615 		     ecc->read_page == nand_read_page_hwecc ||  in nand_scan_tail()
5616 		     !ecc->write_page ||  in nand_scan_tail()
5617 		     ecc->write_page == nand_write_page_hwecc)) {  in nand_scan_tail()
5618 			WARN(1, "No ECC functions supplied; hardware ECC not possible\n");  in nand_scan_tail()
5619 			ret = -EINVAL;  in nand_scan_tail()
5623 		if (!ecc->read_page)  in nand_scan_tail()
5624 			ecc->read_page = nand_read_page_syndrome;  in nand_scan_tail()
5625 		if (!ecc->write_page)  in nand_scan_tail()
5626 			ecc->write_page = nand_write_page_syndrome;  in nand_scan_tail()
5627 		if (!ecc->read_page_raw)  in nand_scan_tail()
5628 			ecc->read_page_raw = nand_read_page_raw_syndrome;  in nand_scan_tail()
5629 		if (!ecc->write_page_raw)  in nand_scan_tail()
5630 			ecc->write_page_raw = nand_write_page_raw_syndrome;  in nand_scan_tail()
5631 		if (!ecc->read_oob)  in nand_scan_tail()
5632 			ecc->read_oob = nand_read_oob_syndrome;  in nand_scan_tail()
5633 		if (!ecc->write_oob)  in nand_scan_tail()
5634 			ecc->write_oob = nand_write_oob_syndrome;  in nand_scan_tail()
5636 		if (mtd->writesize >= ecc->size) {  in nand_scan_tail()
5637 			if (!ecc->strength) {  in nand_scan_tail()
5638 				WARN(1, "Driver must set ecc.strength when using hardware ECC\n");  in nand_scan_tail()
5639 				ret = -EINVAL;  in nand_scan_tail()
5644 		pr_warn("%d byte HW ECC not possible on %d byte page size, fallback to SW ECC\n",  in nand_scan_tail()
5645 			ecc->size, mtd->writesize);  in nand_scan_tail()
5646 		ecc->mode = NAND_ECC_SOFT;  in nand_scan_tail()
5647 		ecc->algo = NAND_ECC_HAMMING;  in nand_scan_tail()
5653 			ret = -EINVAL;  in nand_scan_tail()
5659 		if (!ecc->read_page || !ecc->write_page) {  in nand_scan_tail()
5660 			WARN(1, "No ECC functions supplied; on-die ECC not possible\n");  in nand_scan_tail()
5661 			ret = -EINVAL;  in nand_scan_tail()
5664 		if (!ecc->read_oob)  in nand_scan_tail()
5665 			ecc->read_oob = nand_read_oob_std;  in nand_scan_tail()
5666 		if (!ecc->write_oob)  in nand_scan_tail()
5667 			ecc->write_oob = nand_write_oob_std;  in nand_scan_tail()
5672 		ecc->read_page = nand_read_page_raw;  in nand_scan_tail()
5673 		ecc->write_page = nand_write_page_raw;  in nand_scan_tail()
5674 		ecc->read_oob = nand_read_oob_std;  in nand_scan_tail()
5675 		ecc->read_page_raw = nand_read_page_raw;  in nand_scan_tail()
5676 		ecc->write_page_raw = nand_write_page_raw;  in nand_scan_tail()
5677 		ecc->write_oob = nand_write_oob_std;  in nand_scan_tail()
5678 		ecc->size = mtd->writesize;  in nand_scan_tail()
5679 		ecc->bytes = 0;  in nand_scan_tail()
5680 		ecc->strength = 0;  in nand_scan_tail()
5684 		WARN(1, "Invalid NAND_ECC_MODE %d\n", ecc->mode);  in nand_scan_tail()
5685 		ret = -EINVAL;  in nand_scan_tail()
5689 	if (ecc->correct || ecc->calculate) {  in nand_scan_tail()
5690 		ecc->calc_buf = kmalloc(mtd->oobsize, GFP_KERNEL);  in nand_scan_tail()
5691 		ecc->code_buf = kmalloc(mtd->oobsize, GFP_KERNEL);  in nand_scan_tail()
5692 		if (!ecc->calc_buf || !ecc->code_buf) {  in nand_scan_tail()
5693 			ret = -ENOMEM;  in nand_scan_tail()
5699 	if (!ecc->read_oob_raw)  in nand_scan_tail()
5700 		ecc->read_oob_raw = ecc->read_oob;  in nand_scan_tail()
5701 	if (!ecc->write_oob_raw)  in nand_scan_tail()
5702 		ecc->write_oob_raw = ecc->write_oob;  in nand_scan_tail()
5704 	/* propagate ecc info to mtd_info */  in nand_scan_tail()
5705 	mtd->ecc_strength = ecc->strength;  in nand_scan_tail()
5706 	mtd->ecc_step_size = ecc->size;  in nand_scan_tail()
5709 	 * Set the number of read / write steps for one page depending on ECC  in nand_scan_tail()
5712 	ecc->steps = mtd->writesize / ecc->size;  in nand_scan_tail()
5713 	if (ecc->steps * ecc->size != mtd->writesize) {  in nand_scan_tail()
5714 		WARN(1, "Invalid ECC parameters\n");  in nand_scan_tail()
5715 		ret = -EINVAL;  in nand_scan_tail()
5718 	ecc->total = ecc->steps * ecc->bytes;  in nand_scan_tail()
5719 	if (ecc->total > mtd->oobsize) {  in nand_scan_tail()
5720 		WARN(1, "Total number of ECC bytes exceeded oobsize\n");  in nand_scan_tail()
5721 		ret = -EINVAL;  in nand_scan_tail()
5733 	mtd->oobavail = ret;  in nand_scan_tail()
5735 	/* ECC sanity check: warn if it's too weak */  in nand_scan_tail()
5737 …pr_warn("WARNING: %s: the ECC used on your system is too weak compared to the one required by the …  in nand_scan_tail()
5738 			mtd->name);  in nand_scan_tail()
5740 	/* Allow subpage writes up to ecc.steps. Not possible for MLC flash */  in nand_scan_tail()
5741 	if (!(chip->options & NAND_NO_SUBPAGE_WRITE) && nand_is_slc(chip)) {  in nand_scan_tail()
5742 		switch (ecc->steps) {  in nand_scan_tail()
5744 			mtd->subpage_sft = 1;  in nand_scan_tail()
5749 			mtd->subpage_sft = 2;  in nand_scan_tail()
5753 	chip->subpagesize = mtd->writesize >> mtd->subpage_sft;  in nand_scan_tail()
5756 	chip->pagecache.page = -1;  in nand_scan_tail()
5758 	/* Large page NAND with SOFT_ECC should support subpage reads */  in nand_scan_tail()
5759 	switch (ecc->mode) {  in nand_scan_tail()
5761 		if (chip->page_shift > 9)  in nand_scan_tail()
5762 			chip->options |= NAND_SUBPAGE_READ;  in nand_scan_tail()
5769 	ret = nanddev_init(&chip->base, &rawnand_ops, mtd->owner);  in nand_scan_tail()
5774 	if (chip->options & NAND_ROM)  in nand_scan_tail()
5775 		mtd->flags = MTD_CAP_ROM;  in nand_scan_tail()
5778 	mtd->_erase = nand_erase;  in nand_scan_tail()
5779 	mtd->_point = NULL;  in nand_scan_tail()
5780 	mtd->_unpoint = NULL;  in nand_scan_tail()
5781 	mtd->_panic_write = panic_nand_write;  in nand_scan_tail()
5782 	mtd->_read_oob = nand_read_oob;  in nand_scan_tail()
5783 	mtd->_write_oob = nand_write_oob;  in nand_scan_tail()
5784 	mtd->_sync = nand_sync;  in nand_scan_tail()
5785 	mtd->_lock = NULL;  in nand_scan_tail()
5786 	mtd->_unlock = NULL;  in nand_scan_tail()
5787 	mtd->_suspend = nand_suspend;  in nand_scan_tail()
5788 	mtd->_resume = nand_resume;  in nand_scan_tail()
5789 	mtd->_reboot = nand_shutdown;  in nand_scan_tail()
5790 	mtd->_block_isreserved = nand_block_isreserved;  in nand_scan_tail()
5791 	mtd->_block_isbad = nand_block_isbad;  in nand_scan_tail()
5792 	mtd->_block_markbad = nand_block_markbad;  in nand_scan_tail()
5793 	mtd->_max_bad_blocks = nanddev_mtd_max_bad_blocks;  in nand_scan_tail()
5800 	if (!mtd->bitflip_threshold)  in nand_scan_tail()
5801 		mtd->bitflip_threshold = DIV_ROUND_UP(mtd->ecc_strength * 3, 4);  in nand_scan_tail()
5803 	/* Initialize the ->data_interface field. */  in nand_scan_tail()
5809 	for (i = 0; i < nanddev_ntargets(&chip->base); i++) {  in nand_scan_tail()
5816 	if (chip->options & NAND_SKIP_BBTSCAN)  in nand_scan_tail()
5828 	nanddev_cleanup(&chip->base);  in nand_scan_tail()
5834 	kfree(chip->data_buf);  in nand_scan_tail()
5835 	kfree(ecc->code_buf);  in nand_scan_tail()
5836 	kfree(ecc->calc_buf);  in nand_scan_tail()
5843 	if (chip->controller->ops && chip->controller->ops->attach_chip)  in nand_attach()
5844 		return chip->controller->ops->attach_chip(chip);  in nand_attach()
5851 	if (chip->controller->ops && chip->controller->ops->detach_chip)  in nand_detach()
5852 		chip->controller->ops->detach_chip(chip);  in nand_detach()
5856  * nand_scan_with_ids - [NAND Interface] Scan for the NAND device
5857  * @chip: NAND chip object
5871 		return -EINVAL;  in nand_scan_with_ids()
5897  * nand_cleanup - [NAND Interface] Free resources held by the NAND device
5898  * @chip: NAND chip object
5902 	if (chip->ecc.mode == NAND_ECC_SOFT &&  in nand_cleanup()
5903 	    chip->ecc.algo == NAND_ECC_BCH)  in nand_cleanup()
5904 		nand_bch_free((struct nand_bch_control *)chip->ecc.priv);  in nand_cleanup()
5907 	kfree(chip->bbt);  in nand_cleanup()
5908 	kfree(chip->data_buf);  in nand_cleanup()
5909 	kfree(chip->ecc.code_buf);  in nand_cleanup()
5910 	kfree(chip->ecc.calc_buf);  in nand_cleanup()
5913 	if (chip->badblock_pattern && chip->badblock_pattern->options  in nand_cleanup()
5915 		kfree(chip->badblock_pattern);  in nand_cleanup()
5930  * nand_release - [NAND Interface] Unregister the MTD device and free resources
5931  *		  held by the NAND device
5932  * @chip: NAND chip object
5944 MODULE_DESCRIPTION("Generic NAND flash driver code");