Lines Matching full:ecc
22 * if we have HW ECC support.
53 struct nand_ecc_ctrl *ecc = &chip->ecc; in nand_ooblayout_ecc_sp() local
69 oobregion->length = ecc->total - 4; in nand_ooblayout_ecc_sp()
99 .ecc = nand_ooblayout_ecc_sp,
108 struct nand_ecc_ctrl *ecc = &chip->ecc; in nand_ooblayout_ecc_lp() local
110 if (section || !ecc->total) in nand_ooblayout_ecc_lp()
113 oobregion->length = ecc->total; in nand_ooblayout_ecc_lp()
123 struct nand_ecc_ctrl *ecc = &chip->ecc; in nand_ooblayout_free_lp() local
128 oobregion->length = mtd->oobsize - ecc->total - 2; in nand_ooblayout_free_lp()
135 .ecc = nand_ooblayout_ecc_lp,
141 * Support the old "large page" layout used for 1-bit Hamming ECC where ECC
148 struct nand_ecc_ctrl *ecc = &chip->ecc; in nand_ooblayout_ecc_lp_hamming() local
164 oobregion->length = ecc->total; in nand_ooblayout_ecc_lp_hamming()
175 struct nand_ecc_ctrl *ecc = &chip->ecc; in nand_ooblayout_free_lp_hamming() local
196 oobregion->offset = ecc_offset + ecc->total; in nand_ooblayout_free_lp_hamming()
204 .ecc = nand_ooblayout_ecc_lp_hamming,
323 res = chip->ecc.read_oob(chip, first_page + page_offset); in nand_block_bad()
488 status = chip->ecc.write_oob_raw(chip, page & chip->pagemask); in nand_do_write_oob()
490 status = chip->ecc.write_oob(chip, page & chip->pagemask); in nand_do_write_oob()
2502 * nand_check_erased_ecc_chunk - check if an ECC chunk contains (almost) only
2506 * @ecc: ECC buffer
2507 * @ecclen: ECC length
2512 * Check if a data buffer and its associated ECC and OOB data contains only
2519 * 1/ ECC algorithms are working on pre-defined block sizes which are usually
2520 * different from the NAND page size. When fixing bitflips, ECC engines will
2527 * the payload data but also their associated ECC data, because a user might
2529 * shouldn't consider the chunk as erased, and checking ECC bytes prevent
2532 * data are protected by the ECC engine.
2534 * extra OOB data to an ECC chunk.
2541 void *ecc, int ecclen, in nand_check_erased_ecc_chunk() argument
2554 ecc_bitflips = nand_check_erased_buf(ecc, ecclen, bitflips_threshold); in nand_check_erased_ecc_chunk()
2569 memset(ecc, 0xff, ecclen); in nand_check_erased_ecc_chunk()
2594 * nand_read_page_raw - [INTERN] read raw page data without ecc
2600 * Not for syndrome calculating ECC controllers, which use a special oob layout.
2624 * nand_read_page_raw_syndrome - [INTERN] read raw page data without ecc
2636 int eccsize = chip->ecc.size; in nand_read_page_raw_syndrome()
2637 int eccbytes = chip->ecc.bytes; in nand_read_page_raw_syndrome()
2645 for (steps = chip->ecc.steps; steps > 0; steps--) { in nand_read_page_raw_syndrome()
2652 if (chip->ecc.prepad) { in nand_read_page_raw_syndrome()
2653 ret = nand_read_data_op(chip, oob, chip->ecc.prepad, in nand_read_page_raw_syndrome()
2658 oob += chip->ecc.prepad; in nand_read_page_raw_syndrome()
2667 if (chip->ecc.postpad) { in nand_read_page_raw_syndrome()
2668 ret = nand_read_data_op(chip, oob, chip->ecc.postpad, in nand_read_page_raw_syndrome()
2673 oob += chip->ecc.postpad; in nand_read_page_raw_syndrome()
2688 * nand_read_page_swecc - [REPLACEABLE] software ECC based page read function
2698 int i, eccsize = chip->ecc.size, ret; in nand_read_page_swecc()
2699 int eccbytes = chip->ecc.bytes; in nand_read_page_swecc()
2700 int eccsteps = chip->ecc.steps; in nand_read_page_swecc()
2702 uint8_t *ecc_calc = chip->ecc.calc_buf; in nand_read_page_swecc()
2703 uint8_t *ecc_code = chip->ecc.code_buf; in nand_read_page_swecc()
2706 chip->ecc.read_page_raw(chip, buf, 1, page); in nand_read_page_swecc()
2709 chip->ecc.calculate(chip, p, &ecc_calc[i]); in nand_read_page_swecc()
2712 chip->ecc.total); in nand_read_page_swecc()
2716 eccsteps = chip->ecc.steps; in nand_read_page_swecc()
2722 stat = chip->ecc.correct(chip, p, &ecc_code[i], &ecc_calc[i]); in nand_read_page_swecc()
2734 * nand_read_subpage - [REPLACEABLE] ECC based sub-page read function
2754 /* Column address within the page aligned to ECC size (256bytes) */ in nand_read_subpage()
2755 start_step = data_offs / chip->ecc.size; in nand_read_subpage()
2756 end_step = (data_offs + readlen - 1) / chip->ecc.size; in nand_read_subpage()
2758 index = start_step * chip->ecc.bytes; in nand_read_subpage()
2760 /* Data size aligned to ECC ecc.size */ in nand_read_subpage()
2761 datafrag_len = num_steps * chip->ecc.size; in nand_read_subpage()
2762 eccfrag_len = num_steps * chip->ecc.bytes; in nand_read_subpage()
2764 data_col_addr = start_step * chip->ecc.size; in nand_read_subpage()
2771 /* Calculate ECC */ in nand_read_subpage()
2772 for (i = 0; i < eccfrag_len ; i += chip->ecc.bytes, p += chip->ecc.size) in nand_read_subpage()
2773 chip->ecc.calculate(chip, p, &chip->ecc.calc_buf[i]); in nand_read_subpage()
2777 * ecc.pos. Let's make sure that there are no gaps in ECC positions. in nand_read_subpage()
2794 * Send the command to read the particular ECC bytes take care in nand_read_subpage()
2801 if ((oobregion.offset + (num_steps * chip->ecc.bytes)) & in nand_read_subpage()
2813 ret = mtd_ooblayout_get_eccbytes(mtd, chip->ecc.code_buf, in nand_read_subpage()
2819 for (i = 0; i < eccfrag_len ; i += chip->ecc.bytes, p += chip->ecc.size) { in nand_read_subpage()
2822 stat = chip->ecc.correct(chip, p, &chip->ecc.code_buf[i], in nand_read_subpage()
2823 &chip->ecc.calc_buf[i]); in nand_read_subpage()
2825 (chip->ecc.options & NAND_ECC_GENERIC_ERASED_CHECK)) { in nand_read_subpage()
2827 stat = nand_check_erased_ecc_chunk(p, chip->ecc.size, in nand_read_subpage()
2828 &chip->ecc.code_buf[i], in nand_read_subpage()
2829 chip->ecc.bytes, in nand_read_subpage()
2831 chip->ecc.strength); in nand_read_subpage()
2845 * nand_read_page_hwecc - [REPLACEABLE] hardware ECC based page read function
2851 * Not for syndrome calculating ECC controllers which need a special oob layout.
2857 int i, eccsize = chip->ecc.size, ret; in nand_read_page_hwecc()
2858 int eccbytes = chip->ecc.bytes; in nand_read_page_hwecc()
2859 int eccsteps = chip->ecc.steps; in nand_read_page_hwecc()
2861 uint8_t *ecc_calc = chip->ecc.calc_buf; in nand_read_page_hwecc()
2862 uint8_t *ecc_code = chip->ecc.code_buf; in nand_read_page_hwecc()
2870 chip->ecc.hwctl(chip, NAND_ECC_READ); in nand_read_page_hwecc()
2876 chip->ecc.calculate(chip, p, &ecc_calc[i]); in nand_read_page_hwecc()
2884 chip->ecc.total); in nand_read_page_hwecc()
2888 eccsteps = chip->ecc.steps; in nand_read_page_hwecc()
2894 stat = chip->ecc.correct(chip, p, &ecc_code[i], &ecc_calc[i]); in nand_read_page_hwecc()
2896 (chip->ecc.options & NAND_ECC_GENERIC_ERASED_CHECK)) { in nand_read_page_hwecc()
2901 chip->ecc.strength); in nand_read_page_hwecc()
2915 * nand_read_page_hwecc_oob_first - [REPLACEABLE] hw ecc, read oob first
2921 * Hardware ECC for large page chips, require OOB to be read first. For this
2922 * ECC mode, the write_page method is re-used from ECC_HW. These methods
2923 * read/write ECC from the OOB area, unlike the ECC_HW_SYNDROME support with
2924 * multiple ECC steps, follows the "infix ECC" scheme and reads/writes ECC from
2931 int i, eccsize = chip->ecc.size, ret; in nand_read_page_hwecc_oob_first()
2932 int eccbytes = chip->ecc.bytes; in nand_read_page_hwecc_oob_first()
2933 int eccsteps = chip->ecc.steps; in nand_read_page_hwecc_oob_first()
2935 uint8_t *ecc_code = chip->ecc.code_buf; in nand_read_page_hwecc_oob_first()
2936 uint8_t *ecc_calc = chip->ecc.calc_buf; in nand_read_page_hwecc_oob_first()
2949 chip->ecc.total); in nand_read_page_hwecc_oob_first()
2956 chip->ecc.hwctl(chip, NAND_ECC_READ); in nand_read_page_hwecc_oob_first()
2962 chip->ecc.calculate(chip, p, &ecc_calc[i]); in nand_read_page_hwecc_oob_first()
2964 stat = chip->ecc.correct(chip, p, &ecc_code[i], NULL); in nand_read_page_hwecc_oob_first()
2966 (chip->ecc.options & NAND_ECC_GENERIC_ERASED_CHECK)) { in nand_read_page_hwecc_oob_first()
2971 chip->ecc.strength); in nand_read_page_hwecc_oob_first()
2985 * nand_read_page_syndrome - [REPLACEABLE] hardware ECC syndrome based page read
2998 int ret, i, eccsize = chip->ecc.size; in nand_read_page_syndrome()
2999 int eccbytes = chip->ecc.bytes; in nand_read_page_syndrome()
3000 int eccsteps = chip->ecc.steps; in nand_read_page_syndrome()
3001 int eccpadbytes = eccbytes + chip->ecc.prepad + chip->ecc.postpad; in nand_read_page_syndrome()
3013 chip->ecc.hwctl(chip, NAND_ECC_READ); in nand_read_page_syndrome()
3019 if (chip->ecc.prepad) { in nand_read_page_syndrome()
3020 ret = nand_read_data_op(chip, oob, chip->ecc.prepad, in nand_read_page_syndrome()
3025 oob += chip->ecc.prepad; in nand_read_page_syndrome()
3028 chip->ecc.hwctl(chip, NAND_ECC_READSYN); in nand_read_page_syndrome()
3034 stat = chip->ecc.correct(chip, p, oob, NULL); in nand_read_page_syndrome()
3038 if (chip->ecc.postpad) { in nand_read_page_syndrome()
3039 ret = nand_read_data_op(chip, oob, chip->ecc.postpad, in nand_read_page_syndrome()
3044 oob += chip->ecc.postpad; in nand_read_page_syndrome()
3048 (chip->ecc.options & NAND_ECC_GENERIC_ERASED_CHECK)) { in nand_read_page_syndrome()
3050 stat = nand_check_erased_ecc_chunk(p, chip->ecc.size, in nand_read_page_syndrome()
3054 chip->ecc.strength); in nand_read_page_syndrome()
3114 * when there are too many bitflips in a page (i.e., ECC error). After setting
3142 * nand_do_read_ops - [INTERN] Read data with ECC
3203 * the read methods return max bitflips per ecc step. in nand_do_read_ops()
3206 ret = chip->ecc.read_page_raw(chip, bufpoi, in nand_do_read_ops()
3211 ret = chip->ecc.read_subpage(chip, col, bytes, in nand_do_read_ops()
3214 ret = chip->ecc.read_page(chip, bufpoi, in nand_do_read_ops()
3330 * nand_read_oob_syndrome - [REPLACEABLE] OOB data read function for HW ECC
3339 int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad; in nand_read_oob_syndrome()
3340 int eccsize = chip->ecc.size; in nand_read_oob_syndrome()
3344 ret = nand_read_page_op(chip, page, chip->ecc.size, NULL, 0); in nand_read_oob_syndrome()
3348 for (i = 0; i < chip->ecc.steps; i++) { in nand_read_oob_syndrome()
3398 * nand_write_oob_syndrome - [REPLACEABLE] OOB data write function for HW ECC
3406 int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad; in nand_write_oob_syndrome()
3407 int eccsize = chip->ecc.size, length = mtd->oobsize; in nand_write_oob_syndrome()
3408 int ret, i, len, pos, sndcmd = 0, steps = chip->ecc.steps; in nand_write_oob_syndrome()
3412 * data-ecc-data-ecc ... ecc-oob in nand_write_oob_syndrome()
3414 * data-pad-ecc-pad-data-pad .... ecc-pad-oob in nand_write_oob_syndrome()
3416 if (!chip->ecc.prepad && !chip->ecc.postpad) { in nand_write_oob_syndrome()
3506 ret = chip->ecc.read_oob_raw(chip, page); in nand_do_read_oob()
3508 ret = chip->ecc.read_oob(chip, page); in nand_do_read_oob()
3604 * Not for syndrome calculating ECC controllers, which use a special oob layout.
3634 * We need a special oob layout and handling even when ECC isn't checked.
3641 int eccsize = chip->ecc.size; in nand_write_page_raw_syndrome()
3642 int eccbytes = chip->ecc.bytes; in nand_write_page_raw_syndrome()
3650 for (steps = chip->ecc.steps; steps > 0; steps--) { in nand_write_page_raw_syndrome()
3657 if (chip->ecc.prepad) { in nand_write_page_raw_syndrome()
3658 ret = nand_write_data_op(chip, oob, chip->ecc.prepad, in nand_write_page_raw_syndrome()
3663 oob += chip->ecc.prepad; in nand_write_page_raw_syndrome()
3672 if (chip->ecc.postpad) { in nand_write_page_raw_syndrome()
3673 ret = nand_write_data_op(chip, oob, chip->ecc.postpad, in nand_write_page_raw_syndrome()
3678 oob += chip->ecc.postpad; in nand_write_page_raw_syndrome()
3692 * nand_write_page_swecc - [REPLACEABLE] software ECC based page write function
3702 int i, eccsize = chip->ecc.size, ret; in nand_write_page_swecc()
3703 int eccbytes = chip->ecc.bytes; in nand_write_page_swecc()
3704 int eccsteps = chip->ecc.steps; in nand_write_page_swecc()
3705 uint8_t *ecc_calc = chip->ecc.calc_buf; in nand_write_page_swecc()
3708 /* Software ECC calculation */ in nand_write_page_swecc()
3710 chip->ecc.calculate(chip, p, &ecc_calc[i]); in nand_write_page_swecc()
3713 chip->ecc.total); in nand_write_page_swecc()
3717 return chip->ecc.write_page_raw(chip, buf, 1, page); in nand_write_page_swecc()
3721 * nand_write_page_hwecc - [REPLACEABLE] hardware ECC based page write function
3731 int i, eccsize = chip->ecc.size, ret; in nand_write_page_hwecc()
3732 int eccbytes = chip->ecc.bytes; in nand_write_page_hwecc()
3733 int eccsteps = chip->ecc.steps; in nand_write_page_hwecc()
3734 uint8_t *ecc_calc = chip->ecc.calc_buf; in nand_write_page_hwecc()
3742 chip->ecc.hwctl(chip, NAND_ECC_WRITE); in nand_write_page_hwecc()
3748 chip->ecc.calculate(chip, p, &ecc_calc[i]); in nand_write_page_hwecc()
3752 chip->ecc.total); in nand_write_page_hwecc()
3765 * nand_write_subpage_hwecc - [REPLACEABLE] hardware ECC based subpage write
3779 uint8_t *ecc_calc = chip->ecc.calc_buf; in nand_write_subpage_hwecc()
3780 int ecc_size = chip->ecc.size; in nand_write_subpage_hwecc()
3781 int ecc_bytes = chip->ecc.bytes; in nand_write_subpage_hwecc()
3782 int ecc_steps = chip->ecc.steps; in nand_write_subpage_hwecc()
3794 chip->ecc.hwctl(chip, NAND_ECC_WRITE); in nand_write_subpage_hwecc()
3801 /* mask ECC of un-touched subpages by padding 0xFF */ in nand_write_subpage_hwecc()
3805 chip->ecc.calculate(chip, buf, ecc_calc); in nand_write_subpage_hwecc()
3817 /* copy calculated ECC for whole page to chip->buffer->oob */ in nand_write_subpage_hwecc()
3819 ecc_calc = chip->ecc.calc_buf; in nand_write_subpage_hwecc()
3821 chip->ecc.total); in nand_write_subpage_hwecc()
3835 * nand_write_page_syndrome - [REPLACEABLE] hardware ECC syndrome based page write
3848 int i, eccsize = chip->ecc.size; in nand_write_page_syndrome()
3849 int eccbytes = chip->ecc.bytes; in nand_write_page_syndrome()
3850 int eccsteps = chip->ecc.steps; in nand_write_page_syndrome()
3860 chip->ecc.hwctl(chip, NAND_ECC_WRITE); in nand_write_page_syndrome()
3866 if (chip->ecc.prepad) { in nand_write_page_syndrome()
3867 ret = nand_write_data_op(chip, oob, chip->ecc.prepad, in nand_write_page_syndrome()
3872 oob += chip->ecc.prepad; in nand_write_page_syndrome()
3875 chip->ecc.calculate(chip, p, oob); in nand_write_page_syndrome()
3883 if (chip->ecc.postpad) { in nand_write_page_syndrome()
3884 ret = nand_write_data_op(chip, oob, chip->ecc.postpad, in nand_write_page_syndrome()
3889 oob += chip->ecc.postpad; in nand_write_page_syndrome()
3922 chip->ecc.write_subpage) in nand_write_page()
3928 status = chip->ecc.write_page_raw(chip, buf, oob_required, in nand_write_page()
3931 status = chip->ecc.write_subpage(chip, offset, data_len, buf, in nand_write_page()
3934 status = chip->ecc.write_page(chip, buf, oob_required, page); in nand_write_page()
3945 * nand_do_write_ops - [INTERN] NAND write with ECC
3950 * NAND write with ECC.
4071 * panic_nand_write - [MTD Interface] NAND write with ECC
4078 * NAND write with ECC. Used when performing writes in interrupt context, this
4845 err = of_property_read_string(np, "nand-ecc-mode", &pm); in of_get_nand_ecc_mode()
4875 err = of_property_read_string(np, "nand-ecc-algo", &pm); in of_get_nand_ecc_algo()
4884 * For backward compatibility we also read "nand-ecc-mode" checking in of_get_nand_ecc_algo()
4885 * for some obsoleted values that were specifying ECC algorithm. in of_get_nand_ecc_algo()
4887 err = of_property_read_string(np, "nand-ecc-mode", &pm); in of_get_nand_ecc_algo()
4904 ret = of_property_read_u32(np, "nand-ecc-step-size", &val); in of_get_nand_ecc_step_size()
4913 ret = of_property_read_u32(np, "nand-ecc-strength", &val); in of_get_nand_ecc_strength()
4961 chip->ecc.mode = ecc_mode; in nand_dt_init()
4964 chip->ecc.algo = ecc_algo; in nand_dt_init()
4967 chip->ecc.strength = ecc_strength; in nand_dt_init()
4970 chip->ecc.size = ecc_step; in nand_dt_init()
4972 if (of_property_read_bool(dn, "nand-ecc-maximize")) in nand_dt_init()
4973 chip->ecc.options |= NAND_ECC_MAXIMIZE; in nand_dt_init()
4988 * to tweak some ECC-related parameters before nand_scan_tail(). This separation
5081 struct nand_ecc_ctrl *ecc = &chip->ecc; in nand_set_ecc_soft_ops() local
5083 if (WARN_ON(ecc->mode != NAND_ECC_SOFT)) in nand_set_ecc_soft_ops()
5086 switch (ecc->algo) { in nand_set_ecc_soft_ops()
5088 ecc->calculate = nand_calculate_ecc; in nand_set_ecc_soft_ops()
5089 ecc->correct = nand_correct_data; in nand_set_ecc_soft_ops()
5090 ecc->read_page = nand_read_page_swecc; in nand_set_ecc_soft_ops()
5091 ecc->read_subpage = nand_read_subpage; in nand_set_ecc_soft_ops()
5092 ecc->write_page = nand_write_page_swecc; in nand_set_ecc_soft_ops()
5093 ecc->read_page_raw = nand_read_page_raw; in nand_set_ecc_soft_ops()
5094 ecc->write_page_raw = nand_write_page_raw; in nand_set_ecc_soft_ops()
5095 ecc->read_oob = nand_read_oob_std; in nand_set_ecc_soft_ops()
5096 ecc->write_oob = nand_write_oob_std; in nand_set_ecc_soft_ops()
5097 if (!ecc->size) in nand_set_ecc_soft_ops()
5098 ecc->size = 256; in nand_set_ecc_soft_ops()
5099 ecc->bytes = 3; in nand_set_ecc_soft_ops()
5100 ecc->strength = 1; in nand_set_ecc_soft_ops()
5103 ecc->options |= NAND_ECC_SOFT_HAMMING_SM_ORDER; in nand_set_ecc_soft_ops()
5111 ecc->calculate = nand_bch_calculate_ecc; in nand_set_ecc_soft_ops()
5112 ecc->correct = nand_bch_correct_data; in nand_set_ecc_soft_ops()
5113 ecc->read_page = nand_read_page_swecc; in nand_set_ecc_soft_ops()
5114 ecc->read_subpage = nand_read_subpage; in nand_set_ecc_soft_ops()
5115 ecc->write_page = nand_write_page_swecc; in nand_set_ecc_soft_ops()
5116 ecc->read_page_raw = nand_read_page_raw; in nand_set_ecc_soft_ops()
5117 ecc->write_page_raw = nand_write_page_raw; in nand_set_ecc_soft_ops()
5118 ecc->read_oob = nand_read_oob_std; in nand_set_ecc_soft_ops()
5119 ecc->write_oob = nand_write_oob_std; in nand_set_ecc_soft_ops()
5122 * Board driver should supply ecc.size and ecc.strength in nand_set_ecc_soft_ops()
5126 if (!ecc->size && (mtd->oobsize >= 64)) { in nand_set_ecc_soft_ops()
5127 ecc->size = 512; in nand_set_ecc_soft_ops()
5128 ecc->strength = 4; in nand_set_ecc_soft_ops()
5132 * if no ecc placement scheme was provided pickup the default in nand_set_ecc_soft_ops()
5147 * We can only maximize ECC config when the default layout is in nand_set_ecc_soft_ops()
5152 ecc->options & NAND_ECC_MAXIMIZE) { in nand_set_ecc_soft_ops()
5156 ecc->size = 1024; in nand_set_ecc_soft_ops()
5157 steps = mtd->writesize / ecc->size; in nand_set_ecc_soft_ops()
5161 ecc->strength = bytes * 8 / fls(8 * ecc->size); in nand_set_ecc_soft_ops()
5165 ecc->bytes = 0; in nand_set_ecc_soft_ops()
5166 ecc->priv = nand_bch_init(mtd); in nand_set_ecc_soft_ops()
5167 if (!ecc->priv) { in nand_set_ecc_soft_ops()
5168 WARN(1, "BCH ECC initialization failed!\n"); in nand_set_ecc_soft_ops()
5173 WARN(1, "Unsupported ECC algorithm!\n"); in nand_set_ecc_soft_ops()
5179 * nand_check_ecc_caps - check the sanity of preset ECC settings
5181 * @caps: ECC caps info structure
5182 * @oobavail: OOB size that the ECC engine can use
5184 * When ECC step size and strength are already set, check if they are supported
5185 * by the controller and the calculated ECC bytes fit within the chip's OOB.
5186 * On success, the calculated ECC bytes is set.
5194 int preset_step = chip->ecc.size; in nand_check_ecc_caps()
5195 int preset_strength = chip->ecc.strength; in nand_check_ecc_caps()
5215 pr_err("ECC (step, strength) = (%d, %d) does not fit in OOB", in nand_check_ecc_caps()
5220 chip->ecc.bytes = ecc_bytes; in nand_check_ecc_caps()
5226 pr_err("ECC (step, strength) = (%d, %d) not supported on this controller", in nand_check_ecc_caps()
5233 * nand_match_ecc_req - meet the chip's requirement with least ECC bytes
5235 * @caps: ECC engine caps info structure
5236 * @oobavail: OOB size that the ECC engine can use
5238 * If a chip's ECC requirement is provided, try to meet it with the least
5239 * number of ECC bytes (i.e. with the largest number of OOB-free bytes).
5240 * On success, the chosen ECC settings are set.
5293 * with the least number of ECC bytes. in nand_match_ecc_req()
5307 chip->ecc.size = best_step; in nand_match_ecc_req()
5308 chip->ecc.strength = best_strength; in nand_match_ecc_req()
5309 chip->ecc.bytes = best_ecc_bytes; in nand_match_ecc_req()
5315 * nand_maximize_ecc - choose the max ECC strength available
5317 * @caps: ECC engine caps info structure
5318 * @oobavail: OOB size that the ECC engine can use
5320 * Choose the max ECC strength that is supported on the controller, and can fit
5321 * within the chip's OOB. On success, the chosen ECC settings are set.
5339 /* If chip->ecc.size is already set, respect it */ in nand_maximize_ecc()
5340 if (chip->ecc.size && step_size != chip->ecc.size) in nand_maximize_ecc()
5377 chip->ecc.size = best_step; in nand_maximize_ecc()
5378 chip->ecc.strength = best_strength; in nand_maximize_ecc()
5379 chip->ecc.bytes = best_ecc_bytes; in nand_maximize_ecc()
5385 * nand_ecc_choose_conf - Set the ECC strength and ECC step size
5387 * @caps: ECC engine caps info structure
5388 * @oobavail: OOB size that the ECC engine can use
5390 * Choose the ECC configuration according to following logic
5392 * 1. If both ECC step size and ECC strength are already set (usually by DT)
5394 * 2. If NAND_ECC_MAXIMIZE is set, then select maximum ECC strength.
5395 * 3. Otherwise, try to match the ECC step size and ECC strength closest
5397 * requirement then fallback to the maximum ECC step size and ECC strength.
5399 * On success, the chosen ECC settings are set.
5409 if (chip->ecc.size && chip->ecc.strength) in nand_ecc_choose_conf()
5412 if (chip->ecc.options & NAND_ECC_MAXIMIZE) in nand_ecc_choose_conf()
5439 struct nand_ecc_ctrl *ecc = &chip->ecc; in nand_ecc_strength_good() local
5442 if (ecc->size == 0 || chip->base.eccreq.step_size == 0) in nand_ecc_strength_good()
5450 corr = (mtd->writesize * ecc->strength) / ecc->size; in nand_ecc_strength_good()
5454 return corr >= ds_corr && ecc->strength >= chip->base.eccreq.strength; in nand_ecc_strength_good()
5512 struct nand_ecc_ctrl *ecc = &chip->ecc; in nand_scan_tail() local
5544 !(ecc->mode == NAND_ECC_SOFT && ecc->algo == NAND_ECC_BCH)) { in nand_scan_tail()
5559 * page with ECC layout when ->oobsize <= 128 for in nand_scan_tail()
5562 if (ecc->mode == NAND_ECC_NONE) { in nand_scan_tail()
5576 * Check ECC mode, default to software if 3byte/512byte hardware ECC is in nand_scan_tail()
5577 * selected and we have 256 byte pagesize fallback to software ECC in nand_scan_tail()
5580 switch (ecc->mode) { in nand_scan_tail()
5583 if (!ecc->calculate || !ecc->correct || !ecc->hwctl) { in nand_scan_tail()
5584 WARN(1, "No ECC functions supplied; hardware ECC not possible\n"); in nand_scan_tail()
5588 if (!ecc->read_page) in nand_scan_tail()
5589 ecc->read_page = nand_read_page_hwecc_oob_first; in nand_scan_tail()
5594 if (!ecc->read_page) in nand_scan_tail()
5595 ecc->read_page = nand_read_page_hwecc; in nand_scan_tail()
5596 if (!ecc->write_page) in nand_scan_tail()
5597 ecc->write_page = nand_write_page_hwecc; in nand_scan_tail()
5598 if (!ecc->read_page_raw) in nand_scan_tail()
5599 ecc->read_page_raw = nand_read_page_raw; in nand_scan_tail()
5600 if (!ecc->write_page_raw) in nand_scan_tail()
5601 ecc->write_page_raw = nand_write_page_raw; in nand_scan_tail()
5602 if (!ecc->read_oob) in nand_scan_tail()
5603 ecc->read_oob = nand_read_oob_std; in nand_scan_tail()
5604 if (!ecc->write_oob) in nand_scan_tail()
5605 ecc->write_oob = nand_write_oob_std; in nand_scan_tail()
5606 if (!ecc->read_subpage) in nand_scan_tail()
5607 ecc->read_subpage = nand_read_subpage; in nand_scan_tail()
5608 if (!ecc->write_subpage && ecc->hwctl && ecc->calculate) in nand_scan_tail()
5609 ecc->write_subpage = nand_write_subpage_hwecc; in nand_scan_tail()
5613 if ((!ecc->calculate || !ecc->correct || !ecc->hwctl) && in nand_scan_tail()
5614 (!ecc->read_page || in nand_scan_tail()
5615 ecc->read_page == nand_read_page_hwecc || in nand_scan_tail()
5616 !ecc->write_page || in nand_scan_tail()
5617 ecc->write_page == nand_write_page_hwecc)) { in nand_scan_tail()
5618 WARN(1, "No ECC functions supplied; hardware ECC not possible\n"); in nand_scan_tail()
5623 if (!ecc->read_page) in nand_scan_tail()
5624 ecc->read_page = nand_read_page_syndrome; in nand_scan_tail()
5625 if (!ecc->write_page) in nand_scan_tail()
5626 ecc->write_page = nand_write_page_syndrome; in nand_scan_tail()
5627 if (!ecc->read_page_raw) in nand_scan_tail()
5628 ecc->read_page_raw = nand_read_page_raw_syndrome; in nand_scan_tail()
5629 if (!ecc->write_page_raw) in nand_scan_tail()
5630 ecc->write_page_raw = nand_write_page_raw_syndrome; in nand_scan_tail()
5631 if (!ecc->read_oob) in nand_scan_tail()
5632 ecc->read_oob = nand_read_oob_syndrome; in nand_scan_tail()
5633 if (!ecc->write_oob) in nand_scan_tail()
5634 ecc->write_oob = nand_write_oob_syndrome; in nand_scan_tail()
5636 if (mtd->writesize >= ecc->size) { in nand_scan_tail()
5637 if (!ecc->strength) { in nand_scan_tail()
5638 WARN(1, "Driver must set ecc.strength when using hardware ECC\n"); in nand_scan_tail()
5644 pr_warn("%d byte HW ECC not possible on %d byte page size, fallback to SW ECC\n", in nand_scan_tail()
5645 ecc->size, mtd->writesize); in nand_scan_tail()
5646 ecc->mode = NAND_ECC_SOFT; in nand_scan_tail()
5647 ecc->algo = NAND_ECC_HAMMING; in nand_scan_tail()
5659 if (!ecc->read_page || !ecc->write_page) { in nand_scan_tail()
5660 WARN(1, "No ECC functions supplied; on-die ECC not possible\n"); in nand_scan_tail()
5664 if (!ecc->read_oob) in nand_scan_tail()
5665 ecc->read_oob = nand_read_oob_std; in nand_scan_tail()
5666 if (!ecc->write_oob) in nand_scan_tail()
5667 ecc->write_oob = nand_write_oob_std; in nand_scan_tail()
5672 ecc->read_page = nand_read_page_raw; in nand_scan_tail()
5673 ecc->write_page = nand_write_page_raw; in nand_scan_tail()
5674 ecc->read_oob = nand_read_oob_std; in nand_scan_tail()
5675 ecc->read_page_raw = nand_read_page_raw; in nand_scan_tail()
5676 ecc->write_page_raw = nand_write_page_raw; in nand_scan_tail()
5677 ecc->write_oob = nand_write_oob_std; in nand_scan_tail()
5678 ecc->size = mtd->writesize; in nand_scan_tail()
5679 ecc->bytes = 0; in nand_scan_tail()
5680 ecc->strength = 0; in nand_scan_tail()
5684 WARN(1, "Invalid NAND_ECC_MODE %d\n", ecc->mode); in nand_scan_tail()
5689 if (ecc->correct || ecc->calculate) { in nand_scan_tail()
5690 ecc->calc_buf = kmalloc(mtd->oobsize, GFP_KERNEL); in nand_scan_tail()
5691 ecc->code_buf = kmalloc(mtd->oobsize, GFP_KERNEL); in nand_scan_tail()
5692 if (!ecc->calc_buf || !ecc->code_buf) { in nand_scan_tail()
5699 if (!ecc->read_oob_raw) in nand_scan_tail()
5700 ecc->read_oob_raw = ecc->read_oob; in nand_scan_tail()
5701 if (!ecc->write_oob_raw) in nand_scan_tail()
5702 ecc->write_oob_raw = ecc->write_oob; in nand_scan_tail()
5704 /* propagate ecc info to mtd_info */ in nand_scan_tail()
5705 mtd->ecc_strength = ecc->strength; in nand_scan_tail()
5706 mtd->ecc_step_size = ecc->size; in nand_scan_tail()
5709 * Set the number of read / write steps for one page depending on ECC in nand_scan_tail()
5712 ecc->steps = mtd->writesize / ecc->size; in nand_scan_tail()
5713 if (ecc->steps * ecc->size != mtd->writesize) { in nand_scan_tail()
5714 WARN(1, "Invalid ECC parameters\n"); in nand_scan_tail()
5718 ecc->total = ecc->steps * ecc->bytes; in nand_scan_tail()
5719 if (ecc->total > mtd->oobsize) { in nand_scan_tail()
5720 WARN(1, "Total number of ECC bytes exceeded oobsize\n"); in nand_scan_tail()
5735 /* ECC sanity check: warn if it's too weak */ in nand_scan_tail()
5737 …pr_warn("WARNING: %s: the ECC used on your system is too weak compared to the one required by the … in nand_scan_tail()
5740 /* Allow subpage writes up to ecc.steps. Not possible for MLC flash */ in nand_scan_tail()
5742 switch (ecc->steps) { in nand_scan_tail()
5759 switch (ecc->mode) { in nand_scan_tail()
5835 kfree(ecc->code_buf); in nand_scan_tail()
5836 kfree(ecc->calc_buf); in nand_scan_tail()
5902 if (chip->ecc.mode == NAND_ECC_SOFT && in nand_cleanup()
5903 chip->ecc.algo == NAND_ECC_BCH) in nand_cleanup()
5904 nand_bch_free((struct nand_bch_control *)chip->ecc.priv); in nand_cleanup()
5909 kfree(chip->ecc.code_buf); in nand_cleanup()
5910 kfree(chip->ecc.calc_buf); in nand_cleanup()