Lines Matching +full:nand +full:- +full:ecc +full:- +full:strength
1 // SPDX-License-Identifier: GPL-2.0 OR MIT
3 * MTK NAND Flash controller driver.
6 * Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
10 #include <linux/dma-mapping.h>
22 /* NAND controller register definition */
90 #define MTK_NAME "mtk-nand"
127 struct nand_chip nand; member
147 struct mtk_ecc *ecc; member
179 static inline struct mtk_nfc_nand_chip *to_mtk_nand(struct nand_chip *nand) in to_mtk_nand() argument
181 return container_of(nand, struct mtk_nfc_nand_chip, nand); in to_mtk_nand()
186 return (u8 *)p + i * chip->ecc.size; in data_ptr()
198 if (i < mtk_nand->bad_mark.sec) in oob_ptr()
199 poi = chip->oob_poi + (i + 1) * mtk_nand->fdm.reg_size; in oob_ptr()
200 else if (i == mtk_nand->bad_mark.sec) in oob_ptr()
201 poi = chip->oob_poi; in oob_ptr()
203 poi = chip->oob_poi + i * mtk_nand->fdm.reg_size; in oob_ptr()
212 return chip->ecc.size + mtk_nand->spare_per_sector; in mtk_data_len()
219 return nfc->buffer + i * mtk_data_len(chip); in mtk_data_ptr()
226 return nfc->buffer + i * mtk_data_len(chip) + chip->ecc.size; in mtk_oob_ptr()
231 writel(val, nfc->regs + reg); in nfi_writel()
236 writew(val, nfc->regs + reg); in nfi_writew()
241 writeb(val, nfc->regs + reg); in nfi_writeb()
246 return readl_relaxed(nfc->regs + reg); in nfi_readl()
251 return readw_relaxed(nfc->regs + reg); in nfi_readw()
256 return readb_relaxed(nfc->regs + reg); in nfi_readb()
261 struct device *dev = nfc->dev; in mtk_nfc_hw_reset()
269 ret = readl_poll_timeout(nfc->regs + NFI_MASTER_STA, val, in mtk_nfc_hw_reset()
283 struct device *dev = nfc->dev; in mtk_nfc_send_command()
289 ret = readl_poll_timeout_atomic(nfc->regs + NFI_STA, val, in mtk_nfc_send_command()
293 return -EIO; in mtk_nfc_send_command()
301 struct device *dev = nfc->dev; in mtk_nfc_send_address()
309 ret = readl_poll_timeout_atomic(nfc->regs + NFI_STA, val, in mtk_nfc_send_address()
313 return -EIO; in mtk_nfc_send_address()
326 if (!mtd->writesize) in mtk_nfc_hw_runtime_config()
329 spare = mtk_nand->spare_per_sector; in mtk_nfc_hw_runtime_config()
331 switch (mtd->writesize) { in mtk_nfc_hw_runtime_config()
336 if (chip->ecc.size == 512) in mtk_nfc_hw_runtime_config()
342 if (chip->ecc.size == 512) in mtk_nfc_hw_runtime_config()
348 if (chip->ecc.size == 512) in mtk_nfc_hw_runtime_config()
357 dev_err(nfc->dev, "invalid page len: %d\n", mtd->writesize); in mtk_nfc_hw_runtime_config()
358 return -EINVAL; in mtk_nfc_hw_runtime_config()
365 if (chip->ecc.size == 1024) in mtk_nfc_hw_runtime_config()
368 for (i = 0; i < nfc->caps->num_spare_size; i++) { in mtk_nfc_hw_runtime_config()
369 if (nfc->caps->spare_size[i] == spare) in mtk_nfc_hw_runtime_config()
373 if (i == nfc->caps->num_spare_size) { in mtk_nfc_hw_runtime_config()
374 dev_err(nfc->dev, "invalid spare size %d\n", spare); in mtk_nfc_hw_runtime_config()
375 return -EINVAL; in mtk_nfc_hw_runtime_config()
378 fmt |= i << nfc->caps->pageformat_spare_shift; in mtk_nfc_hw_runtime_config()
380 fmt |= mtk_nand->fdm.reg_size << PAGEFMT_FDM_SHIFT; in mtk_nfc_hw_runtime_config()
381 fmt |= mtk_nand->fdm.ecc_size << PAGEFMT_FDM_ECC_SHIFT; in mtk_nfc_hw_runtime_config()
384 nfc->ecc_cfg.strength = chip->ecc.strength; in mtk_nfc_hw_runtime_config()
385 nfc->ecc_cfg.len = chip->ecc.size + mtk_nand->fdm.ecc_size; in mtk_nfc_hw_runtime_config()
390 static void mtk_nfc_select_chip(struct nand_chip *nand, int chip) in mtk_nfc_select_chip() argument
392 struct mtk_nfc *nfc = nand_get_controller_data(nand); in mtk_nfc_select_chip()
393 struct mtk_nfc_nand_chip *mtk_nand = to_mtk_nand(nand); in mtk_nfc_select_chip()
398 mtk_nfc_hw_runtime_config(nand_to_mtd(nand)); in mtk_nfc_select_chip()
400 nfi_writel(nfc, mtk_nand->sels[chip], NFI_CSEL); in mtk_nfc_select_chip()
403 static int mtk_nfc_dev_ready(struct nand_chip *nand) in mtk_nfc_dev_ready() argument
405 struct mtk_nfc *nfc = nand_get_controller_data(nand); in mtk_nfc_dev_ready()
433 rc = readb_poll_timeout_atomic(nfc->regs + NFI_PIO_DIRDY, val, in mtk_nfc_wait_ioready()
436 dev_err(nfc->dev, "data not ready\n"); in mtk_nfc_wait_ioready()
455 reg = (nfc->caps->max_sector << CON_SEC_SHIFT) | CON_BRD; in mtk_nfc_read_byte()
486 reg = nfc->caps->max_sector << CON_SEC_SHIFT | CON_BWR; in mtk_nfc_write_byte()
514 return -ENOTSUPP; in mtk_nfc_setup_data_interface()
519 rate = clk_get_rate(nfc->clk.nfi_clk); in mtk_nfc_setup_data_interface()
521 rate /= nfc->caps->nfi_clk_div; in mtk_nfc_setup_data_interface()
526 tpoecs = max(timings->tALH_min, timings->tCLH_min) / 1000; in mtk_nfc_setup_data_interface()
530 tprecs = max(timings->tCLS_min, timings->tALS_min) / 1000; in mtk_nfc_setup_data_interface()
537 tw2r = timings->tWHR_min / 1000; in mtk_nfc_setup_data_interface()
539 tw2r = DIV_ROUND_UP(tw2r - 1, 2); in mtk_nfc_setup_data_interface()
542 twh = max(timings->tREH_min, timings->tWH_min) / 1000; in mtk_nfc_setup_data_interface()
543 twh = DIV_ROUND_UP(twh * rate, 1000000) - 1; in mtk_nfc_setup_data_interface()
555 if (temp < timings->tWC_min) in mtk_nfc_setup_data_interface()
556 twst = timings->tWC_min - temp; in mtk_nfc_setup_data_interface()
557 twst = max(timings->tWP_min, twst) / 1000; in mtk_nfc_setup_data_interface()
558 twst = DIV_ROUND_UP(twst * rate, 1000000) - 1; in mtk_nfc_setup_data_interface()
565 if (temp < timings->tRC_min) in mtk_nfc_setup_data_interface()
566 trlt = timings->tRC_min - temp; in mtk_nfc_setup_data_interface()
567 trlt = max(trlt, timings->tRP_min) / 1000; in mtk_nfc_setup_data_interface()
568 trlt = DIV_ROUND_UP(trlt * rate, 1000000) - 1; in mtk_nfc_setup_data_interface()
579 if (temp < timings->tREA_max) { in mtk_nfc_setup_data_interface()
580 tsel = timings->tREA_max / 1000; in mtk_nfc_setup_data_interface()
582 tsel -= (trlt + 1); in mtk_nfc_setup_data_interface()
584 trlt += tsel - MAX_STROBE_DLY; in mtk_nfc_setup_data_interface()
595 * ------------------------------------- in mtk_nfc_setup_data_interface()
616 int size = chip->ecc.size + mtk_nand->fdm.reg_size; in mtk_nfc_sector_encode()
618 nfc->ecc_cfg.mode = ECC_DMA_MODE; in mtk_nfc_sector_encode()
619 nfc->ecc_cfg.op = ECC_ENCODE; in mtk_nfc_sector_encode()
621 return mtk_ecc_encode(nfc->ecc, &nfc->ecc_cfg, data, size); in mtk_nfc_sector_encode()
632 struct mtk_nfc_nand_chip *nand = to_mtk_nand(chip); in mtk_nfc_bad_mark_swap() local
633 u32 bad_pos = nand->bad_mark.pos; in mtk_nfc_bad_mark_swap()
636 bad_pos += nand->bad_mark.sec * mtk_data_len(chip); in mtk_nfc_bad_mark_swap()
638 bad_pos += nand->bad_mark.sec * chip->ecc.size; in mtk_nfc_bad_mark_swap()
640 swap(chip->oob_poi[0], buf[bad_pos]); in mtk_nfc_bad_mark_swap()
649 struct mtk_nfc_fdm *fdm = &mtk_nand->fdm; in mtk_nfc_format_subpage()
653 start = offset / chip->ecc.size; in mtk_nfc_format_subpage()
654 end = DIV_ROUND_UP(offset + len, chip->ecc.size); in mtk_nfc_format_subpage()
656 memset(nfc->buffer, 0xff, mtd->writesize + mtd->oobsize); in mtk_nfc_format_subpage()
657 for (i = 0; i < chip->ecc.steps; i++) { in mtk_nfc_format_subpage()
659 chip->ecc.size); in mtk_nfc_format_subpage()
664 if (i == mtk_nand->bad_mark.sec) in mtk_nfc_format_subpage()
665 mtk_nand->bad_mark.bm_swap(mtd, nfc->buffer, 1); in mtk_nfc_format_subpage()
667 memcpy(mtk_oob_ptr(chip, i), oob_ptr(chip, i), fdm->reg_size); in mtk_nfc_format_subpage()
683 struct mtk_nfc_fdm *fdm = &mtk_nand->fdm; in mtk_nfc_format_page()
686 memset(nfc->buffer, 0xff, mtd->writesize + mtd->oobsize); in mtk_nfc_format_page()
687 for (i = 0; i < chip->ecc.steps; i++) { in mtk_nfc_format_page()
690 chip->ecc.size); in mtk_nfc_format_page()
692 if (i == mtk_nand->bad_mark.sec) in mtk_nfc_format_page()
693 mtk_nand->bad_mark.bm_swap(mtd, nfc->buffer, 1); in mtk_nfc_format_page()
695 memcpy(mtk_oob_ptr(chip, i), oob_ptr(chip, i), fdm->reg_size); in mtk_nfc_format_page()
704 struct mtk_nfc_fdm *fdm = &mtk_nand->fdm; in mtk_nfc_read_fdm()
714 for (j = 0; j < fdm->reg_size; j++) in mtk_nfc_read_fdm()
723 struct mtk_nfc_fdm *fdm = &mtk_nand->fdm; in mtk_nfc_write_fdm()
728 for (i = 0; i < chip->ecc.steps; i++) { in mtk_nfc_write_fdm()
734 vall |= (j < fdm->reg_size ? oobptr[j] : 0xff) in mtk_nfc_write_fdm()
737 valm |= (j < fdm->reg_size ? oobptr[j] : 0xff) in mtk_nfc_write_fdm()
738 << ((j - 4) * 8); in mtk_nfc_write_fdm()
749 struct device *dev = nfc->dev; in mtk_nfc_do_write_page()
755 ret = dma_mapping_error(nfc->dev, addr); in mtk_nfc_do_write_page()
757 dev_err(nfc->dev, "dma mapping error\n"); in mtk_nfc_do_write_page()
758 return -EINVAL; in mtk_nfc_do_write_page()
764 nfi_writel(nfc, chip->ecc.steps << CON_SEC_SHIFT, NFI_CON); in mtk_nfc_do_write_page()
768 init_completion(&nfc->done); in mtk_nfc_do_write_page()
774 ret = wait_for_completion_timeout(&nfc->done, msecs_to_jiffies(500)); in mtk_nfc_do_write_page()
778 ret = -ETIMEDOUT; in mtk_nfc_do_write_page()
782 ret = readl_poll_timeout_atomic(nfc->regs + NFI_ADDRCNTR, reg, in mtk_nfc_do_write_page()
783 ADDRCNTR_SEC(reg) >= chip->ecc.steps, in mtk_nfc_do_write_page()
790 dma_unmap_single(nfc->dev, addr, len, DMA_TO_DEVICE); in mtk_nfc_do_write_page()
809 /* OOB => FDM: from register, ECC: from HW */ in mtk_nfc_write_page()
813 nfc->ecc_cfg.op = ECC_ENCODE; in mtk_nfc_write_page()
814 nfc->ecc_cfg.mode = ECC_NFI_MODE; in mtk_nfc_write_page()
815 ret = mtk_ecc_enable(nfc->ecc, &nfc->ecc_cfg); in mtk_nfc_write_page()
825 memcpy(nfc->buffer, buf, mtd->writesize); in mtk_nfc_write_page()
826 mtk_nand->bad_mark.bm_swap(mtd, nfc->buffer, raw); in mtk_nfc_write_page()
827 bufpoi = nfc->buffer; in mtk_nfc_write_page()
829 /* write OOB into the FDM registers (OOB area in MTK NAND) */ in mtk_nfc_write_page()
835 len = mtd->writesize + (raw ? mtd->oobsize : 0); in mtk_nfc_write_page()
839 mtk_ecc_disable(nfc->ecc); in mtk_nfc_write_page()
860 return mtk_nfc_write_page(mtd, chip, nfc->buffer, pg, 1); in mtk_nfc_write_page_raw()
876 return mtk_nfc_write_page(mtd, chip, nfc->buffer, page, 1); in mtk_nfc_write_subpage_hwecc()
891 u32 reg_size = mtk_nand->fdm.reg_size; in mtk_nfc_update_ecc_stats()
896 memset(buf, 0xff, sectors * chip->ecc.size); in mtk_nfc_update_ecc_stats()
902 mtk_ecc_get_stats(nfc->ecc, &stats, sectors); in mtk_nfc_update_ecc_stats()
903 mtd->ecc_stats.corrected += stats.corrected; in mtk_nfc_update_ecc_stats()
904 mtd->ecc_stats.failed += stats.failed; in mtk_nfc_update_ecc_stats()
915 u32 spare = mtk_nand->spare_per_sector; in mtk_nfc_read_subpage()
923 start = data_offs / chip->ecc.size; in mtk_nfc_read_subpage()
924 end = DIV_ROUND_UP(data_offs + readlen, chip->ecc.size); in mtk_nfc_read_subpage()
926 sectors = end - start; in mtk_nfc_read_subpage()
927 column = start * (chip->ecc.size + spare); in mtk_nfc_read_subpage()
929 len = sectors * chip->ecc.size + (raw ? sectors * spare : 0); in mtk_nfc_read_subpage()
930 buf = bufpoi + start * chip->ecc.size; in mtk_nfc_read_subpage()
934 addr = dma_map_single(nfc->dev, buf, len, DMA_FROM_DEVICE); in mtk_nfc_read_subpage()
935 rc = dma_mapping_error(nfc->dev, addr); in mtk_nfc_read_subpage()
937 dev_err(nfc->dev, "dma mapping error\n"); in mtk_nfc_read_subpage()
939 return -EINVAL; in mtk_nfc_read_subpage()
948 nfc->ecc_cfg.mode = ECC_NFI_MODE; in mtk_nfc_read_subpage()
949 nfc->ecc_cfg.sectors = sectors; in mtk_nfc_read_subpage()
950 nfc->ecc_cfg.op = ECC_DECODE; in mtk_nfc_read_subpage()
951 rc = mtk_ecc_enable(nfc->ecc, &nfc->ecc_cfg); in mtk_nfc_read_subpage()
953 dev_err(nfc->dev, "ecc enable\n"); in mtk_nfc_read_subpage()
958 dma_unmap_single(nfc->dev, addr, len, DMA_FROM_DEVICE); in mtk_nfc_read_subpage()
970 init_completion(&nfc->done); in mtk_nfc_read_subpage()
975 rc = wait_for_completion_timeout(&nfc->done, msecs_to_jiffies(500)); in mtk_nfc_read_subpage()
977 dev_warn(nfc->dev, "read ahb/dma done timeout\n"); in mtk_nfc_read_subpage()
979 rc = readl_poll_timeout_atomic(nfc->regs + NFI_BYTELEN, reg, in mtk_nfc_read_subpage()
983 dev_err(nfc->dev, "subpage done timeout\n"); in mtk_nfc_read_subpage()
984 bitflips = -EIO; in mtk_nfc_read_subpage()
986 rc = mtk_ecc_wait_done(nfc->ecc, ECC_DECODE); in mtk_nfc_read_subpage()
987 bitflips = rc < 0 ? -ETIMEDOUT : in mtk_nfc_read_subpage()
992 dma_unmap_single(nfc->dev, addr, len, DMA_FROM_DEVICE); in mtk_nfc_read_subpage()
997 mtk_ecc_disable(nfc->ecc); in mtk_nfc_read_subpage()
999 if (clamp(mtk_nand->bad_mark.sec, start, end) == mtk_nand->bad_mark.sec) in mtk_nfc_read_subpage()
1000 mtk_nand->bad_mark.bm_swap(mtd, bufpoi, raw); in mtk_nfc_read_subpage()
1019 return mtk_nfc_read_subpage(mtd, chip, 0, mtd->writesize, p, pg, 0); in mtk_nfc_read_page_hwecc()
1028 struct mtk_nfc_fdm *fdm = &mtk_nand->fdm; in mtk_nfc_read_page_raw()
1031 memset(nfc->buffer, 0xff, mtd->writesize + mtd->oobsize); in mtk_nfc_read_page_raw()
1032 ret = mtk_nfc_read_subpage(mtd, chip, 0, mtd->writesize, nfc->buffer, in mtk_nfc_read_page_raw()
1037 for (i = 0; i < chip->ecc.steps; i++) { in mtk_nfc_read_page_raw()
1038 memcpy(oob_ptr(chip, i), mtk_oob_ptr(chip, i), fdm->reg_size); in mtk_nfc_read_page_raw()
1040 if (i == mtk_nand->bad_mark.sec) in mtk_nfc_read_page_raw()
1041 mtk_nand->bad_mark.bm_swap(mtd, nfc->buffer, 1); in mtk_nfc_read_page_raw()
1045 chip->ecc.size); in mtk_nfc_read_page_raw()
1059 * CNRNB: nand ready/busy register in mtk_nfc_hw_init()
1060 * ------------------------------- in mtk_nfc_hw_init()
1061 * 7:4: timeout register for polling the NAND busy/ready signal in mtk_nfc_hw_init()
1085 complete(&nfc->done); in mtk_nfc_irq()
1094 ret = clk_prepare_enable(clk->nfi_clk); in mtk_nfc_enable_clk()
1100 ret = clk_prepare_enable(clk->pad_clk); in mtk_nfc_enable_clk()
1103 clk_disable_unprepare(clk->nfi_clk); in mtk_nfc_enable_clk()
1112 clk_disable_unprepare(clk->nfi_clk); in mtk_nfc_disable_clk()
1113 clk_disable_unprepare(clk->pad_clk); in mtk_nfc_disable_clk()
1121 struct mtk_nfc_fdm *fdm = &mtk_nand->fdm; in mtk_nfc_ooblayout_free()
1124 eccsteps = mtd->writesize / chip->ecc.size; in mtk_nfc_ooblayout_free()
1127 return -ERANGE; in mtk_nfc_ooblayout_free()
1129 oob_region->length = fdm->reg_size - fdm->ecc_size; in mtk_nfc_ooblayout_free()
1130 oob_region->offset = section * fdm->reg_size + fdm->ecc_size; in mtk_nfc_ooblayout_free()
1143 return -ERANGE; in mtk_nfc_ooblayout_ecc()
1145 eccsteps = mtd->writesize / chip->ecc.size; in mtk_nfc_ooblayout_ecc()
1146 oob_region->offset = mtk_nand->fdm.reg_size * eccsteps; in mtk_nfc_ooblayout_ecc()
1147 oob_region->length = mtd->oobsize - oob_region->offset; in mtk_nfc_ooblayout_ecc()
1154 .ecc = mtk_nfc_ooblayout_ecc,
1159 struct nand_chip *nand = mtd_to_nand(mtd); in mtk_nfc_set_fdm() local
1160 struct mtk_nfc_nand_chip *chip = to_mtk_nand(nand); in mtk_nfc_set_fdm()
1161 struct mtk_nfc *nfc = nand_get_controller_data(nand); in mtk_nfc_set_fdm()
1164 ecc_bytes = DIV_ROUND_UP(nand->ecc.strength * in mtk_nfc_set_fdm()
1165 mtk_ecc_get_parity_bits(nfc->ecc), 8); in mtk_nfc_set_fdm()
1167 fdm->reg_size = chip->spare_per_sector - ecc_bytes; in mtk_nfc_set_fdm()
1168 if (fdm->reg_size > NFI_FDM_MAX_SIZE) in mtk_nfc_set_fdm()
1169 fdm->reg_size = NFI_FDM_MAX_SIZE; in mtk_nfc_set_fdm()
1172 fdm->ecc_size = 1; in mtk_nfc_set_fdm()
1178 struct nand_chip *nand = mtd_to_nand(mtd); in mtk_nfc_set_bad_mark_ctl() local
1180 if (mtd->writesize == 512) { in mtk_nfc_set_bad_mark_ctl()
1181 bm_ctl->bm_swap = mtk_nfc_no_bad_mark_swap; in mtk_nfc_set_bad_mark_ctl()
1183 bm_ctl->bm_swap = mtk_nfc_bad_mark_swap; in mtk_nfc_set_bad_mark_ctl()
1184 bm_ctl->sec = mtd->writesize / mtk_data_len(nand); in mtk_nfc_set_bad_mark_ctl()
1185 bm_ctl->pos = mtd->writesize % mtk_data_len(nand); in mtk_nfc_set_bad_mark_ctl()
1191 struct nand_chip *nand = mtd_to_nand(mtd); in mtk_nfc_set_spare_per_sector() local
1192 struct mtk_nfc *nfc = nand_get_controller_data(nand); in mtk_nfc_set_spare_per_sector()
1193 const u8 *spare = nfc->caps->spare_size; in mtk_nfc_set_spare_per_sector()
1196 eccsteps = mtd->writesize / nand->ecc.size; in mtk_nfc_set_spare_per_sector()
1197 *sps = mtd->oobsize / eccsteps; in mtk_nfc_set_spare_per_sector()
1199 if (nand->ecc.size == 1024) in mtk_nfc_set_spare_per_sector()
1203 return -EINVAL; in mtk_nfc_set_spare_per_sector()
1205 for (i = 0; i < nfc->caps->num_spare_size; i++) { in mtk_nfc_set_spare_per_sector()
1215 if (nand->ecc.size == 1024) in mtk_nfc_set_spare_per_sector()
1223 struct nand_chip *nand = mtd_to_nand(mtd); in mtk_nfc_ecc_init() local
1224 struct mtk_nfc *nfc = nand_get_controller_data(nand); in mtk_nfc_ecc_init()
1228 /* support only ecc hw mode */ in mtk_nfc_ecc_init()
1229 if (nand->ecc.mode != NAND_ECC_HW) { in mtk_nfc_ecc_init()
1230 dev_err(dev, "ecc.mode not supported\n"); in mtk_nfc_ecc_init()
1231 return -EINVAL; in mtk_nfc_ecc_init()
1235 if (!nand->ecc.size || !nand->ecc.strength) { in mtk_nfc_ecc_init()
1237 nand->ecc.strength = nand->base.eccreq.strength; in mtk_nfc_ecc_init()
1238 nand->ecc.size = nand->base.eccreq.step_size; in mtk_nfc_ecc_init()
1244 if (nand->ecc.size < 1024) { in mtk_nfc_ecc_init()
1245 if (mtd->writesize > 512 && in mtk_nfc_ecc_init()
1246 nfc->caps->max_sector_size > 512) { in mtk_nfc_ecc_init()
1247 nand->ecc.size = 1024; in mtk_nfc_ecc_init()
1248 nand->ecc.strength <<= 1; in mtk_nfc_ecc_init()
1250 nand->ecc.size = 512; in mtk_nfc_ecc_init()
1253 nand->ecc.size = 1024; in mtk_nfc_ecc_init()
1260 /* calculate oob bytes except ecc parity data */ in mtk_nfc_ecc_init()
1261 free = (nand->ecc.strength * mtk_ecc_get_parity_bits(nfc->ecc) in mtk_nfc_ecc_init()
1263 free = spare - free; in mtk_nfc_ecc_init()
1266 * enhance ecc strength if oob left is bigger than max FDM size in mtk_nfc_ecc_init()
1267 * or reduce ecc strength if oob size is not enough for ecc in mtk_nfc_ecc_init()
1271 spare -= NFI_FDM_MAX_SIZE; in mtk_nfc_ecc_init()
1272 nand->ecc.strength = (spare << 3) / in mtk_nfc_ecc_init()
1273 mtk_ecc_get_parity_bits(nfc->ecc); in mtk_nfc_ecc_init()
1275 spare -= NFI_FDM_MIN_SIZE; in mtk_nfc_ecc_init()
1276 nand->ecc.strength = (spare << 3) / in mtk_nfc_ecc_init()
1277 mtk_ecc_get_parity_bits(nfc->ecc); in mtk_nfc_ecc_init()
1281 mtk_ecc_adjust_strength(nfc->ecc, &nand->ecc.strength); in mtk_nfc_ecc_init()
1284 nand->ecc.size, nand->ecc.strength); in mtk_nfc_ecc_init()
1292 struct device *dev = mtd->dev.parent; in mtk_nfc_attach_chip()
1298 if (chip->options & NAND_BUSWIDTH_16) { in mtk_nfc_attach_chip()
1300 return -EINVAL; in mtk_nfc_attach_chip()
1304 if (chip->bbt_options & NAND_BBT_USE_FLASH) in mtk_nfc_attach_chip()
1305 chip->bbt_options |= NAND_BBT_NO_OOB; in mtk_nfc_attach_chip()
1311 ret = mtk_nfc_set_spare_per_sector(&mtk_nand->spare_per_sector, mtd); in mtk_nfc_attach_chip()
1315 mtk_nfc_set_fdm(&mtk_nand->fdm, mtd); in mtk_nfc_attach_chip()
1316 mtk_nfc_set_bad_mark_ctl(&mtk_nand->bad_mark, mtd); in mtk_nfc_attach_chip()
1318 len = mtd->writesize + mtd->oobsize; in mtk_nfc_attach_chip()
1319 nfc->buffer = devm_kzalloc(dev, len, GFP_KERNEL); in mtk_nfc_attach_chip()
1320 if (!nfc->buffer) in mtk_nfc_attach_chip()
1321 return -ENOMEM; in mtk_nfc_attach_chip()
1335 struct nand_chip *nand; in mtk_nfc_nand_chip_init() local
1343 return -ENODEV; in mtk_nfc_nand_chip_init()
1348 return -EINVAL; in mtk_nfc_nand_chip_init()
1354 return -ENOMEM; in mtk_nfc_nand_chip_init()
1356 chip->nsels = nsels; in mtk_nfc_nand_chip_init()
1366 return -EINVAL; in mtk_nfc_nand_chip_init()
1369 if (test_and_set_bit(tmp, &nfc->assigned_cs)) { in mtk_nfc_nand_chip_init()
1371 return -EINVAL; in mtk_nfc_nand_chip_init()
1374 chip->sels[i] = tmp; in mtk_nfc_nand_chip_init()
1377 nand = &chip->nand; in mtk_nfc_nand_chip_init()
1378 nand->controller = &nfc->controller; in mtk_nfc_nand_chip_init()
1380 nand_set_flash_node(nand, np); in mtk_nfc_nand_chip_init()
1381 nand_set_controller_data(nand, nfc); in mtk_nfc_nand_chip_init()
1383 nand->options |= NAND_USE_BOUNCE_BUFFER | NAND_SUBPAGE_READ; in mtk_nfc_nand_chip_init()
1384 nand->legacy.dev_ready = mtk_nfc_dev_ready; in mtk_nfc_nand_chip_init()
1385 nand->legacy.select_chip = mtk_nfc_select_chip; in mtk_nfc_nand_chip_init()
1386 nand->legacy.write_byte = mtk_nfc_write_byte; in mtk_nfc_nand_chip_init()
1387 nand->legacy.write_buf = mtk_nfc_write_buf; in mtk_nfc_nand_chip_init()
1388 nand->legacy.read_byte = mtk_nfc_read_byte; in mtk_nfc_nand_chip_init()
1389 nand->legacy.read_buf = mtk_nfc_read_buf; in mtk_nfc_nand_chip_init()
1390 nand->legacy.cmd_ctrl = mtk_nfc_cmd_ctrl; in mtk_nfc_nand_chip_init()
1393 nand->ecc.mode = NAND_ECC_HW; in mtk_nfc_nand_chip_init()
1395 nand->ecc.write_subpage = mtk_nfc_write_subpage_hwecc; in mtk_nfc_nand_chip_init()
1396 nand->ecc.write_page_raw = mtk_nfc_write_page_raw; in mtk_nfc_nand_chip_init()
1397 nand->ecc.write_page = mtk_nfc_write_page_hwecc; in mtk_nfc_nand_chip_init()
1398 nand->ecc.write_oob_raw = mtk_nfc_write_oob_std; in mtk_nfc_nand_chip_init()
1399 nand->ecc.write_oob = mtk_nfc_write_oob_std; in mtk_nfc_nand_chip_init()
1401 nand->ecc.read_subpage = mtk_nfc_read_subpage_hwecc; in mtk_nfc_nand_chip_init()
1402 nand->ecc.read_page_raw = mtk_nfc_read_page_raw; in mtk_nfc_nand_chip_init()
1403 nand->ecc.read_page = mtk_nfc_read_page_hwecc; in mtk_nfc_nand_chip_init()
1404 nand->ecc.read_oob_raw = mtk_nfc_read_oob_std; in mtk_nfc_nand_chip_init()
1405 nand->ecc.read_oob = mtk_nfc_read_oob_std; in mtk_nfc_nand_chip_init()
1407 mtd = nand_to_mtd(nand); in mtk_nfc_nand_chip_init()
1408 mtd->owner = THIS_MODULE; in mtk_nfc_nand_chip_init()
1409 mtd->dev.parent = dev; in mtk_nfc_nand_chip_init()
1410 mtd->name = MTK_NAME; in mtk_nfc_nand_chip_init()
1415 ret = nand_scan(nand, nsels); in mtk_nfc_nand_chip_init()
1422 nand_release(nand); in mtk_nfc_nand_chip_init()
1426 list_add_tail(&chip->node, &nfc->chips); in mtk_nfc_nand_chip_init()
1433 struct device_node *np = dev->of_node; in mtk_nfc_nand_chips_init()
1477 .compatible = "mediatek,mt2701-nfc",
1480 .compatible = "mediatek,mt2712-nfc",
1483 .compatible = "mediatek,mt7622-nfc",
1492 struct device *dev = &pdev->dev; in mtk_nfc_probe()
1493 struct device_node *np = dev->of_node; in mtk_nfc_probe()
1500 return -ENOMEM; in mtk_nfc_probe()
1502 nand_controller_init(&nfc->controller); in mtk_nfc_probe()
1503 INIT_LIST_HEAD(&nfc->chips); in mtk_nfc_probe()
1504 nfc->controller.ops = &mtk_nfc_controller_ops; in mtk_nfc_probe()
1507 nfc->ecc = of_mtk_ecc_get(np); in mtk_nfc_probe()
1508 if (IS_ERR(nfc->ecc)) in mtk_nfc_probe()
1509 return PTR_ERR(nfc->ecc); in mtk_nfc_probe()
1510 else if (!nfc->ecc) in mtk_nfc_probe()
1511 return -ENODEV; in mtk_nfc_probe()
1513 nfc->caps = of_device_get_match_data(dev); in mtk_nfc_probe()
1514 nfc->dev = dev; in mtk_nfc_probe()
1517 nfc->regs = devm_ioremap_resource(dev, res); in mtk_nfc_probe()
1518 if (IS_ERR(nfc->regs)) { in mtk_nfc_probe()
1519 ret = PTR_ERR(nfc->regs); in mtk_nfc_probe()
1523 nfc->clk.nfi_clk = devm_clk_get(dev, "nfi_clk"); in mtk_nfc_probe()
1524 if (IS_ERR(nfc->clk.nfi_clk)) { in mtk_nfc_probe()
1526 ret = PTR_ERR(nfc->clk.nfi_clk); in mtk_nfc_probe()
1530 nfc->clk.pad_clk = devm_clk_get(dev, "pad_clk"); in mtk_nfc_probe()
1531 if (IS_ERR(nfc->clk.pad_clk)) { in mtk_nfc_probe()
1533 ret = PTR_ERR(nfc->clk.pad_clk); in mtk_nfc_probe()
1537 ret = mtk_nfc_enable_clk(dev, &nfc->clk); in mtk_nfc_probe()
1544 ret = -EINVAL; in mtk_nfc_probe()
1548 ret = devm_request_irq(dev, irq, mtk_nfc_irq, 0x0, "mtk-nand", nfc); in mtk_nfc_probe()
1564 dev_err(dev, "failed to init nand chips\n"); in mtk_nfc_probe()
1571 mtk_nfc_disable_clk(&nfc->clk); in mtk_nfc_probe()
1574 mtk_ecc_release(nfc->ecc); in mtk_nfc_probe()
1584 while (!list_empty(&nfc->chips)) { in mtk_nfc_remove()
1585 chip = list_first_entry(&nfc->chips, struct mtk_nfc_nand_chip, in mtk_nfc_remove()
1587 nand_release(&chip->nand); in mtk_nfc_remove()
1588 list_del(&chip->node); in mtk_nfc_remove()
1591 mtk_ecc_release(nfc->ecc); in mtk_nfc_remove()
1592 mtk_nfc_disable_clk(&nfc->clk); in mtk_nfc_remove()
1602 mtk_nfc_disable_clk(&nfc->clk); in mtk_nfc_suspend()
1611 struct nand_chip *nand; in mtk_nfc_resume() local
1617 ret = mtk_nfc_enable_clk(dev, &nfc->clk); in mtk_nfc_resume()
1621 /* reset NAND chip if VCC was powered off */ in mtk_nfc_resume()
1622 list_for_each_entry(chip, &nfc->chips, node) { in mtk_nfc_resume()
1623 nand = &chip->nand; in mtk_nfc_resume()
1624 for (i = 0; i < chip->nsels; i++) in mtk_nfc_resume()
1625 nand_reset(nand, i); in mtk_nfc_resume()
1650 MODULE_DESCRIPTION("MTK Nand Flash Controller Driver");