Lines Matching full:ecc

3  * MTK ECC controller driver.
67 /* ecc strength that each IP supports */
118 static inline void mtk_ecc_wait_idle(struct mtk_ecc *ecc, in mtk_ecc_wait_idle() argument
121 struct device *dev = ecc->dev; in mtk_ecc_wait_idle()
125 ret = readl_poll_timeout_atomic(ecc->regs + ECC_IDLE_REG(op), val, in mtk_ecc_wait_idle()
135 struct mtk_ecc *ecc = id; in mtk_ecc_irq() local
138 dec = readw(ecc->regs + ecc->caps->ecc_regs[ECC_DECIRQ_STA]) in mtk_ecc_irq()
141 dec = readw(ecc->regs + ecc->caps->ecc_regs[ECC_DECDONE]); in mtk_ecc_irq()
142 if (dec & ecc->sectors) { in mtk_ecc_irq()
147 readw(ecc->regs + ecc->caps->ecc_regs[ECC_DECIRQ_STA]); in mtk_ecc_irq()
148 ecc->sectors = 0; in mtk_ecc_irq()
149 complete(&ecc->done); in mtk_ecc_irq()
154 enc = readl(ecc->regs + ecc->caps->ecc_regs[ECC_ENCIRQ_STA]) in mtk_ecc_irq()
157 complete(&ecc->done); in mtk_ecc_irq()
165 static int mtk_ecc_config(struct mtk_ecc *ecc, struct mtk_ecc_config *config) in mtk_ecc_config() argument
170 for (i = 0; i < ecc->caps->num_ecc_strength; i++) { in mtk_ecc_config()
171 if (ecc->caps->ecc_strength[i] == config->strength) in mtk_ecc_config()
175 if (i == ecc->caps->num_ecc_strength) { in mtk_ecc_config()
176 dev_err(ecc->dev, "invalid ecc strength %d\n", in mtk_ecc_config()
184 /* configure ECC encoder (in bits) */ in mtk_ecc_config()
187 reg = ecc_bit | (config->mode << ecc->caps->ecc_mode_shift); in mtk_ecc_config()
189 writel(reg, ecc->regs + ECC_ENCCNFG); in mtk_ecc_config()
193 ecc->regs + ECC_ENCDIADDR); in mtk_ecc_config()
196 /* configure ECC decoder (in bits) */ in mtk_ecc_config()
198 config->strength * ecc->caps->parity_bits; in mtk_ecc_config()
200 reg = ecc_bit | (config->mode << ecc->caps->ecc_mode_shift); in mtk_ecc_config()
203 writel(reg, ecc->regs + ECC_DECCNFG); in mtk_ecc_config()
206 ecc->sectors = 1 << (config->sectors - 1); in mtk_ecc_config()
212 void mtk_ecc_get_stats(struct mtk_ecc *ecc, struct mtk_ecc_stats *stats, in mtk_ecc_get_stats() argument
223 err = readl(ecc->regs + ECC_DECENUM0 + offset); in mtk_ecc_get_stats()
225 err &= ecc->caps->err_mask; in mtk_ecc_get_stats()
226 if (err == ecc->caps->err_mask) { in mtk_ecc_get_stats()
240 void mtk_ecc_release(struct mtk_ecc *ecc) in mtk_ecc_release() argument
242 clk_disable_unprepare(ecc->clk); in mtk_ecc_release()
243 put_device(ecc->dev); in mtk_ecc_release()
247 static void mtk_ecc_hw_init(struct mtk_ecc *ecc) in mtk_ecc_hw_init() argument
249 mtk_ecc_wait_idle(ecc, ECC_ENCODE); in mtk_ecc_hw_init()
250 writew(ECC_OP_DISABLE, ecc->regs + ECC_ENCCON); in mtk_ecc_hw_init()
252 mtk_ecc_wait_idle(ecc, ECC_DECODE); in mtk_ecc_hw_init()
253 writel(ECC_OP_DISABLE, ecc->regs + ECC_DECCON); in mtk_ecc_hw_init()
259 struct mtk_ecc *ecc; in mtk_ecc_get() local
265 ecc = platform_get_drvdata(pdev); in mtk_ecc_get()
266 if (!ecc) { in mtk_ecc_get()
271 clk_prepare_enable(ecc->clk); in mtk_ecc_get()
272 mtk_ecc_hw_init(ecc); in mtk_ecc_get()
274 return ecc; in mtk_ecc_get()
279 struct mtk_ecc *ecc = NULL; in of_mtk_ecc_get() local
282 np = of_parse_phandle(of_node, "ecc-engine", 0); in of_mtk_ecc_get()
284 ecc = mtk_ecc_get(np); in of_mtk_ecc_get()
288 return ecc; in of_mtk_ecc_get()
292 int mtk_ecc_enable(struct mtk_ecc *ecc, struct mtk_ecc_config *config) in mtk_ecc_enable() argument
298 ret = mutex_lock_interruptible(&ecc->lock); in mtk_ecc_enable()
300 dev_err(ecc->dev, "interrupted when attempting to lock\n"); in mtk_ecc_enable()
304 mtk_ecc_wait_idle(ecc, op); in mtk_ecc_enable()
306 ret = mtk_ecc_config(ecc, config); in mtk_ecc_enable()
308 mutex_unlock(&ecc->lock); in mtk_ecc_enable()
313 init_completion(&ecc->done); in mtk_ecc_enable()
316 * For ECC_NFI_MODE, if ecc->caps->pg_irq_sel is 1, then it in mtk_ecc_enable()
317 * means this chip can only generate one ecc irq during page in mtk_ecc_enable()
318 * read / write. If is 0, generate one ecc irq each ecc step. in mtk_ecc_enable()
320 if (ecc->caps->pg_irq_sel && config->mode == ECC_NFI_MODE) in mtk_ecc_enable()
323 writew(reg_val, ecc->regs + in mtk_ecc_enable()
324 ecc->caps->ecc_regs[ECC_ENCIRQ_EN]); in mtk_ecc_enable()
326 writew(reg_val, ecc->regs + in mtk_ecc_enable()
327 ecc->caps->ecc_regs[ECC_DECIRQ_EN]); in mtk_ecc_enable()
330 writew(ECC_OP_ENABLE, ecc->regs + ECC_CTL_REG(op)); in mtk_ecc_enable()
336 void mtk_ecc_disable(struct mtk_ecc *ecc) in mtk_ecc_disable() argument
341 if (readw(ecc->regs + ECC_CTL_REG(op)) != ECC_OP_ENABLE) in mtk_ecc_disable()
345 mtk_ecc_wait_idle(ecc, op); in mtk_ecc_disable()
351 readw(ecc->regs + ecc->caps->ecc_regs[ECC_DECDONE]); in mtk_ecc_disable()
352 writew(0, ecc->regs + ecc->caps->ecc_regs[ECC_DECIRQ_EN]); in mtk_ecc_disable()
354 writew(0, ecc->regs + ecc->caps->ecc_regs[ECC_ENCIRQ_EN]); in mtk_ecc_disable()
357 writew(ECC_OP_DISABLE, ecc->regs + ECC_CTL_REG(op)); in mtk_ecc_disable()
359 mutex_unlock(&ecc->lock); in mtk_ecc_disable()
363 int mtk_ecc_wait_done(struct mtk_ecc *ecc, enum mtk_ecc_operation op) in mtk_ecc_wait_done() argument
367 ret = wait_for_completion_timeout(&ecc->done, msecs_to_jiffies(500)); in mtk_ecc_wait_done()
369 dev_err(ecc->dev, "%s timeout - interrupt did not arrive)\n", in mtk_ecc_wait_done()
378 int mtk_ecc_encode(struct mtk_ecc *ecc, struct mtk_ecc_config *config, in mtk_ecc_encode() argument
385 addr = dma_map_single(ecc->dev, data, bytes, DMA_TO_DEVICE); in mtk_ecc_encode()
386 ret = dma_mapping_error(ecc->dev, addr); in mtk_ecc_encode()
388 dev_err(ecc->dev, "dma mapping error\n"); in mtk_ecc_encode()
394 ret = mtk_ecc_enable(ecc, config); in mtk_ecc_encode()
396 dma_unmap_single(ecc->dev, addr, bytes, DMA_TO_DEVICE); in mtk_ecc_encode()
400 ret = mtk_ecc_wait_done(ecc, ECC_ENCODE); in mtk_ecc_encode()
404 mtk_ecc_wait_idle(ecc, ECC_ENCODE); in mtk_ecc_encode()
406 /* Program ECC bytes to OOB: per sector oob = FDM + ECC + SPARE */ in mtk_ecc_encode()
407 len = (config->strength * ecc->caps->parity_bits + 7) >> 3; in mtk_ecc_encode()
409 /* write the parity bytes generated by the ECC back to temp buffer */ in mtk_ecc_encode()
410 __ioread32_copy(ecc->eccdata, in mtk_ecc_encode()
411 ecc->regs + ecc->caps->ecc_regs[ECC_ENCPAR00], in mtk_ecc_encode()
415 memcpy(data + bytes, ecc->eccdata, len); in mtk_ecc_encode()
418 dma_unmap_single(ecc->dev, addr, bytes, DMA_TO_DEVICE); in mtk_ecc_encode()
419 mtk_ecc_disable(ecc); in mtk_ecc_encode()
425 void mtk_ecc_adjust_strength(struct mtk_ecc *ecc, u32 *p) in mtk_ecc_adjust_strength() argument
427 const u8 *ecc_strength = ecc->caps->ecc_strength; in mtk_ecc_adjust_strength()
430 for (i = 0; i < ecc->caps->num_ecc_strength; i++) { in mtk_ecc_adjust_strength()
440 *p = ecc_strength[ecc->caps->num_ecc_strength - 1]; in mtk_ecc_adjust_strength()
444 unsigned int mtk_ecc_get_parity_bits(struct mtk_ecc *ecc) in mtk_ecc_get_parity_bits() argument
446 return ecc->caps->parity_bits; in mtk_ecc_get_parity_bits()
482 .compatible = "mediatek,mt2701-ecc",
485 .compatible = "mediatek,mt2712-ecc",
488 .compatible = "mediatek,mt7622-ecc",
497 struct mtk_ecc *ecc; in mtk_ecc_probe() local
502 ecc = devm_kzalloc(dev, sizeof(*ecc), GFP_KERNEL); in mtk_ecc_probe()
503 if (!ecc) in mtk_ecc_probe()
506 ecc->caps = of_device_get_match_data(dev); in mtk_ecc_probe()
508 max_eccdata_size = ecc->caps->num_ecc_strength - 1; in mtk_ecc_probe()
509 max_eccdata_size = ecc->caps->ecc_strength[max_eccdata_size]; in mtk_ecc_probe()
510 max_eccdata_size = (max_eccdata_size * ecc->caps->parity_bits + 7) >> 3; in mtk_ecc_probe()
512 ecc->eccdata = devm_kzalloc(dev, max_eccdata_size, GFP_KERNEL); in mtk_ecc_probe()
513 if (!ecc->eccdata) in mtk_ecc_probe()
517 ecc->regs = devm_ioremap_resource(dev, res); in mtk_ecc_probe()
518 if (IS_ERR(ecc->regs)) { in mtk_ecc_probe()
519 dev_err(dev, "failed to map regs: %ld\n", PTR_ERR(ecc->regs)); in mtk_ecc_probe()
520 return PTR_ERR(ecc->regs); in mtk_ecc_probe()
523 ecc->clk = devm_clk_get(dev, NULL); in mtk_ecc_probe()
524 if (IS_ERR(ecc->clk)) { in mtk_ecc_probe()
525 dev_err(dev, "failed to get clock: %ld\n", PTR_ERR(ecc->clk)); in mtk_ecc_probe()
526 return PTR_ERR(ecc->clk); in mtk_ecc_probe()
541 ret = devm_request_irq(dev, irq, mtk_ecc_irq, 0x0, "mtk-ecc", ecc); in mtk_ecc_probe()
547 ecc->dev = dev; in mtk_ecc_probe()
548 mutex_init(&ecc->lock); in mtk_ecc_probe()
549 platform_set_drvdata(pdev, ecc); in mtk_ecc_probe()
558 struct mtk_ecc *ecc = dev_get_drvdata(dev); in mtk_ecc_suspend() local
560 clk_disable_unprepare(ecc->clk); in mtk_ecc_suspend()
567 struct mtk_ecc *ecc = dev_get_drvdata(dev); in mtk_ecc_resume() local
570 ret = clk_prepare_enable(ecc->clk); in mtk_ecc_resume()
587 .name = "mtk-ecc",
598 MODULE_DESCRIPTION("MTK Nand ECC Driver");