58 #define SLCCTRL_ECC_CLEAR	(1 << 1) /* Reset ECC bit */
65 #define SLCCFG_DMA_ECC		(1 << 4) /* Enable DMA ECC bit */
66 #define SLCCFG_ECC_EN		(1 << 3) /* ECC enable bit */
110 /* ECC line party fetch macro */
115  * DMA requires storage space for the DMA local buffer and the hardware ECC
122 /* Number of bytes used for ECC stored in NAND per 256 bytes */
136  * NAND ECC Layout for small page NAND devices
169 	.ecc = lpc32xx_ooblayout_ecc,
231 	 * DMA and CPU addresses of ECC work area and data buffer
327  * Prepares SLC for transfers with H/W ECC enabled
331 	/* Hardware ECC is enabled automatically in hardware as needed */  in lpc32xx_nand_ecc_enable()
335  * Calculates the ECC for the data
342 	 * ECC is calculated automatically in hardware during syndrome read  in lpc32xx_nand_ecc_calculate()
359  * Simple device read without ECC
365 	/* Direct device read with no ECC */  in lpc32xx_nand_read_buf()
371  * Simple device write without ECC
378 	/* Direct device write with no ECC */  in lpc32xx_nand_write_buf()
384  * Read the OOB data from the device without ECC using FIFO method
394  * Write the OOB data to the device without ECC using FIFO method
405  * Fills in the ECC fields in the OOB buffer with the hardware generated ECC
407 static void lpc32xx_slc_ecc_copy(uint8_t *spare, const uint32_t *ecc, int count)  in lpc32xx_slc_ecc_copy()  argument
412 		uint32_t ce = ecc[i / 3];  in lpc32xx_slc_ecc_copy()
485  * DMA read/write transfers with ECC support
521 	/* Clear initial ECC */  in lpc32xx_xfer()
531 	for (i = 0; i < chip->ecc.steps; i++) {  in lpc32xx_xfer()
534 				       dma_buf + i * chip->ecc.size,  in lpc32xx_xfer()
535 				       mtd->writesize / chip->ecc.steps, dir);  in lpc32xx_xfer()
539 		/* Always _read_ ECC */  in lpc32xx_xfer()
540 		if (i == chip->ecc.steps - 1)  in lpc32xx_xfer()
542 		if (!read) /* ECC availability delayed on write */  in lpc32xx_xfer()
569 	/* Read last calculated ECC value */  in lpc32xx_xfer()
572 	host->ecc_buf[chip->ecc.steps - 1] =  in lpc32xx_xfer()
585 	/* Stop DMA & HW ECC */  in lpc32xx_xfer()
599  * Read the data and OOB data from the device, use ECC correction with the
600  * data, disable ECC for the OOB data
614 	/* Read data and oob, calculate ECC */  in lpc32xx_nand_read_page_syndrome()
615 	status = lpc32xx_xfer(mtd, buf, chip->ecc.steps, 1);  in lpc32xx_nand_read_page_syndrome()
620 	/* Convert to stored ECC format */  in lpc32xx_nand_read_page_syndrome()
621 	lpc32xx_slc_ecc_copy(tmpecc, (uint32_t *) host->ecc_buf, chip->ecc.steps);  in lpc32xx_nand_read_page_syndrome()
623 	/* Pointer to ECC data retrieved from NAND spare area */  in lpc32xx_nand_read_page_syndrome()
630 	for (i = 0; i < chip->ecc.steps; i++) {  in lpc32xx_nand_read_page_syndrome()
631 		stat = chip->ecc.correct(chip, buf, oobecc,  in lpc32xx_nand_read_page_syndrome()
632 					 &tmpecc[i * chip->ecc.bytes]);  in lpc32xx_nand_read_page_syndrome()
638 		buf += chip->ecc.size;  in lpc32xx_nand_read_page_syndrome()
639 		oobecc += chip->ecc.bytes;  in lpc32xx_nand_read_page_syndrome()
646  * Read the data and OOB data from the device, no ECC correction with the
659 	chip->legacy.read_buf(chip, buf, chip->ecc.size * chip->ecc.steps);  in lpc32xx_nand_read_page_raw_syndrome()
666  * Write the data and OOB data to the device, use ECC with the data,
667  * disable ECC for the OOB data
681 	/* Write data, calculate ECC on outbound data */  in lpc32xx_nand_write_page_syndrome()
682 	error = lpc32xx_xfer(mtd, (uint8_t *)buf, chip->ecc.steps, 0);  in lpc32xx_nand_write_page_syndrome()
687 	 * The calculated ECC needs some manual work done to it before  in lpc32xx_nand_write_page_syndrome()
688 	 * committing it to NAND. Process the calculated ECC and place  in lpc32xx_nand_write_page_syndrome()
695 	lpc32xx_slc_ecc_copy(pb, (uint32_t *)host->ecc_buf, chip->ecc.steps);  in lpc32xx_nand_write_page_syndrome()
697 	/* Write ECC data to device */  in lpc32xx_nand_write_page_syndrome()
704  * Write the data and OOB data to the device, no ECC correction with the
715 				chip->ecc.size * chip->ecc.steps);  in lpc32xx_nand_write_page_raw_syndrome()
778 	/* OOB and ECC CPU and DMA work areas */  in lpc32xx_nand_attach_chip()
790 	chip->ecc.size = 256;  in lpc32xx_nand_attach_chip()
791 	chip->ecc.bytes = LPC32XX_SLC_DEV_ECC_BYTES;  in lpc32xx_nand_attach_chip()
792 	chip->ecc.prepad = 0;  in lpc32xx_nand_attach_chip()
793 	chip->ecc.postpad = 0;  in lpc32xx_nand_attach_chip()
797 	 * won't interfere with the ECC layout. Large and huge page  in lpc32xx_nand_attach_chip()
884 	chip->ecc.mode = NAND_ECC_HW_SYNDROME;  in lpc32xx_nand_probe()
888 	chip->ecc.read_page_raw = lpc32xx_nand_read_page_raw_syndrome;  in lpc32xx_nand_probe()
889 	chip->ecc.read_page = lpc32xx_nand_read_page_syndrome;  in lpc32xx_nand_probe()
890 	chip->ecc.write_page_raw = lpc32xx_nand_write_page_raw_syndrome;  in lpc32xx_nand_probe()
891 	chip->ecc.write_page = lpc32xx_nand_write_page_syndrome;  in lpc32xx_nand_probe()
892 	chip->ecc.write_oob = lpc32xx_nand_write_oob_syndrome;  in lpc32xx_nand_probe()
893 	chip->ecc.read_oob = lpc32xx_nand_read_oob_syndrome;  in lpc32xx_nand_probe()
894 	chip->ecc.calculate = lpc32xx_nand_ecc_calculate;  in lpc32xx_nand_probe()
895 	chip->ecc.correct = nand_correct_data;  in lpc32xx_nand_probe()
896 	chip->ecc.strength = 1;  in lpc32xx_nand_probe()
897 	chip->ecc.hwctl = lpc32xx_nand_ecc_enable;  in lpc32xx_nand_probe()
901 	 * extra space for the spare area and ECC storage area  in lpc32xx_nand_probe()