163 	if (section >= chip->ecc.steps)  in fsmc_ecc1_ooblayout_ecc()
177 	if (section >= chip->ecc.steps)  in fsmc_ecc1_ooblayout_free()
182 	if (section < chip->ecc.steps - 1)  in fsmc_ecc1_ooblayout_free()
191 	.ecc = fsmc_ecc1_ooblayout_ecc,
196  * ECC placement definitions in oobfree type format.
197  * There are 13 bytes of ecc for every 512 byte block and it has to be read
206 	if (section >= chip->ecc.steps)  in fsmc_ecc4_ooblayout_ecc()
209 	oobregion->length = chip->ecc.bytes;  in fsmc_ecc4_ooblayout_ecc()
224 	if (section >= chip->ecc.steps)  in fsmc_ecc4_ooblayout_free()
229 	if (section < chip->ecc.steps - 1)  in fsmc_ecc4_ooblayout_free()
238 	.ecc = fsmc_ecc4_ooblayout_ecc,
355  * fsmc_enable_hwecc - Enables Hardware ECC through FSMC registers
370  * fsmc_read_hwecc_ecc4 - Hardware ECC calculator for ecc4 option supported by
371  * FSMC. ECC is 13 bytes for 512 bytes of data (supports error correction up to
375 				u8 *ecc)  in fsmc_read_hwecc_ecc4()  argument
389 		dev_err(host->dev, "calculate ecc timed out\n");  in fsmc_read_hwecc_ecc4()
394 	ecc[0] = ecc_tmp;  in fsmc_read_hwecc_ecc4()
395 	ecc[1] = ecc_tmp >> 8;  in fsmc_read_hwecc_ecc4()
396 	ecc[2] = ecc_tmp >> 16;  in fsmc_read_hwecc_ecc4()
397 	ecc[3] = ecc_tmp >> 24;  in fsmc_read_hwecc_ecc4()
400 	ecc[4] = ecc_tmp;  in fsmc_read_hwecc_ecc4()
401 	ecc[5] = ecc_tmp >> 8;  in fsmc_read_hwecc_ecc4()
402 	ecc[6] = ecc_tmp >> 16;  in fsmc_read_hwecc_ecc4()
403 	ecc[7] = ecc_tmp >> 24;  in fsmc_read_hwecc_ecc4()
406 	ecc[8] = ecc_tmp;  in fsmc_read_hwecc_ecc4()
407 	ecc[9] = ecc_tmp >> 8;  in fsmc_read_hwecc_ecc4()
408 	ecc[10] = ecc_tmp >> 16;  in fsmc_read_hwecc_ecc4()
409 	ecc[11] = ecc_tmp >> 24;  in fsmc_read_hwecc_ecc4()
412 	ecc[12] = ecc_tmp >> 16;  in fsmc_read_hwecc_ecc4()
418  * fsmc_read_hwecc_ecc1 - Hardware ECC calculator for ecc1 option supported by
419  * FSMC. ECC is 3 bytes for 512 bytes of data (supports error correction up to
423 				u8 *ecc)  in fsmc_read_hwecc_ecc1()  argument
429 	ecc[0] = ecc_tmp;  in fsmc_read_hwecc_ecc1()
430 	ecc[1] = ecc_tmp >> 8;  in fsmc_read_hwecc_ecc1()
431 	ecc[2] = ecc_tmp >> 16;  in fsmc_read_hwecc_ecc1()
667  * data(512 byte) -> ecc(13 byte)
675 	int i, j, s, stat, eccsize = chip->ecc.size;  in fsmc_read_page_hwecc()
676 	int eccbytes = chip->ecc.bytes;  in fsmc_read_page_hwecc()
677 	int eccsteps = chip->ecc.steps;  in fsmc_read_page_hwecc()
679 	u8 *ecc_calc = chip->ecc.calc_buf;  in fsmc_read_page_hwecc()
680 	u8 *ecc_code = chip->ecc.code_buf;  in fsmc_read_page_hwecc()
693 		chip->ecc.hwctl(chip, NAND_ECC_READ);  in fsmc_read_page_hwecc()
720 		memcpy(&ecc_code[i], oob, chip->ecc.bytes);  in fsmc_read_page_hwecc()
721 		chip->ecc.calculate(chip, p, &ecc_calc[i]);  in fsmc_read_page_hwecc()
723 		stat = chip->ecc.correct(chip, p, &ecc_code[i], &ecc_calc[i]);  in fsmc_read_page_hwecc()
739  * @read_ecc:	ecc read from device spare area
740  * @calc_ecc:	ecc calculated from read data
763 		 * would result in an ecc error because the oob data is also  in fsmc_bch8_correct_data()
764 		 * erased to FF and the calculated ecc for an FF data is not  in fsmc_bch8_correct_data()
775 		int bits_ecc = count_written_bits(read_ecc, chip->ecc.bytes, 8);  in fsmc_bch8_correct_data()
776 		int bits_data = count_written_bits(dat, chip->ecc.size, 8);  in fsmc_bch8_correct_data()
780 				memset(dat, 0xff, chip->ecc.size);  in fsmc_bch8_correct_data()
815 		if (err_idx[i] < chip->ecc.size * 8) {  in fsmc_bch8_correct_data()
899 	switch (nand->ecc.mode) {  in fsmc_nand_attach_chip()
901 		dev_info(host->dev, "Using 1-bit HW ECC scheme\n");  in fsmc_nand_attach_chip()
902 		nand->ecc.calculate = fsmc_read_hwecc_ecc1;  in fsmc_nand_attach_chip()
903 		nand->ecc.correct = nand_correct_data;  in fsmc_nand_attach_chip()
904 		nand->ecc.bytes = 3;  in fsmc_nand_attach_chip()
905 		nand->ecc.strength = 1;  in fsmc_nand_attach_chip()
906 		nand->ecc.options |= NAND_ECC_SOFT_HAMMING_SM_ORDER;  in fsmc_nand_attach_chip()
910 		if (nand->ecc.algo == NAND_ECC_BCH) {  in fsmc_nand_attach_chip()
912 				 "Using 4-bit SW BCH ECC scheme\n");  in fsmc_nand_attach_chip()
920 		dev_err(host->dev, "Unsupported ECC mode!\n");  in fsmc_nand_attach_chip()
925 	 * Don't set layout for BCH4 SW ECC. This will be  in fsmc_nand_attach_chip()
928 	if (nand->ecc.mode == NAND_ECC_HW) {  in fsmc_nand_attach_chip()
1055 	 * Setup default ECC mode. nand_dt_init() called from nand_scan_ident()  in fsmc_nand_probe()
1058 	nand->ecc.mode = NAND_ECC_HW;  in fsmc_nand_probe()
1059 	nand->ecc.hwctl = fsmc_enable_hwecc;  in fsmc_nand_probe()
1060 	nand->ecc.size = 512;  in fsmc_nand_probe()
1084 		nand->ecc.read_page = fsmc_read_page_hwecc;  in fsmc_nand_probe()
1085 		nand->ecc.calculate = fsmc_read_hwecc_ecc4;  in fsmc_nand_probe()
1086 		nand->ecc.correct = fsmc_bch8_correct_data;  in fsmc_nand_probe()
1087 		nand->ecc.bytes = 13;  in fsmc_nand_probe()
1088 		nand->ecc.strength = 8;  in fsmc_nand_probe()