157 	struct fsl_lbc_regs __iomem *lbc = ctrl->regs;  in set_addr()  local
168 		out_be32(&lbc->fbar, page_addr >> 6);  in set_addr()
169 		out_be32(&lbc->fpar,  in set_addr()
178 		out_be32(&lbc->fbar, page_addr >> 5);  in set_addr()
179 		out_be32(&lbc->fpar,  in set_addr()
209 	struct fsl_lbc_regs __iomem *lbc = ctrl->regs;  in fsl_elbc_run_command()  local
212 	out_be32(&lbc->fmr, priv->fmr | 3);  in fsl_elbc_run_command()
214 		out_be32(&lbc->mdr, elbc_fcm_ctrl->mdr);  in fsl_elbc_run_command()
218 	         in_be32(&lbc->fmr), in_be32(&lbc->fir), in_be32(&lbc->fcr));  in fsl_elbc_run_command()
222 	         in_be32(&lbc->fbar), in_be32(&lbc->fpar),  in fsl_elbc_run_command()
223 	         in_be32(&lbc->fbcr), priv->bank);  in fsl_elbc_run_command()
227 	out_be32(&lbc->lsor, priv->bank);  in fsl_elbc_run_command()
235 		elbc_fcm_ctrl->mdr = in_be32(&lbc->mdr);  in fsl_elbc_run_command()
242 		         in_be32(&lbc->fir), in_be32(&lbc->fcr),  in fsl_elbc_run_command()
253 		uint32_t lteccr = in_be32(&lbc->lteccr);  in fsl_elbc_run_command()
266 			out_be32(&lbc->lteccr, 0x000F000F); /* clear lteccr */  in fsl_elbc_run_command()
280 	struct fsl_lbc_regs __iomem *lbc = ctrl->regs;  in fsl_elbc_do_read()  local
283 		out_be32(&lbc->fir,  in fsl_elbc_do_read()
290 		out_be32(&lbc->fcr, (NAND_CMD_READ0 << FCR_CMD0_SHIFT) |  in fsl_elbc_do_read()
293 		out_be32(&lbc->fir,  in fsl_elbc_do_read()
300 			out_be32(&lbc->fcr, NAND_CMD_READOOB << FCR_CMD0_SHIFT);  in fsl_elbc_do_read()
302 			out_be32(&lbc->fcr, NAND_CMD_READ0 << FCR_CMD0_SHIFT);  in fsl_elbc_do_read()
314 	struct fsl_lbc_regs __iomem *lbc = ctrl->regs;  in fsl_elbc_cmdfunc()  local
335 		out_be32(&lbc->fbcr, 0); /* read entire page to enable ECC */  in fsl_elbc_cmdfunc()
360 		out_be32(&lbc->fbcr, mtd->oobsize - column);  in fsl_elbc_cmdfunc()
373 		out_be32(&lbc->fir, (FIR_OP_CM0 << FIR_OP0_SHIFT) |  in fsl_elbc_cmdfunc()
376 		out_be32(&lbc->fcr, command << FCR_CMD0_SHIFT);  in fsl_elbc_cmdfunc()
381 		out_be32(&lbc->fbcr, 256);  in fsl_elbc_cmdfunc()
401 		out_be32(&lbc->fir,  in fsl_elbc_cmdfunc()
408 		out_be32(&lbc->fcr,  in fsl_elbc_cmdfunc()
413 		out_be32(&lbc->fbcr, 0);  in fsl_elbc_cmdfunc()
445 			out_be32(&lbc->fir,  in fsl_elbc_cmdfunc()
454 			out_be32(&lbc->fir,  in fsl_elbc_cmdfunc()
472 		out_be32(&lbc->fcr, fcr);  in fsl_elbc_cmdfunc()
489 			out_be32(&lbc->fbcr,  in fsl_elbc_cmdfunc()
492 			out_be32(&lbc->fbcr, 0);  in fsl_elbc_cmdfunc()
501 		out_be32(&lbc->fir,  in fsl_elbc_cmdfunc()
504 		out_be32(&lbc->fcr, NAND_CMD_STATUS << FCR_CMD0_SHIFT);  in fsl_elbc_cmdfunc()
505 		out_be32(&lbc->fbcr, 1);  in fsl_elbc_cmdfunc()
520 		out_be32(&lbc->fir, FIR_OP_CM0 << FIR_OP0_SHIFT);  in fsl_elbc_cmdfunc()
521 		out_be32(&lbc->fcr, NAND_CMD_RESET << FCR_CMD0_SHIFT);  in fsl_elbc_cmdfunc()
684 	struct fsl_lbc_regs __iomem *lbc = ctrl->regs;  in fsl_elbc_chip_init()  local
697 	if (in_be32(&lbc->bank[priv->bank].or) & OR_FCM_PGS)  in fsl_elbc_chip_init()
728 	struct fsl_lbc_regs __iomem *lbc = ctrl->regs;  in fsl_elbc_attach_chip()  local
738 		if ((in_be32(&lbc->bank[priv->bank].br) & BR_DECC) ==  in fsl_elbc_attach_chip()
812 		clrbits32(&lbc->bank[priv->bank].or, OR_FCM_PGS);  in fsl_elbc_attach_chip()
815 		setbits32(&lbc->bank[priv->bank].or, OR_FCM_PGS);  in fsl_elbc_attach_chip()
849 	struct fsl_lbc_regs __iomem *lbc;  in fsl_elbc_nand_probe()  local
863 	lbc = fsl_lbc_ctrl_dev->regs;  in fsl_elbc_nand_probe()
875 		if ((in_be32(&lbc->bank[bank].br) & BR_V) &&  in fsl_elbc_nand_probe()
876 		    (in_be32(&lbc->bank[bank].br) & BR_MSEL) == BR_MS_FCM &&  in fsl_elbc_nand_probe()
877 		    (in_be32(&lbc->bank[bank].br) &  in fsl_elbc_nand_probe()
878 		     in_be32(&lbc->bank[bank].or) & BR_BA)  in fsl_elbc_nand_probe()