Lines Matching full:nand
13 * Derived from drivers/mtd/nand/autcpu12.c (removed in v3.8)
24 * (u-boot-1.1.5/board/atmel/at91sam9263ek/nand.c)
30 * Add Nand Flash Controller support for SAMA5 SoC
201 struct atmel_nand *nand);
203 int (*setup_data_interface)(struct atmel_nand *nand, int csline,
334 dev_err(nc->base.dev, "Waiting NAND R/B Timeout\n"); in atmel_nfc_wait()
419 struct atmel_nand *nand = to_atmel_nand(chip); in atmel_nand_read_byte() local
421 return ioread8(nand->activecs->io.virt); in atmel_nand_read_byte()
426 struct atmel_nand *nand = to_atmel_nand(chip); in atmel_nand_write_byte() local
429 iowrite16(byte | (byte << 8), nand->activecs->io.virt); in atmel_nand_write_byte()
431 iowrite8(byte, nand->activecs->io.virt); in atmel_nand_write_byte()
436 struct atmel_nand *nand = to_atmel_nand(chip); in atmel_nand_read_buf() local
448 !atmel_nand_dma_transfer(nc, buf, nand->activecs->io.dma, len, in atmel_nand_read_buf()
453 ioread16_rep(nand->activecs->io.virt, buf, len / 2); in atmel_nand_read_buf()
455 ioread8_rep(nand->activecs->io.virt, buf, len); in atmel_nand_read_buf()
460 struct atmel_nand *nand = to_atmel_nand(chip); in atmel_nand_write_buf() local
472 !atmel_nand_dma_transfer(nc, (void *)buf, nand->activecs->io.dma, in atmel_nand_write_buf()
477 iowrite16_rep(nand->activecs->io.virt, buf, len / 2); in atmel_nand_write_buf()
479 iowrite8_rep(nand->activecs->io.virt, buf, len); in atmel_nand_write_buf()
484 struct atmel_nand *nand = to_atmel_nand(chip); in atmel_nand_dev_ready() local
486 return gpiod_get_value(nand->activecs->rb.gpio); in atmel_nand_dev_ready()
491 struct atmel_nand *nand = to_atmel_nand(chip); in atmel_nand_select_chip() local
493 if (cs < 0 || cs >= nand->numcs) { in atmel_nand_select_chip()
494 nand->activecs = NULL; in atmel_nand_select_chip()
499 nand->activecs = &nand->cs[cs]; in atmel_nand_select_chip()
501 if (nand->activecs->rb.type == ATMEL_NAND_GPIO_RB) in atmel_nand_select_chip()
507 struct atmel_nand *nand = to_atmel_nand(chip); in atmel_hsmc_nand_dev_ready() local
515 return status & ATMEL_HSMC_NFC_SR_RBEDGE(nand->activecs->rb.id); in atmel_hsmc_nand_dev_ready()
521 struct atmel_nand *nand = to_atmel_nand(chip); in atmel_hsmc_nand_select_chip() local
528 if (!nand->activecs) { in atmel_hsmc_nand_select_chip()
534 if (nand->activecs->rb.type == ATMEL_NAND_NATIVE_RB) in atmel_hsmc_nand_select_chip()
590 "Failed to send NAND command (err = %d)!", in atmel_nfc_exec_op()
602 struct atmel_nand *nand = to_atmel_nand(chip); in atmel_hsmc_nand_cmd_ctrl() local
620 nc->op.cs = nand->activecs->id; in atmel_hsmc_nand_cmd_ctrl()
628 struct atmel_nand *nand = to_atmel_nand(chip); in atmel_nand_cmd_ctrl() local
633 if ((ctrl & NAND_CTRL_CHANGE) && nand->activecs->csgpio) { in atmel_nand_cmd_ctrl()
635 gpiod_set_value(nand->activecs->csgpio, 0); in atmel_nand_cmd_ctrl()
637 gpiod_set_value(nand->activecs->csgpio, 1); in atmel_nand_cmd_ctrl()
641 writeb(cmd, nand->activecs->io.virt + nc->caps->ale_offs); in atmel_nand_cmd_ctrl()
643 writeb(cmd, nand->activecs->io.virt + nc->caps->cle_offs); in atmel_nand_cmd_ctrl()
719 struct atmel_nand *nand = to_atmel_nand(chip); in atmel_nand_pmecc_enable() local
728 ret = atmel_pmecc_enable(nand->pmecc, op); in atmel_nand_pmecc_enable()
738 struct atmel_nand *nand = to_atmel_nand(chip); in atmel_nand_pmecc_disable() local
741 atmel_pmecc_disable(nand->pmecc); in atmel_nand_pmecc_disable()
746 struct atmel_nand *nand = to_atmel_nand(chip); in atmel_nand_pmecc_generate_eccbytes() local
758 ret = atmel_pmecc_wait_rdy(nand->pmecc); in atmel_nand_pmecc_generate_eccbytes()
761 "Failed to transfer NAND page data (err = %d)\n", in atmel_nand_pmecc_generate_eccbytes()
770 atmel_pmecc_get_generated_eccbytes(nand->pmecc, i, in atmel_nand_pmecc_generate_eccbytes()
781 struct atmel_nand *nand = to_atmel_nand(chip); in atmel_nand_pmecc_correct_data() local
793 ret = atmel_pmecc_wait_rdy(nand->pmecc); in atmel_nand_pmecc_correct_data()
796 "Failed to read NAND page data (err = %d)\n", in atmel_nand_pmecc_correct_data()
806 ret = atmel_pmecc_correct_sector(nand->pmecc, i, databuf, in atmel_nand_pmecc_correct_data()
808 if (ret < 0 && !atmel_pmecc_correct_erased_chunks(nand->pmecc)) in atmel_nand_pmecc_correct_data()
832 struct atmel_nand *nand = to_atmel_nand(chip); in atmel_nand_pmecc_write_pg() local
845 atmel_pmecc_disable(nand->pmecc); in atmel_nand_pmecc_write_pg()
908 struct atmel_nand *nand = to_atmel_nand(chip); in atmel_hsmc_nand_pmecc_write_pg() local
919 nc->op.cs = nand->activecs->id; in atmel_hsmc_nand_pmecc_write_pg()
930 "Failed to transfer NAND page data (err = %d)\n", in atmel_hsmc_nand_pmecc_write_pg()
946 nc->op.cs = nand->activecs->id; in atmel_hsmc_nand_pmecc_write_pg()
949 dev_err(nc->base.dev, "Failed to program NAND page (err = %d)\n", in atmel_hsmc_nand_pmecc_write_pg()
980 struct atmel_nand *nand = to_atmel_nand(chip); in atmel_hsmc_nand_pmecc_read_pg() local
987 * Optimized read page accessors only work when the NAND R/B pin is in atmel_hsmc_nand_pmecc_read_pg()
991 if (nand->activecs->rb.type != ATMEL_NAND_NATIVE_RB) { in atmel_hsmc_nand_pmecc_read_pg()
1004 nc->op.cs = nand->activecs->id; in atmel_hsmc_nand_pmecc_read_pg()
1015 "Failed to load NAND page data (err = %d)\n", in atmel_hsmc_nand_pmecc_read_pg()
1047 struct atmel_nand *nand = to_atmel_nand(chip); in atmel_nand_pmecc_init() local
1098 nand->pmecc = atmel_pmecc_create_user(nc->pmecc, &req); in atmel_nand_pmecc_init()
1099 if (IS_ERR(nand->pmecc)) in atmel_nand_pmecc_init()
1100 return PTR_ERR(nand->pmecc); in atmel_nand_pmecc_init()
1170 static int atmel_smc_nand_prepare_smcconf(struct atmel_nand *nand, in atmel_smc_nand_prepare_smcconf() argument
1178 nc = to_nand_controller(nand->base.controller); in atmel_smc_nand_prepare_smcconf()
1209 * The write setup timing depends on the operation done on the NAND. in atmel_smc_nand_prepare_smcconf()
1232 * operation done on the NAND: in atmel_smc_nand_prepare_smcconf()
1259 * transfer to the NAND. The only way to guarantee that is to have the in atmel_smc_nand_prepare_smcconf()
1271 * operation done on the NAND: in atmel_smc_nand_prepare_smcconf()
1288 * Just take the max value in this case and hope that the NAND is more in atmel_smc_nand_prepare_smcconf()
1329 * transfer from the NAND. The only way to guarantee that is to have in atmel_smc_nand_prepare_smcconf()
1390 if (nand->base.options & NAND_BUSWIDTH_16) in atmel_smc_nand_prepare_smcconf()
1400 static int atmel_smc_nand_setup_data_interface(struct atmel_nand *nand, in atmel_smc_nand_setup_data_interface() argument
1409 nc = to_nand_controller(nand->base.controller); in atmel_smc_nand_setup_data_interface()
1411 ret = atmel_smc_nand_prepare_smcconf(nand, conf, &smcconf); in atmel_smc_nand_setup_data_interface()
1418 cs = &nand->cs[csline]; in atmel_smc_nand_setup_data_interface()
1425 static int atmel_hsmc_nand_setup_data_interface(struct atmel_nand *nand, in atmel_hsmc_nand_setup_data_interface() argument
1434 nc = to_hsmc_nand_controller(nand->base.controller); in atmel_hsmc_nand_setup_data_interface()
1436 ret = atmel_smc_nand_prepare_smcconf(nand, conf, &smcconf); in atmel_hsmc_nand_setup_data_interface()
1443 cs = &nand->cs[csline]; in atmel_hsmc_nand_setup_data_interface()
1458 struct atmel_nand *nand = to_atmel_nand(chip); in atmel_nand_setup_data_interface() local
1461 nc = to_nand_controller(nand->base.controller); in atmel_nand_setup_data_interface()
1463 if (csline >= nand->numcs || in atmel_nand_setup_data_interface()
1467 return nc->caps->ops->setup_data_interface(nand, csline, conf); in atmel_nand_setup_data_interface()
1471 struct atmel_nand *nand) in atmel_nand_init() argument
1473 struct nand_chip *chip = &nand->base; in atmel_nand_init()
1477 nand->base.controller = &nc->base; in atmel_nand_init()
1505 struct atmel_nand *nand) in atmel_smc_nand_init() argument
1507 struct nand_chip *chip = &nand->base; in atmel_smc_nand_init()
1511 atmel_nand_init(nc, nand); in atmel_smc_nand_init()
1517 /* Attach the CS to the NAND Flash logic. */ in atmel_smc_nand_init()
1518 for (i = 0; i < nand->numcs; i++) in atmel_smc_nand_init()
1521 BIT(nand->cs[i].id), BIT(nand->cs[i].id)); in atmel_smc_nand_init()
1531 struct atmel_nand *nand) in atmel_hsmc_nand_init() argument
1533 struct nand_chip *chip = &nand->base; in atmel_hsmc_nand_init()
1535 atmel_nand_init(nc, nand); in atmel_hsmc_nand_init()
1542 static int atmel_nand_controller_remove_nand(struct atmel_nand *nand) in atmel_nand_controller_remove_nand() argument
1544 struct nand_chip *chip = &nand->base; in atmel_nand_controller_remove_nand()
1553 list_del(&nand->node); in atmel_nand_controller_remove_nand()
1562 struct atmel_nand *nand; in atmel_nand_create() local
1573 nand = devm_kzalloc(nc->dev, struct_size(nand, cs, numcs), GFP_KERNEL); in atmel_nand_create()
1574 if (!nand) { in atmel_nand_create()
1575 dev_err(nc->dev, "Failed to allocate NAND object\n"); in atmel_nand_create()
1579 nand->numcs = numcs; in atmel_nand_create()
1583 "nand-det"); in atmel_nand_create()
1592 nand->cdgpio = gpio; in atmel_nand_create()
1613 nand->cs[i].id = val; in atmel_nand_create()
1615 nand->cs[i].io.dma = res.start; in atmel_nand_create()
1616 nand->cs[i].io.virt = devm_ioremap_resource(nc->dev, &res); in atmel_nand_create()
1617 if (IS_ERR(nand->cs[i].io.virt)) in atmel_nand_create()
1618 return ERR_CAST(nand->cs[i].io.virt); in atmel_nand_create()
1624 nand->cs[i].rb.type = ATMEL_NAND_NATIVE_RB; in atmel_nand_create()
1625 nand->cs[i].rb.id = val; in atmel_nand_create()
1629 GPIOD_IN, "nand-rb"); in atmel_nand_create()
1638 nand->cs[i].rb.type = ATMEL_NAND_GPIO_RB; in atmel_nand_create()
1639 nand->cs[i].rb.gpio = gpio; in atmel_nand_create()
1646 "nand-cs"); in atmel_nand_create()
1655 nand->cs[i].csgpio = gpio; in atmel_nand_create()
1658 nand_set_flash_node(&nand->base, np); in atmel_nand_create()
1660 return nand; in atmel_nand_create()
1665 struct atmel_nand *nand) in atmel_nand_controller_add_nand() argument
1667 struct nand_chip *chip = &nand->base; in atmel_nand_controller_add_nand()
1671 /* No card inserted, skip this NAND. */ in atmel_nand_controller_add_nand()
1672 if (nand->cdgpio && gpiod_get_value(nand->cdgpio)) { in atmel_nand_controller_add_nand()
1677 nc->caps->ops->nand_init(nc, nand); in atmel_nand_controller_add_nand()
1679 ret = nand_scan(chip, nand->numcs); in atmel_nand_controller_add_nand()
1681 dev_err(nc->dev, "NAND scan failed: %d\n", ret); in atmel_nand_controller_add_nand()
1692 list_add_tail(&nand->node, &nc->chips); in atmel_nand_controller_add_nand()
1700 struct atmel_nand *nand, *tmp; in atmel_nand_controller_remove_nands() local
1703 list_for_each_entry_safe(nand, tmp, &nc->chips, node) { in atmel_nand_controller_remove_nands()
1704 ret = atmel_nand_controller_remove_nand(nand); in atmel_nand_controller_remove_nands()
1717 struct atmel_nand *nand; in atmel_nand_controller_legacy_add_nands() local
1722 * Legacy bindings only allow connecting a single NAND with a unique CS in atmel_nand_controller_legacy_add_nands()
1725 nand = devm_kzalloc(nc->dev, sizeof(*nand) + sizeof(*nand->cs), in atmel_nand_controller_legacy_add_nands()
1727 if (!nand) in atmel_nand_controller_legacy_add_nands()
1730 nand->numcs = 1; in atmel_nand_controller_legacy_add_nands()
1733 nand->cs[0].io.virt = devm_ioremap_resource(dev, res); in atmel_nand_controller_legacy_add_nands()
1734 if (IS_ERR(nand->cs[0].io.virt)) in atmel_nand_controller_legacy_add_nands()
1735 return PTR_ERR(nand->cs[0].io.virt); in atmel_nand_controller_legacy_add_nands()
1737 nand->cs[0].io.dma = res->start; in atmel_nand_controller_legacy_add_nands()
1744 * If one wants to connect a NAND to a different CS line, he will in atmel_nand_controller_legacy_add_nands()
1747 nand->cs[0].id = 3; in atmel_nand_controller_legacy_add_nands()
1758 nand->cs[0].rb.type = ATMEL_NAND_GPIO_RB; in atmel_nand_controller_legacy_add_nands()
1759 nand->cs[0].rb.gpio = gpio; in atmel_nand_controller_legacy_add_nands()
1770 nand->cs[0].csgpio = gpio; in atmel_nand_controller_legacy_add_nands()
1781 nand->cdgpio = gpio; in atmel_nand_controller_legacy_add_nands()
1783 nand_set_flash_node(&nand->base, nc->dev->of_node); in atmel_nand_controller_legacy_add_nands()
1785 return atmel_nand_controller_add_nand(nc, nand); in atmel_nand_controller_legacy_add_nands()
1818 struct atmel_nand *nand; in atmel_nand_controller_add_nands() local
1820 nand = atmel_nand_create(nc, nand_np, reg_cells); in atmel_nand_controller_add_nands()
1821 if (IS_ERR(nand)) { in atmel_nand_controller_add_nands()
1822 ret = PTR_ERR(nand); in atmel_nand_controller_add_nands()
1826 ret = atmel_nand_controller_add_nand(nc, nand); in atmel_nand_controller_add_nands()
1919 struct atmel_nand *nand = to_atmel_nand(chip); in atmel_nand_attach_chip() local
1938 * should define the following property in your nand node: in atmel_nand_attach_chip()
1946 "%s:nand.%d", dev_name(nc->dev), in atmel_nand_attach_chip()
1947 nand->cs[0].id); in atmel_nand_attach_chip()
2059 * The at91sam9263 has 2 EBIs, if the NAND controller is under EBI1 in atmel_smc_nand_controller_init()
2460 .compatible = "atmel,at91rm9200-nand-controller",
2464 .compatible = "atmel,at91sam9260-nand-controller",
2468 .compatible = "atmel,at91sam9261-nand-controller",
2472 .compatible = "atmel,at91sam9g45-nand-controller",
2476 .compatible = "atmel,sama5d3-nand-controller",
2480 .compatible = "microchip,sam9x60-nand-controller",
2485 .compatible = "atmel,at91rm9200-nand",
2489 .compatible = "atmel,sama5d4-nand",
2493 .compatible = "atmel,sama5d2-nand",
2531 * at91rm9200 controller, the atmel,nand-has-dma specify that in atmel_nand_controller_probe()
2537 "atmel,nand-has-dma")) in atmel_nand_controller_probe()
2542 * CLE to A22. If atmel,nand-addr-offset != 21 this means we're in atmel_nand_controller_probe()
2546 "atmel,nand-addr-offset", &ale_offs); in atmel_nand_controller_probe()
2564 struct atmel_nand *nand; in atmel_nand_controller_resume() local
2569 list_for_each_entry(nand, &nc->chips, node) { in atmel_nand_controller_resume()
2572 for (i = 0; i < nand->numcs; i++) in atmel_nand_controller_resume()
2573 nand_reset(&nand->base, i); in atmel_nand_controller_resume()
2584 .name = "atmel-nand-controller",
2595 MODULE_DESCRIPTION("NAND Flash Controller driver for Atmel SoCs");
2596 MODULE_ALIAS("platform:atmel-nand-controller");