158 	struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host);  in tegra_sdhci_readw()  local
159 	const struct sdhci_tegra_soc_data *soc_data = tegra_host->soc_data;  in tegra_sdhci_readw()
194 	struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host);  in tegra_sdhci_writel()  local
195 	const struct sdhci_tegra_soc_data *soc_data = tegra_host->soc_data;  in tegra_sdhci_writel()
276 	struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host);  in tegra_sdhci_is_pad_and_regulator_valid()  local
287 	if (!(tegra_host->soc_data->nvquirks & NVQUIRK_NEEDS_PAD_CONTROL))  in tegra_sdhci_is_pad_and_regulator_valid()
300 		return tegra_host->pad_control_available;  in tegra_sdhci_is_pad_and_regulator_valid()
309 	struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host);  in tegra_sdhci_set_tap()  local
310 	const struct sdhci_tegra_soc_data *soc_data = tegra_host->soc_data;  in tegra_sdhci_set_tap()
356 	struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host);  in tegra_sdhci_reset()  local
357 	const struct sdhci_tegra_soc_data *soc_data = tegra_host->soc_data;  in tegra_sdhci_reset()
365 	tegra_sdhci_set_tap(host, tegra_host->default_tap);  in tegra_sdhci_reset()
393 	clk_ctrl |= tegra_host->default_trim << SDHCI_CLOCK_CTRL_TRIM_SHIFT;  in tegra_sdhci_reset()
404 		tegra_host->pad_calib_required = true;  in tegra_sdhci_reset()
407 	tegra_host->ddr_signaling = false;  in tegra_sdhci_reset()
446 	struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host);  in tegra_sdhci_set_padctrl()  local
448 						&tegra_host->autocal_offsets;  in tegra_sdhci_set_padctrl()
457 			if (tegra_host->pinctrl_state_1v8_drv) {  in tegra_sdhci_set_padctrl()
459 					tegra_host->pinctrl_state_1v8_drv;  in tegra_sdhci_set_padctrl()
465 			if (tegra_host->pinctrl_state_3v3_drv) {  in tegra_sdhci_set_padctrl()
467 					tegra_host->pinctrl_state_3v3_drv;  in tegra_sdhci_set_padctrl()
475 			ret = pinctrl_select_state(tegra_host->pinctrl_sdmmc,  in tegra_sdhci_set_padctrl()
491 		if (!tegra_host->pad_control_available)  in tegra_sdhci_set_padctrl()
495 			ret = pinctrl_select_state(tegra_host->pinctrl_sdmmc,  in tegra_sdhci_set_padctrl()
496 						tegra_host->pinctrl_state_1v8);  in tegra_sdhci_set_padctrl()
501 			ret = pinctrl_select_state(tegra_host->pinctrl_sdmmc,  in tegra_sdhci_set_padctrl()
502 						tegra_host->pinctrl_state_3v3);  in tegra_sdhci_set_padctrl()
515 	struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host);  in tegra_sdhci_pad_autocalib()  local
517 			tegra_host->autocal_offsets;  in tegra_sdhci_pad_autocalib()
577 	struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host);  in tegra_sdhci_parse_pad_autocal_dt()  local
579 			&tegra_host->autocal_offsets;  in tegra_sdhci_parse_pad_autocal_dt()
610 		if (!IS_ERR(tegra_host->pinctrl_state_3v3) &&  in tegra_sdhci_parse_pad_autocal_dt()
611 			(tegra_host->pinctrl_state_3v3_drv == NULL))  in tegra_sdhci_parse_pad_autocal_dt()
621 		if (!IS_ERR(tegra_host->pinctrl_state_3v3) &&  in tegra_sdhci_parse_pad_autocal_dt()
622 			(tegra_host->pinctrl_state_3v3_drv == NULL))  in tegra_sdhci_parse_pad_autocal_dt()
632 		if (!IS_ERR(tegra_host->pinctrl_state_1v8) &&  in tegra_sdhci_parse_pad_autocal_dt()
633 			(tegra_host->pinctrl_state_1v8_drv == NULL))  in tegra_sdhci_parse_pad_autocal_dt()
643 		if (!IS_ERR(tegra_host->pinctrl_state_1v8) &&  in tegra_sdhci_parse_pad_autocal_dt()
644 			(tegra_host->pinctrl_state_1v8_drv == NULL))  in tegra_sdhci_parse_pad_autocal_dt()
679 	struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host);  in tegra_sdhci_request()  local
680 	ktime_t since_calib = ktime_sub(ktime_get(), tegra_host->last_calib);  in tegra_sdhci_request()
685 		tegra_host->last_calib = ktime_get();  in tegra_sdhci_request()
694 	struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host);  in tegra_sdhci_parse_tap_and_trim()  local
698 				       &tegra_host->default_tap);  in tegra_sdhci_parse_tap_and_trim()
700 		tegra_host->default_tap = 0;  in tegra_sdhci_parse_tap_and_trim()
703 				       &tegra_host->default_trim);  in tegra_sdhci_parse_tap_and_trim()
705 		tegra_host->default_trim = 0;  in tegra_sdhci_parse_tap_and_trim()
708 				       &tegra_host->dqs_trim);  in tegra_sdhci_parse_tap_and_trim()
710 		tegra_host->dqs_trim = 0x11;  in tegra_sdhci_parse_tap_and_trim()
716 	struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host);  in tegra_sdhci_parse_dt()  local
719 		tegra_host->enable_hwcq = true;  in tegra_sdhci_parse_dt()
721 		tegra_host->enable_hwcq = false;  in tegra_sdhci_parse_dt()
730 	struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host);  in tegra_sdhci_set_clock()  local
748 	host_clk = tegra_host->ddr_signaling ? clock * 2 : clock;  in tegra_sdhci_set_clock()
750 	tegra_host->curr_clk_rate = host_clk;  in tegra_sdhci_set_clock()
751 	if (tegra_host->ddr_signaling)  in tegra_sdhci_set_clock()
758 	if (tegra_host->pad_calib_required) {  in tegra_sdhci_set_clock()
760 		tegra_host->pad_calib_required = false;  in tegra_sdhci_set_clock()
803 	struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host);  in tegra_sdhci_tap_correction()  local
861 					tegra_host->tuned_tap_delay = tap;  in tegra_sdhci_tap_correction()
876 			tegra_host->tuned_tap_delay = edge1 - fixed_tap;  in tegra_sdhci_tap_correction()
878 			tegra_host->tuned_tap_delay = edge1 + fixed_tap;  in tegra_sdhci_tap_correction()
885 	struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host);  in tegra_sdhci_post_tuning()  local
886 	const struct sdhci_tegra_soc_data *soc_data = tegra_host->soc_data;  in tegra_sdhci_post_tuning()
895 	tegra_host->tuned_tap_delay = (val & SDHCI_CLOCK_CTRL_TAP_MASK) >>  in tegra_sdhci_post_tuning()
900 		clk_rate_mhz = tegra_host->curr_clk_rate / USEC_PER_SEC;  in tegra_sdhci_post_tuning()
937 	tegra_sdhci_set_tap(host, tegra_host->tuned_tap_delay);  in tegra_sdhci_post_tuning()
956 	struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host);  in tegra_sdhci_set_uhs_signaling()  local
963 	tegra_host->ddr_signaling = false;  in tegra_sdhci_set_uhs_signaling()
979 		tegra_host->ddr_signaling = true;  in tegra_sdhci_set_uhs_signaling()
1003 	if (tegra_host->tuned_tap_delay && !set_default_tap)  in tegra_sdhci_set_uhs_signaling()
1004 		tegra_sdhci_set_tap(host, tegra_host->tuned_tap_delay);  in tegra_sdhci_set_uhs_signaling()
1006 		tegra_sdhci_set_tap(host, tegra_host->default_tap);  in tegra_sdhci_set_uhs_signaling()
1009 		tegra_sdhci_set_dqs_trim(host, tegra_host->dqs_trim);  in tegra_sdhci_set_uhs_signaling()
1054 	struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host);  in sdhci_tegra_start_signal_voltage_switch()  local
1069 	if (tegra_host->pad_calib_required)  in sdhci_tegra_start_signal_voltage_switch()
1076 					 struct sdhci_tegra *tegra_host)  in tegra_sdhci_init_pinctrl_info()  argument
1078 	tegra_host->pinctrl_sdmmc = devm_pinctrl_get(dev);  in tegra_sdhci_init_pinctrl_info()
1079 	if (IS_ERR(tegra_host->pinctrl_sdmmc)) {  in tegra_sdhci_init_pinctrl_info()
1081 			PTR_ERR(tegra_host->pinctrl_sdmmc));  in tegra_sdhci_init_pinctrl_info()
1085 	tegra_host->pinctrl_state_1v8_drv = pinctrl_lookup_state(  in tegra_sdhci_init_pinctrl_info()
1086 				tegra_host->pinctrl_sdmmc, "sdmmc-1v8-drv");  in tegra_sdhci_init_pinctrl_info()
1087 	if (IS_ERR(tegra_host->pinctrl_state_1v8_drv)) {  in tegra_sdhci_init_pinctrl_info()
1088 		if (PTR_ERR(tegra_host->pinctrl_state_1v8_drv) == -ENODEV)  in tegra_sdhci_init_pinctrl_info()
1089 			tegra_host->pinctrl_state_1v8_drv = NULL;  in tegra_sdhci_init_pinctrl_info()
1092 	tegra_host->pinctrl_state_3v3_drv = pinctrl_lookup_state(  in tegra_sdhci_init_pinctrl_info()
1093 				tegra_host->pinctrl_sdmmc, "sdmmc-3v3-drv");  in tegra_sdhci_init_pinctrl_info()
1094 	if (IS_ERR(tegra_host->pinctrl_state_3v3_drv)) {  in tegra_sdhci_init_pinctrl_info()
1095 		if (PTR_ERR(tegra_host->pinctrl_state_3v3_drv) == -ENODEV)  in tegra_sdhci_init_pinctrl_info()
1096 			tegra_host->pinctrl_state_3v3_drv = NULL;  in tegra_sdhci_init_pinctrl_info()
1099 	tegra_host->pinctrl_state_3v3 =  in tegra_sdhci_init_pinctrl_info()
1100 		pinctrl_lookup_state(tegra_host->pinctrl_sdmmc, "sdmmc-3v3");  in tegra_sdhci_init_pinctrl_info()
1101 	if (IS_ERR(tegra_host->pinctrl_state_3v3)) {  in tegra_sdhci_init_pinctrl_info()
1103 			 PTR_ERR(tegra_host->pinctrl_state_3v3));  in tegra_sdhci_init_pinctrl_info()
1107 	tegra_host->pinctrl_state_1v8 =  in tegra_sdhci_init_pinctrl_info()
1108 		pinctrl_lookup_state(tegra_host->pinctrl_sdmmc, "sdmmc-1v8");  in tegra_sdhci_init_pinctrl_info()
1109 	if (IS_ERR(tegra_host->pinctrl_state_1v8)) {  in tegra_sdhci_init_pinctrl_info()
1111 			 PTR_ERR(tegra_host->pinctrl_state_1v8));  in tegra_sdhci_init_pinctrl_info()
1115 	tegra_host->pad_control_available = true;  in tegra_sdhci_init_pinctrl_info()
1123 	struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host);  in tegra_sdhci_voltage_switch()  local
1124 	const struct sdhci_tegra_soc_data *soc_data = tegra_host->soc_data;  in tegra_sdhci_voltage_switch()
1127 		tegra_host->pad_calib_required = true;  in tegra_sdhci_voltage_switch()
1171 	struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host);  in sdhci_tegra_update_dcmd_desc()  local
1172 	const struct sdhci_tegra_soc_data *soc_data = tegra_host->soc_data;  in sdhci_tegra_update_dcmd_desc()
1459 	struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host);  in sdhci_tegra_add_host()  local
1464 	if (!tegra_host->enable_hwcq)  in sdhci_tegra_add_host()
1510 	struct sdhci_tegra *tegra_host;  in sdhci_tegra_probe()  local
1519 	host = sdhci_pltfm_init(pdev, soc_data->pdata, sizeof(*tegra_host));  in sdhci_tegra_probe()
1524 	tegra_host = sdhci_pltfm_priv(pltfm_host);  in sdhci_tegra_probe()
1525 	tegra_host->ddr_signaling = false;  in sdhci_tegra_probe()
1526 	tegra_host->pad_calib_required = false;  in sdhci_tegra_probe()
1527 	tegra_host->pad_control_available = false;  in sdhci_tegra_probe()
1528 	tegra_host->soc_data = soc_data;  in sdhci_tegra_probe()
1531 		rc = tegra_sdhci_init_pinctrl_info(&pdev->dev, tegra_host);  in sdhci_tegra_probe()
1552 	if (tegra_host->soc_data->nvquirks & NVQUIRK_ENABLE_DDR50)  in sdhci_tegra_probe()
1557 	tegra_host->power_gpio = devm_gpiod_get_optional(&pdev->dev, "power",  in sdhci_tegra_probe()
1559 	if (IS_ERR(tegra_host->power_gpio)) {  in sdhci_tegra_probe()
1560 		rc = PTR_ERR(tegra_host->power_gpio);  in sdhci_tegra_probe()
1576 	tegra_host->rst = devm_reset_control_get_exclusive(&pdev->dev,  in sdhci_tegra_probe()
1578 	if (IS_ERR(tegra_host->rst)) {  in sdhci_tegra_probe()
1579 		rc = PTR_ERR(tegra_host->rst);  in sdhci_tegra_probe()
1584 	rc = reset_control_assert(tegra_host->rst);  in sdhci_tegra_probe()
1590 	rc = reset_control_deassert(tegra_host->rst);  in sdhci_tegra_probe()
1603 	reset_control_assert(tegra_host->rst);  in sdhci_tegra_probe()
1617 	struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host);  in sdhci_tegra_remove()  local
1621 	reset_control_assert(tegra_host->rst);  in sdhci_tegra_remove()