154 	u32 scratch_32;  in o2_pci_set_baseclk()  local
157 			      O2_SD_PLL_SETTING, &scratch_32);  in o2_pci_set_baseclk()
159 	scratch_32 &= 0x0000FFFF;  in o2_pci_set_baseclk()
160 	scratch_32 |= value;  in o2_pci_set_baseclk()
163 			       O2_SD_PLL_SETTING, scratch_32);  in o2_pci_set_baseclk()
233 	u32 scratch_32 = 0;  in sdhci_o2_dll_recovery()  local
248 		scratch_32 = sdhci_readl(host, O2_PLL_DLL_WDT_CONTROL1);  in sdhci_o2_dll_recovery()
249 		scratch_32 |= O2_PLL_SOFT_RESET;  in sdhci_o2_dll_recovery()
250 		sdhci_writel(host, scratch_32, O2_PLL_DLL_WDT_CONTROL1);  in sdhci_o2_dll_recovery()
254 					    &scratch_32);  in sdhci_o2_dll_recovery()
256 		scratch_32 |= O2_SD_FREG4_ENABLE_CLK_SET;  in sdhci_o2_dll_recovery()
257 		pci_write_config_dword(chip->pdev, O2_SD_FUNC_REG4, scratch_32);  in sdhci_o2_dll_recovery()
352 	u32 scratch_32;  in o2_pci_led_enable()  local
356 				    O2_SD_FUNC_REG0, &scratch_32);  in o2_pci_led_enable()
360 	scratch_32 &= ~O2_SD_FREG0_LEDOFF;  in o2_pci_led_enable()
362 			       O2_SD_FUNC_REG0, scratch_32);  in o2_pci_led_enable()
365 				    O2_SD_TEST_REG, &scratch_32);  in o2_pci_led_enable()
369 	scratch_32 |= O2_SD_LED_ENABLE;  in o2_pci_led_enable()
371 			       O2_SD_TEST_REG, scratch_32);  in o2_pci_led_enable()
377 	u32 scratch_32;  in sdhci_pci_o2_fujin2_pci_init()  local
380 	ret = pci_read_config_dword(chip->pdev, O2_SD_DEV_CTRL, &scratch_32);  in sdhci_pci_o2_fujin2_pci_init()
383 	scratch_32 &= ~((1 << 12) | (1 << 13) | (1 << 14));  in sdhci_pci_o2_fujin2_pci_init()
384 	pci_write_config_dword(chip->pdev, O2_SD_DEV_CTRL, scratch_32);  in sdhci_pci_o2_fujin2_pci_init()
387 	ret = pci_read_config_dword(chip->pdev, O2_SD_MISC_REG5, &scratch_32);  in sdhci_pci_o2_fujin2_pci_init()
390 	scratch_32 &= ~((1 << 19) | (1 << 11));  in sdhci_pci_o2_fujin2_pci_init()
391 	scratch_32 |= (1 << 10);  in sdhci_pci_o2_fujin2_pci_init()
392 	pci_write_config_dword(chip->pdev, O2_SD_MISC_REG5, scratch_32);  in sdhci_pci_o2_fujin2_pci_init()
395 	ret = pci_read_config_dword(chip->pdev, O2_SD_TEST_REG, &scratch_32);  in sdhci_pci_o2_fujin2_pci_init()
398 	scratch_32 |= (1 << 4);  in sdhci_pci_o2_fujin2_pci_init()
399 	pci_write_config_dword(chip->pdev, O2_SD_TEST_REG, scratch_32);  in sdhci_pci_o2_fujin2_pci_init()
405 	ret = pci_read_config_dword(chip->pdev, O2_SD_LD0_CTRL, &scratch_32);  in sdhci_pci_o2_fujin2_pci_init()
408 	scratch_32 &= ~(3 << 12);  in sdhci_pci_o2_fujin2_pci_init()
409 	pci_write_config_dword(chip->pdev, O2_SD_LD0_CTRL, scratch_32);  in sdhci_pci_o2_fujin2_pci_init()
412 	ret = pci_read_config_dword(chip->pdev, O2_SD_CAP_REG0, &scratch_32);  in sdhci_pci_o2_fujin2_pci_init()
415 	scratch_32 &= ~(0x01FE);  in sdhci_pci_o2_fujin2_pci_init()
416 	scratch_32 |= 0x00CC;  in sdhci_pci_o2_fujin2_pci_init()
417 	pci_write_config_dword(chip->pdev, O2_SD_CAP_REG0, scratch_32);  in sdhci_pci_o2_fujin2_pci_init()
420 				    O2_SD_TUNING_CTRL, &scratch_32);  in sdhci_pci_o2_fujin2_pci_init()
423 	scratch_32 &= ~(0x000000FF);  in sdhci_pci_o2_fujin2_pci_init()
424 	scratch_32 |= 0x00000066;  in sdhci_pci_o2_fujin2_pci_init()
425 	pci_write_config_dword(chip->pdev, O2_SD_TUNING_CTRL, scratch_32);  in sdhci_pci_o2_fujin2_pci_init()
429 				    O2_SD_UHS2_L1_CTRL, &scratch_32);  in sdhci_pci_o2_fujin2_pci_init()
432 	scratch_32 &= ~(0x000000FC);  in sdhci_pci_o2_fujin2_pci_init()
433 	scratch_32 |= 0x00000084;  in sdhci_pci_o2_fujin2_pci_init()
434 	pci_write_config_dword(chip->pdev, O2_SD_UHS2_L1_CTRL, scratch_32);  in sdhci_pci_o2_fujin2_pci_init()
437 	ret = pci_read_config_dword(chip->pdev, O2_SD_FUNC_REG3, &scratch_32);  in sdhci_pci_o2_fujin2_pci_init()
440 	scratch_32 &= ~((1 << 21) | (1 << 30));  in sdhci_pci_o2_fujin2_pci_init()
442 	pci_write_config_dword(chip->pdev, O2_SD_FUNC_REG3, scratch_32);  in sdhci_pci_o2_fujin2_pci_init()
445 	ret = pci_read_config_dword(chip->pdev, O2_SD_CAPS, &scratch_32);  in sdhci_pci_o2_fujin2_pci_init()
448 	scratch_32 &= ~(0xf0000000);  in sdhci_pci_o2_fujin2_pci_init()
449 	scratch_32 |= 0x30000000;  in sdhci_pci_o2_fujin2_pci_init()
450 	pci_write_config_dword(chip->pdev, O2_SD_CAPS, scratch_32);  in sdhci_pci_o2_fujin2_pci_init()
453 				    O2_SD_MISC_CTRL4, &scratch_32);  in sdhci_pci_o2_fujin2_pci_init()
456 	scratch_32 &= ~(0x000f0000);  in sdhci_pci_o2_fujin2_pci_init()
457 	scratch_32 |= 0x00080000;  in sdhci_pci_o2_fujin2_pci_init()
458 	pci_write_config_dword(chip->pdev, O2_SD_MISC_CTRL4, scratch_32);  in sdhci_pci_o2_fujin2_pci_init()
585 	u32 scratch_32;  in sdhci_pci_o2_probe()  local
657 						    &scratch_32);  in sdhci_pci_o2_probe()
658 			scratch_32 = ((scratch_32 & 0xFF000000) >> 24);  in sdhci_pci_o2_probe()
661 			if ((scratch_32 == 0x11) || (scratch_32 == 0x12)) {  in sdhci_pci_o2_probe()
662 				scratch_32 = 0x25100000;  in sdhci_pci_o2_probe()
664 				o2_pci_set_baseclk(chip, scratch_32);  in sdhci_pci_o2_probe()
667 							    &scratch_32);  in sdhci_pci_o2_probe()
670 				scratch_32 |= O2_SD_FREG4_ENABLE_CLK_SET;  in sdhci_pci_o2_probe()
673 						       scratch_32);  in sdhci_pci_o2_probe()
688 					    O2_SD_CLK_SETTING, &scratch_32);  in sdhci_pci_o2_probe()
692 		scratch_32 &= ~(0xFF00);  in sdhci_pci_o2_probe()
693 		scratch_32 |= 0x07E0C800;  in sdhci_pci_o2_probe()
695 				       O2_SD_CLK_SETTING, scratch_32);  in sdhci_pci_o2_probe()
698 					    O2_SD_CLKREQ, &scratch_32);  in sdhci_pci_o2_probe()
701 		scratch_32 |= 0x3;  in sdhci_pci_o2_probe()
702 		pci_write_config_dword(chip->pdev, O2_SD_CLKREQ, scratch_32);  in sdhci_pci_o2_probe()
705 					    O2_SD_PLL_SETTING, &scratch_32);  in sdhci_pci_o2_probe()
709 		scratch_32 &= ~(0x1F3F070E);  in sdhci_pci_o2_probe()
710 		scratch_32 |= 0x18270106;  in sdhci_pci_o2_probe()
712 				       O2_SD_PLL_SETTING, scratch_32);  in sdhci_pci_o2_probe()
716 					    O2_SD_CAP_REG2, &scratch_32);  in sdhci_pci_o2_probe()
719 		scratch_32 &= ~(0xE0);  in sdhci_pci_o2_probe()
721 				       O2_SD_CAP_REG2, scratch_32);  in sdhci_pci_o2_probe()
746 					    O2_SD_PLL_SETTING, &scratch_32);  in sdhci_pci_o2_probe()
748 		if ((scratch_32 & 0xff000000) == 0x01000000) {  in sdhci_pci_o2_probe()
749 			scratch_32 &= 0x0000FFFF;  in sdhci_pci_o2_probe()
750 			scratch_32 |= 0x1F340000;  in sdhci_pci_o2_probe()
753 					       O2_SD_PLL_SETTING, scratch_32);  in sdhci_pci_o2_probe()
755 			scratch_32 &= 0x0000FFFF;  in sdhci_pci_o2_probe()
756 			scratch_32 |= 0x25100000;  in sdhci_pci_o2_probe()
759 					       O2_SD_PLL_SETTING, scratch_32);  in sdhci_pci_o2_probe()
763 						    &scratch_32);  in sdhci_pci_o2_probe()
764 			scratch_32 |= (1 << 22);  in sdhci_pci_o2_probe()
766 					       O2_SD_FUNC_REG4, scratch_32);  in sdhci_pci_o2_probe()