395 	prop->pcie_aux_dbi_reg_addr = CFG_BASE + mmPCIE_AUX_DBI;  in goya_get_fixed_properties()
418 			(CFG_BASE - SRAM_BASE_ADDR);  in goya_pci_bars_map()
772 	mtr_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_MON_PAY_ADDRL_0);  in goya_init_dma_qman()
773 	mtr_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_MON_PAY_ADDRL_0);  in goya_init_dma_qman()
774 	so_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_dma_qman()
775 	so_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_dma_qman()
778 		lower_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR);  in goya_init_dma_qman()
780 		upper_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR);  in goya_init_dma_qman()
818 		lower_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR);  in goya_init_dma_ch()
820 		upper_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR);  in goya_init_dma_ch()
828 		sob_addr = CFG_BASE + mmSYNC_MNGR_SOB_OBJ_1000 +  in goya_init_dma_ch()
831 		sob_addr = CFG_BASE + mmSYNC_MNGR_SOB_OBJ_1007;  in goya_init_dma_ch()
1105 	tpc_eml_address = (mmTPC0_EML_CFG_BASE + tpc_eml_offset - CFG_BASE);  in _goya_tpc_mbist_workaround()
1488 	mtr_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_MON_PAY_ADDRL_0);  in goya_init_mme_qman()
1489 	mtr_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_MON_PAY_ADDRL_0);  in goya_init_mme_qman()
1490 	so_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_mme_qman()
1491 	so_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_mme_qman()
1494 		lower_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR);  in goya_init_mme_qman()
1496 		upper_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR);  in goya_init_mme_qman()
1538 	mtr_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_MON_PAY_ADDRL_0);  in goya_init_mme_cmdq()
1539 	mtr_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_MON_PAY_ADDRL_0);  in goya_init_mme_cmdq()
1540 	so_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_mme_cmdq()
1541 	so_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_mme_cmdq()
1544 		lower_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR);  in goya_init_mme_cmdq()
1546 		upper_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR);  in goya_init_mme_cmdq()
1579 	so_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_mme_qmans()
1580 	so_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_mme_qmans()
1599 	mtr_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_MON_PAY_ADDRL_0);  in goya_init_tpc_qman()
1600 	mtr_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_MON_PAY_ADDRL_0);  in goya_init_tpc_qman()
1601 	so_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_tpc_qman()
1602 	so_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_tpc_qman()
1605 		lower_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR);  in goya_init_tpc_qman()
1607 		upper_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR);  in goya_init_tpc_qman()
1648 	mtr_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_MON_PAY_ADDRL_0);  in goya_init_tpc_cmdq()
1649 	mtr_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_MON_PAY_ADDRL_0);  in goya_init_tpc_cmdq()
1650 	so_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_tpc_cmdq()
1651 	so_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_tpc_cmdq()
1654 		lower_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR);  in goya_init_tpc_cmdq()
1656 		upper_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR);  in goya_init_tpc_cmdq()
1689 	so_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_tpc_qmans()
1690 	so_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_tpc_qmans()
2068 	WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE, 0);  in goya_enable_timestamp()
2071 	WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE + 0xC, 0);  in goya_enable_timestamp()
2072 	WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE + 0x8, 0);  in goya_enable_timestamp()
2075 	WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE, 1);  in goya_enable_timestamp()
2081 	WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE, 0);  in goya_disable_timestamp()
3433 	sob_start_addr = lower_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_validate_wreg32()
3434 	sob_end_addr = lower_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_1023);  in goya_validate_wreg32()
3969 	cq_pkt->addr = cpu_to_le64(CFG_BASE + mmPCIE_DBI_MSIX_DOORBELL_OFF);  in goya_add_end_of_cb_packets()
4023 	if ((addr >= CFG_BASE) && (addr < CFG_BASE + CFG_SIZE)) {  in goya_debugfs_read32()
4024 		*val = RREG32(addr - CFG_BASE);  in goya_debugfs_read32()
4080 	if ((addr >= CFG_BASE) && (addr < CFG_BASE + CFG_SIZE)) {  in goya_debugfs_write32()
4081 		WREG32(addr - CFG_BASE, val);  in goya_debugfs_write32()
4658 	sob_addr = CFG_BASE + mmSYNC_MNGR_SOB_OBJ_1007;  in goya_context_switch()
4662 		sob_addr = CFG_BASE + mmSYNC_MNGR_SOB_OBJ_1000 +  in goya_context_switch()