73 	rtsx_pci_write_register(pcr, MSGTXDATA0,  in rtsx_comm_set_ltr_latency()
75 	rtsx_pci_write_register(pcr, MSGTXDATA1,  in rtsx_comm_set_ltr_latency()
77 	rtsx_pci_write_register(pcr, MSGTXDATA2,  in rtsx_comm_set_ltr_latency()
79 	rtsx_pci_write_register(pcr, MSGTXDATA3,  in rtsx_comm_set_ltr_latency()
81 	rtsx_pci_write_register(pcr, LTR_CTL, LTR_TX_EN_MASK |  in rtsx_comm_set_ltr_latency()
113 		rtsx_pci_write_register(pcr, ASPM_FORCE_CTL,  mask, val);  in rtsx_comm_set_aspm()
129 	rtsx_pci_write_register(pcr, L1SUB_CONFIG3, 0xFF, val);  in rtsx_set_l1off_sub()
178 int rtsx_pci_write_register(struct rtsx_pcr *pcr, u16 addr, u8 mask, u8 data)  in rtsx_pci_write_register()  function
200 EXPORT_SYMBOL_GPL(rtsx_pci_write_register);
332 	rtsx_pci_write_register(pcr, DMACTL, 0x80, 0x80);  in rtsx_pci_stop_cmd()
333 	rtsx_pci_write_register(pcr, RBCTL, 0x80, 0x80);  in rtsx_pci_stop_cmd()
745 	err = rtsx_pci_write_register(pcr, SD_CFG1,  in rtsx_pci_switch_clock()
825 	err = rtsx_pci_write_register(pcr, CLK_CTL, CLK_LOW_FREQ, 0);  in rtsx_pci_switch_clock()
971 			rtsx_pci_write_register(pcr, CARD_OE, SD_OUTPUT_EN, 0);  in rtsx_pci_process_ocp()
1137 	rtsx_pci_write_register(pcr, PETXCFG, 0x08, 0x08);  in rtsx_pci_power_off()
1138 	rtsx_pci_write_register(pcr, HOST_SLEEP_STATE, 0x03, pm_state);  in rtsx_pci_power_off()
1152 		rtsx_pci_write_register(pcr, FPDCTL, OC_POWER_DOWN, 0);  in rtsx_pci_enable_ocp()
1153 		rtsx_pci_write_register(pcr, REG_OCPCTL, 0xFF, val);  in rtsx_pci_enable_ocp()
1165 		rtsx_pci_write_register(pcr, REG_OCPCTL, mask, 0);  in rtsx_pci_disable_ocp()
1166 		rtsx_pci_write_register(pcr, FPDCTL, OC_POWER_DOWN,  in rtsx_pci_disable_ocp()
1181 			rtsx_pci_write_register(pcr, FPDCTL, OC_POWER_DOWN, 0);  in rtsx_pci_init_ocp()
1182 			rtsx_pci_write_register(pcr, REG_OCPPARA1,  in rtsx_pci_init_ocp()
1184 			rtsx_pci_write_register(pcr, REG_OCPPARA2,  in rtsx_pci_init_ocp()
1186 			rtsx_pci_write_register(pcr, REG_OCPGLITCH,  in rtsx_pci_init_ocp()
1191 			rtsx_pci_write_register(pcr, FPDCTL, OC_POWER_DOWN,  in rtsx_pci_init_ocp()
1213 		rtsx_pci_write_register(pcr, REG_OCPCTL, mask, val);  in rtsx_pci_clear_ocpstat()
1215 		rtsx_pci_write_register(pcr, REG_OCPCTL, mask, 0);  in rtsx_pci_clear_ocpstat()
1221 	rtsx_pci_write_register(pcr, CARD_CLK_EN, SD_CLK_EN |  in rtsx_sd_power_off_card3v3()
1223 	rtsx_pci_write_register(pcr, CARD_OE, SD_OUTPUT_EN, 0);  in rtsx_sd_power_off_card3v3()
1235 	rtsx_pci_write_register(pcr, CARD_CLK_EN, SD_CLK_EN |  in rtsx_ms_power_off_card3v3()
1240 	rtsx_pci_write_register(pcr, CARD_OE, MS_OUTPUT_EN, 0);  in rtsx_ms_power_off_card3v3()
1256 	err = rtsx_pci_write_register(pcr, FPDCTL, SSC_POWER_DOWN, 0);  in rtsx_pci_init_hw()
1317 		rtsx_pci_write_register(pcr, PM_CLK_FORCE_CTL, 1, 1);  in rtsx_pci_init_hw()
1650 	ret = rtsx_pci_write_register(pcr, HOST_SLEEP_STATE, 0x03, 0x00);  in rtsx_pci_resume()