19 static u8 rts5260_get_ic_version(struct rtsx_pcr *pcr)  in rts5260_get_ic_version()  argument
23 	rtsx_pci_read_register(pcr, DUMMY_REG_RESET_0, &val);  in rts5260_get_ic_version()
27 static void rts5260_fill_driving(struct rtsx_pcr *pcr, u8 voltage)  in rts5260_fill_driving()  argument
49 		drive_sel = pcr->sd30_drive_sel_3v3;  in rts5260_fill_driving()
52 		drive_sel = pcr->sd30_drive_sel_1v8;  in rts5260_fill_driving()
55 	rtsx_pci_write_register(pcr, SD30_CLK_DRIVE_SEL,  in rts5260_fill_driving()
58 	rtsx_pci_write_register(pcr, SD30_CMD_DRIVE_SEL,  in rts5260_fill_driving()
61 	rtsx_pci_write_register(pcr, SD30_CMD_DRIVE_SEL,  in rts5260_fill_driving()
65 static void rtsx_base_fetch_vendor_settings(struct rtsx_pcr *pcr)  in rtsx_base_fetch_vendor_settings()  argument
69 	rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG1, &reg);  in rtsx_base_fetch_vendor_settings()
70 	pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg);  in rtsx_base_fetch_vendor_settings()
73 		pcr_dbg(pcr, "skip fetch vendor setting\n");  in rtsx_base_fetch_vendor_settings()
77 	pcr->aspm_en = rtsx_reg_to_aspm(reg);  in rtsx_base_fetch_vendor_settings()
78 	pcr->sd30_drive_sel_1v8 = rtsx_reg_to_sd30_drive_sel_1v8(reg);  in rtsx_base_fetch_vendor_settings()
79 	pcr->card_drive_sel &= 0x3F;  in rtsx_base_fetch_vendor_settings()
80 	pcr->card_drive_sel |= rtsx_reg_to_card_drive_sel(reg);  in rtsx_base_fetch_vendor_settings()
82 	rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG2, &reg);  in rtsx_base_fetch_vendor_settings()
83 	pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG2, reg);  in rtsx_base_fetch_vendor_settings()
84 	pcr->sd30_drive_sel_3v3 = rtsx_reg_to_sd30_drive_sel_3v3(reg);  in rtsx_base_fetch_vendor_settings()
86 		pcr->flags |= PCR_REVERSE_SOCKET;  in rtsx_base_fetch_vendor_settings()
89 static void rtsx_base_force_power_down(struct rtsx_pcr *pcr, u8 pm_state)  in rtsx_base_force_power_down()  argument
92 	rtsx_pci_write_register(pcr, AUTOLOAD_CFG_BASE + 1, MASK_8_BIT_DEF, 0);  in rtsx_base_force_power_down()
93 	rtsx_pci_write_register(pcr, AUTOLOAD_CFG_BASE + 2, MASK_8_BIT_DEF, 0);  in rtsx_base_force_power_down()
94 	rtsx_pci_write_register(pcr, AUTOLOAD_CFG_BASE + 3,  in rtsx_base_force_power_down()
98 		rtsx_pci_write_register(pcr, pcr->reg_pm_ctrl3,  in rtsx_base_force_power_down()
101 	rtsx_pci_write_register(pcr, FPDCTL, ALL_POWER_DOWN, ALL_POWER_DOWN);  in rtsx_base_force_power_down()
104 static int rtsx_base_enable_auto_blink(struct rtsx_pcr *pcr)  in rtsx_base_enable_auto_blink()  argument
106 	return rtsx_pci_write_register(pcr, OLT_LED_CTL,  in rtsx_base_enable_auto_blink()
110 static int rtsx_base_disable_auto_blink(struct rtsx_pcr *pcr)  in rtsx_base_disable_auto_blink()  argument
112 	return rtsx_pci_write_register(pcr, OLT_LED_CTL,  in rtsx_base_disable_auto_blink()
116 static int rts5260_turn_on_led(struct rtsx_pcr *pcr)  in rts5260_turn_on_led()  argument
118 	return rtsx_pci_write_register(pcr, RTS5260_REG_GPIO_CTL0,  in rts5260_turn_on_led()
122 static int rts5260_turn_off_led(struct rtsx_pcr *pcr)  in rts5260_turn_off_led()  argument
124 	return rtsx_pci_write_register(pcr, RTS5260_REG_GPIO_CTL0,  in rts5260_turn_off_led()
180 static int sd_set_sample_push_timing_sd30(struct rtsx_pcr *pcr)  in sd_set_sample_push_timing_sd30()  argument
182 	rtsx_pci_write_register(pcr, SD_CFG1, SD_MODE_SELECT_MASK  in sd_set_sample_push_timing_sd30()
184 	rtsx_pci_write_register(pcr, CLK_CTL, CLK_LOW_FREQ, CLK_LOW_FREQ);  in sd_set_sample_push_timing_sd30()
185 	rtsx_pci_write_register(pcr, CARD_CLK_SOURCE, 0xFF,  in sd_set_sample_push_timing_sd30()
187 	rtsx_pci_write_register(pcr, CLK_CTL, CLK_LOW_FREQ, 0);  in sd_set_sample_push_timing_sd30()
192 static int rts5260_card_power_on(struct rtsx_pcr *pcr, int card)  in rts5260_card_power_on()  argument
195 	struct rtsx_cr_option *option = &pcr->option;  in rts5260_card_power_on()
198 		rtsx_pci_enable_ocp(pcr);  in rts5260_card_power_on()
201 	rtsx_pci_write_register(pcr, LDO_CONFIG2, DV331812_VDD1, DV331812_VDD1);  in rts5260_card_power_on()
202 	rtsx_pci_write_register(pcr, LDO_VCC_CFG0,  in rts5260_card_power_on()
205 	rtsx_pci_write_register(pcr, LDO_VCC_CFG1, LDO_POW_SDVDD1_MASK,  in rts5260_card_power_on()
208 	rtsx_pci_write_register(pcr, LDO_CONFIG2,  in rts5260_card_power_on()
212 	if (pcr->extra_caps & EXTRA_CAPS_SD_SDR50 ||  in rts5260_card_power_on()
213 	    pcr->extra_caps & EXTRA_CAPS_SD_SDR104)  in rts5260_card_power_on()
214 		sd_set_sample_push_timing_sd30(pcr);  in rts5260_card_power_on()
217 	rtsx_pci_write_register(pcr, SD_CFG1, 0xFF,  in rts5260_card_power_on()
220 	rtsx_pci_write_register(pcr, SD_SAMPLE_POINT_CTL,  in rts5260_card_power_on()
222 	rtsx_pci_write_register(pcr, SD_PUSH_POINT_CTL, 0xFF, 0);  in rts5260_card_power_on()
223 	rtsx_pci_write_register(pcr, CARD_STOP, SD_STOP | SD_CLR_ERR,  in rts5260_card_power_on()
227 	rtsx_pci_write_register(pcr, SD_CFG3, SD30_CLK_END_EN, 0);  in rts5260_card_power_on()
228 	rtsx_pci_write_register(pcr, REG_SD_STOP_SDCLK_CFG,  in rts5260_card_power_on()
232 	rtsx_pci_write_register(pcr, REG_PRE_RW_MODE, EN_INFINITE_MODE, 0);  in rts5260_card_power_on()
237 static int rts5260_switch_output_voltage(struct rtsx_pcr *pcr, u8 voltage)  in rts5260_switch_output_voltage()  argument
241 		rtsx_pci_write_register(pcr, LDO_CONFIG2,  in rts5260_switch_output_voltage()
243 		rtsx_pci_write_register(pcr, LDO_DV18_CFG,  in rts5260_switch_output_voltage()
245 		rtsx_pci_write_register(pcr, SD_PAD_CTL, SD_IO_USING_1V8, 0);  in rts5260_switch_output_voltage()
248 		rtsx_pci_write_register(pcr, LDO_CONFIG2,  in rts5260_switch_output_voltage()
250 		rtsx_pci_write_register(pcr, LDO_DV18_CFG,  in rts5260_switch_output_voltage()
252 		rtsx_pci_write_register(pcr, SD_PAD_CTL, SD_IO_USING_1V8,  in rts5260_switch_output_voltage()
260 	rts5260_fill_driving(pcr, voltage);  in rts5260_switch_output_voltage()
265 static void rts5260_stop_cmd(struct rtsx_pcr *pcr)  in rts5260_stop_cmd()  argument
267 	rtsx_pci_writel(pcr, RTSX_HCBCTLR, STOP_CMD);  in rts5260_stop_cmd()
268 	rtsx_pci_writel(pcr, RTSX_HDBCTLR, STOP_DMA);  in rts5260_stop_cmd()
269 	rtsx_pci_write_register(pcr, RTS5260_DMA_RST_CTL_0,  in rts5260_stop_cmd()
272 	rtsx_pci_write_register(pcr, RBCTL, RB_FLUSH, RB_FLUSH);  in rts5260_stop_cmd()
275 static void rts5260_card_before_power_off(struct rtsx_pcr *pcr)  in rts5260_card_before_power_off()  argument
277 	rts5260_stop_cmd(pcr);  in rts5260_card_before_power_off()
278 	rts5260_switch_output_voltage(pcr, OUTPUT_3V3);  in rts5260_card_before_power_off()
282 static int rts5260_card_power_off(struct rtsx_pcr *pcr, int card)  in rts5260_card_power_off()  argument
286 	rts5260_card_before_power_off(pcr);  in rts5260_card_power_off()
287 	err = rtsx_pci_write_register(pcr, LDO_VCC_CFG1,  in rts5260_card_power_off()
289 	err = rtsx_pci_write_register(pcr, LDO_CONFIG2,  in rts5260_card_power_off()
291 	if (pcr->option.ocp_en)  in rts5260_card_power_off()
292 		rtsx_pci_disable_ocp(pcr);  in rts5260_card_power_off()
297 static void rts5260_init_ocp(struct rtsx_pcr *pcr)  in rts5260_init_ocp()  argument
299 	struct rtsx_cr_option *option = &pcr->option;  in rts5260_init_ocp()
305 		rtsx_pci_write_register(pcr, RTS5260_DVCC_CTRL,  in rts5260_init_ocp()
309 		rtsx_pci_write_register(pcr, RTS5260_DV331812_CFG,  in rts5260_init_ocp()
314 		val = pcr->hw_param.ocp_glitch;  in rts5260_init_ocp()
315 		rtsx_pci_write_register(pcr, REG_OCPGLITCH, mask, val);  in rts5260_init_ocp()
316 		rtsx_pci_write_register(pcr, RTS5260_DVCC_CTRL,  in rts5260_init_ocp()
322 		rtsx_pci_enable_ocp(pcr);  in rts5260_init_ocp()
324 		rtsx_pci_write_register(pcr, RTS5260_DVCC_CTRL,  in rts5260_init_ocp()
330 static void rts5260_enable_ocp(struct rtsx_pcr *pcr)  in rts5260_enable_ocp()  argument
335 	rtsx_pci_write_register(pcr, REG_OCPCTL, 0xFF, val);  in rts5260_enable_ocp()
339 static void rts5260_disable_ocp(struct rtsx_pcr *pcr)  in rts5260_disable_ocp()  argument
344 	rtsx_pci_write_register(pcr, REG_OCPCTL, mask, 0);  in rts5260_disable_ocp()
349 static int rts5260_get_ocpstat(struct rtsx_pcr *pcr, u8 *val)  in rts5260_get_ocpstat()  argument
351 	return rtsx_pci_read_register(pcr, REG_OCPSTAT, val);  in rts5260_get_ocpstat()
354 static int rts5260_get_ocpstat2(struct rtsx_pcr *pcr, u8 *val)  in rts5260_get_ocpstat2()  argument
356 	return rtsx_pci_read_register(pcr, REG_DV3318_OCPSTAT, val);  in rts5260_get_ocpstat2()
359 static void rts5260_clear_ocpstat(struct rtsx_pcr *pcr)  in rts5260_clear_ocpstat()  argument
367 	rtsx_pci_write_register(pcr, REG_OCPCTL, mask, val);  in rts5260_clear_ocpstat()
368 	rtsx_pci_write_register(pcr, REG_DV3318_OCPCTL,  in rts5260_clear_ocpstat()
372 	rtsx_pci_write_register(pcr, REG_OCPCTL, mask, 0);  in rts5260_clear_ocpstat()
373 	rtsx_pci_write_register(pcr, REG_DV3318_OCPCTL,  in rts5260_clear_ocpstat()
377 static void rts5260_process_ocp(struct rtsx_pcr *pcr)  in rts5260_process_ocp()  argument
379 	if (!pcr->option.ocp_en)  in rts5260_process_ocp()
382 	rtsx_pci_get_ocpstat(pcr, &pcr->ocp_stat);  in rts5260_process_ocp()
383 	rts5260_get_ocpstat2(pcr, &pcr->ocp_stat2);  in rts5260_process_ocp()
385 	if ((pcr->ocp_stat & (SD_OC_NOW | SD_OC_EVER)) ||  in rts5260_process_ocp()
386 		(pcr->ocp_stat2 & (DV3318_OCP_NOW | DV3318_OCP_EVER))) {  in rts5260_process_ocp()
387 		rtsx_pci_card_power_off(pcr, RTSX_SD_CARD);  in rts5260_process_ocp()
388 		rtsx_pci_write_register(pcr, CARD_OE, SD_OUTPUT_EN, 0);  in rts5260_process_ocp()
389 		rtsx_pci_clear_ocpstat(pcr);  in rts5260_process_ocp()
390 		pcr->ocp_stat = 0;  in rts5260_process_ocp()
391 		pcr->ocp_stat2 = 0;  in rts5260_process_ocp()
396 static int rts5260_init_hw(struct rtsx_pcr *pcr)  in rts5260_init_hw()  argument
400 	rtsx_pci_init_cmd(pcr);  in rts5260_init_hw()
402 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, L1SUB_CONFIG1,  in rts5260_init_hw()
405 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, L1SUB_CONFIG3, 0xFF, 0x00);  in rts5260_init_hw()
406 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PM_CLK_FORCE_CTL,  in rts5260_init_hw()
408 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PWD_SUSPEND_EN, 0xFF, 0xFF);  in rts5260_init_hw()
409 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PWR_GATE_CTRL,  in rts5260_init_hw()
411 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, REG_VREF,  in rts5260_init_hw()
413 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, RBCTL,  in rts5260_init_hw()
416 	if (pcr->flags & PCR_REVERSE_SOCKET)  in rts5260_init_hw()
417 		rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG, 0xB0, 0xB0);  in rts5260_init_hw()
419 		rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG, 0xB0, 0x80);  in rts5260_init_hw()
421 	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, OBFF_CFG,  in rts5260_init_hw()
424 	err = rtsx_pci_send_cmd(pcr, CMD_TIMEOUT_DEF);  in rts5260_init_hw()
428 	rtsx_pci_init_ocp(pcr);  in rts5260_init_hw()
433 static void rts5260_pwr_saving_setting(struct rtsx_pcr *pcr)  in rts5260_pwr_saving_setting()  argument
437 	lss_l1_1 = rtsx_check_dev_flag(pcr, ASPM_L1_1_EN)  in rts5260_pwr_saving_setting()
438 			| rtsx_check_dev_flag(pcr, PM_L1_1_EN);  in rts5260_pwr_saving_setting()
439 	lss_l1_2 = rtsx_check_dev_flag(pcr, ASPM_L1_2_EN)  in rts5260_pwr_saving_setting()
440 			| rtsx_check_dev_flag(pcr, PM_L1_2_EN);  in rts5260_pwr_saving_setting()
442 	rtsx_pci_write_register(pcr, ASPM_FORCE_CTL, 0xFF, 0);  in rts5260_pwr_saving_setting()
444 		pcr_dbg(pcr, "Set parameters for L1.2.");  in rts5260_pwr_saving_setting()
445 		rtsx_pci_write_register(pcr, PWR_GLOBAL_CTRL,  in rts5260_pwr_saving_setting()
447 		rtsx_pci_write_register(pcr, RTS5260_DVCC_CTRL,  in rts5260_pwr_saving_setting()
453 		rtsx_pci_write_register(pcr, PWR_FE_CTL,  in rts5260_pwr_saving_setting()
456 		pcr_dbg(pcr, "Set parameters for L1.1.");  in rts5260_pwr_saving_setting()
457 		rtsx_pci_write_register(pcr, PWR_GLOBAL_CTRL,  in rts5260_pwr_saving_setting()
459 		rtsx_pci_write_register(pcr, PWR_FE_CTL,  in rts5260_pwr_saving_setting()
462 		pcr_dbg(pcr, "Set parameters for L1.");  in rts5260_pwr_saving_setting()
463 		rtsx_pci_write_register(pcr, PWR_GLOBAL_CTRL,  in rts5260_pwr_saving_setting()
465 		rtsx_pci_write_register(pcr, PWR_FE_CTL,  in rts5260_pwr_saving_setting()
469 	rtsx_pci_write_register(pcr, CFG_L1_0_PCIE_DPHY_RET_VALUE,  in rts5260_pwr_saving_setting()
471 	rtsx_pci_write_register(pcr, CFG_L1_0_PCIE_MAC_RET_VALUE,  in rts5260_pwr_saving_setting()
473 	rtsx_pci_write_register(pcr, CFG_L1_0_CRC_SD30_RET_VALUE,  in rts5260_pwr_saving_setting()
475 	rtsx_pci_write_register(pcr, CFG_L1_0_CRC_SD40_RET_VALUE,  in rts5260_pwr_saving_setting()
477 	rtsx_pci_write_register(pcr, CFG_L1_0_SYS_RET_VALUE,  in rts5260_pwr_saving_setting()
480 	rtsx_pci_write_register(pcr, CFG_PCIE_APHY_OFF_0,  in rts5260_pwr_saving_setting()
482 	rtsx_pci_write_register(pcr, CFG_PCIE_APHY_OFF_1,  in rts5260_pwr_saving_setting()
484 	rtsx_pci_write_register(pcr, CFG_PCIE_APHY_OFF_2,  in rts5260_pwr_saving_setting()
486 	rtsx_pci_write_register(pcr, CFG_PCIE_APHY_OFF_3,  in rts5260_pwr_saving_setting()
489 	rtsx_pci_write_register(pcr, PWC_CDR, 0xFF, PWC_CDR_DEFAULT);  in rts5260_pwr_saving_setting()
491 	rtsx_pci_write_register(pcr, CFG_LP_FPWM_VALUE,  in rts5260_pwr_saving_setting()
494 	rtsx_pci_write_register(pcr, CFG_L1_0_CRC_MISC_RET_VALUE,  in rts5260_pwr_saving_setting()
498 static void rts5260_init_from_cfg(struct rtsx_pcr *pcr)  in rts5260_init_from_cfg()  argument
500 	struct rtsx_cr_option *option = &pcr->option;  in rts5260_init_from_cfg()
503 	rtsx_pci_read_config_dword(pcr, PCR_ASPM_SETTING_5260, &lval);  in rts5260_init_from_cfg()
506 		rtsx_set_dev_flag(pcr, ASPM_L1_1_EN);  in rts5260_init_from_cfg()
509 		rtsx_set_dev_flag(pcr, ASPM_L1_2_EN);  in rts5260_init_from_cfg()
512 		rtsx_set_dev_flag(pcr, PM_L1_1_EN);  in rts5260_init_from_cfg()
515 		rtsx_set_dev_flag(pcr, PM_L1_2_EN);  in rts5260_init_from_cfg()
517 	rts5260_pwr_saving_setting(pcr);  in rts5260_init_from_cfg()
522 		pcie_capability_read_word(pcr->pci, PCI_EXP_DEVCTL2, &val);  in rts5260_init_from_cfg()
526 			rtsx_set_ltr_latency(pcr, option->ltr_active_latency);  in rts5260_init_from_cfg()
532 	if (rtsx_check_dev_flag(pcr, ASPM_L1_1_EN | ASPM_L1_2_EN  in rts5260_init_from_cfg()
539 static int rts5260_extra_init_hw(struct rtsx_pcr *pcr)  in rts5260_extra_init_hw()  argument
541 	struct rtsx_cr_option *option = &pcr->option;  in rts5260_extra_init_hw()
544 	rtsx_pci_write_register(pcr, 0xFC03, 0x7F, 0x07);  in rts5260_extra_init_hw()
545 	rtsx_pci_write_register(pcr, SSC_DIV_N_0, 0xFF, 0x5D);  in rts5260_extra_init_hw()
547 	rts5260_init_from_cfg(pcr);  in rts5260_extra_init_hw()
550 	rtsx_pci_write_register(pcr, RTS5260_AUTOLOAD_CFG4,  in rts5260_extra_init_hw()
553 	rtsx_pci_write_register(pcr, LDO_VCC_CFG0,  in rts5260_extra_init_hw()
556 	rtsx_pci_write_register(pcr, PCLK_CTL, PCLK_MODE_SEL, PCLK_MODE_SEL);  in rts5260_extra_init_hw()
558 	rts5260_init_hw(pcr);  in rts5260_extra_init_hw()
565 		rtsx_pci_write_register(pcr, PETXCFG,  in rts5260_extra_init_hw()
568 		rtsx_pci_write_register(pcr, PETXCFG,  in rts5260_extra_init_hw()
574 static void rts5260_set_aspm(struct rtsx_pcr *pcr, bool enable)  in rts5260_set_aspm()  argument
576 	struct rtsx_cr_option *option = &pcr->option;  in rts5260_set_aspm()
579 	if (pcr->aspm_enabled == enable)  in rts5260_set_aspm()
584 			val = pcr->aspm_en;  in rts5260_set_aspm()
585 		rtsx_pci_update_cfg_byte(pcr, pcr->pcie_cap + PCI_EXP_LNKCTL,  in rts5260_set_aspm()
592 		rtsx_pci_write_register(pcr, ASPM_FORCE_CTL, mask, val);  in rts5260_set_aspm()
595 	pcr->aspm_enabled = enable;  in rts5260_set_aspm()
598 static void rts5260_set_l1off_cfg_sub_d0(struct rtsx_pcr *pcr, int active)  in rts5260_set_l1off_cfg_sub_d0()  argument
600 	struct rtsx_cr_option *option = &pcr->option;  in rts5260_set_l1off_cfg_sub_d0()
601 	u32 interrupt = rtsx_pci_readl(pcr, RTSX_BIPR);  in rts5260_set_l1off_cfg_sub_d0()
606 	aspm_L1_1 = rtsx_check_dev_flag(pcr, ASPM_L1_1_EN);  in rts5260_set_l1off_cfg_sub_d0()
607 	aspm_L1_2 = rtsx_check_dev_flag(pcr, ASPM_L1_2_EN);  in rts5260_set_l1off_cfg_sub_d0()
620 		if (rtsx_check_dev_flag(pcr,  in rts5260_set_l1off_cfg_sub_d0()
628 	rtsx_set_l1off_sub(pcr, val);  in rts5260_set_l1off_cfg_sub_d0()
653 void rts5260_init_params(struct rtsx_pcr *pcr)  in rts5260_init_params()  argument
655 	struct rtsx_cr_option *option = &pcr->option;  in rts5260_init_params()
656 	struct rtsx_hw_param *hw_param = &pcr->hw_param;  in rts5260_init_params()
658 	pcr->extra_caps = EXTRA_CAPS_SD_SDR50 | EXTRA_CAPS_SD_SDR104;  in rts5260_init_params()
659 	pcr->num_slots = 2;  in rts5260_init_params()
661 	pcr->flags = 0;  in rts5260_init_params()
662 	pcr->card_drive_sel = RTSX_CARD_DRIVE_DEFAULT;  in rts5260_init_params()
663 	pcr->sd30_drive_sel_1v8 = CFG_DRIVER_TYPE_B;  in rts5260_init_params()
664 	pcr->sd30_drive_sel_3v3 = CFG_DRIVER_TYPE_B;  in rts5260_init_params()
665 	pcr->aspm_en = ASPM_L1_EN;  in rts5260_init_params()
666 	pcr->tx_initial_phase = SET_CLOCK_PHASE(1, 29, 16);  in rts5260_init_params()
667 	pcr->rx_initial_phase = SET_CLOCK_PHASE(24, 6, 5);  in rts5260_init_params()
669 	pcr->ic_version = rts5260_get_ic_version(pcr);  in rts5260_init_params()
670 	pcr->sd_pull_ctl_enable_tbl = rts5260_sd_pull_ctl_enable_tbl;  in rts5260_init_params()
671 	pcr->sd_pull_ctl_disable_tbl = rts5260_sd_pull_ctl_disable_tbl;  in rts5260_init_params()
672 	pcr->ms_pull_ctl_enable_tbl = rts5260_ms_pull_ctl_enable_tbl;  in rts5260_init_params()
673 	pcr->ms_pull_ctl_disable_tbl = rts5260_ms_pull_ctl_disable_tbl;  in rts5260_init_params()
675 	pcr->reg_pm_ctrl3 = RTS524A_PM_CTRL3;  in rts5260_init_params()
677 	pcr->ops = &rts5260_pcr_ops;  in rts5260_init_params()