Lines Matching refs:prcmu_base
450 static __iomem void *prcmu_base; variable
628 writel(PRCMU_DSI_CLOCK_SETTING, prcmu_base + PRCM_HDMICLK_MGT); in db8500_prcmu_set_display_clocks()
629 writel(PRCMU_DSI_LP_CLOCK_SETTING, prcmu_base + PRCM_TVCLK_MGT); in db8500_prcmu_set_display_clocks()
630 writel(PRCMU_DPI_CLOCK_SETTING, prcmu_base + PRCM_LCDCLK_MGT); in db8500_prcmu_set_display_clocks()
642 return readl(prcmu_base + reg); in db8500_prcmu_read()
650 writel(value, (prcmu_base + reg)); in db8500_prcmu_write()
660 val = readl(prcmu_base + reg); in db8500_prcmu_write_masked()
662 writel(val, (prcmu_base + reg)); in db8500_prcmu_write_masked()
961 val = readl(prcmu_base + clock_reg[i]); in request_even_slower_clocks()
977 writel(val, prcmu_base + clock_reg[i]); in request_even_slower_clocks()
1331 val = readl(prcmu_base + clk_mgt[clock].offset); in request_clock()
1338 writel(val, prcmu_base + clk_mgt[clock].offset); in request_clock()
1514 val = readl(prcmu_base + clk_mgt[clock].offset); in clock_rate()
1674 val = readl(prcmu_base + clk_mgt[clock].offset); in round_clock_rate()
1836 val = readl(prcmu_base + clk_mgt[clock].offset); in set_clock_rate()
1864 writel(val, prcmu_base + clk_mgt[clock].offset); in set_clock_rate()
2743 prcmu_base = ioremap(phy_base, size); in db8500_prcmu_early_init()
2744 if (!prcmu_base) in db8500_prcmu_early_init()
3087 prcmu_base = devm_ioremap(&pdev->dev, res->start, resource_size(res)); in db8500_prcmu_probe()
3088 if (!prcmu_base) { in db8500_prcmu_probe()