452 struct clk_mgt {  struct
469 static struct clk_mgt clk_mgt[PRCMU_NUM_REG_CLOCKS] = {  variable
1331 	val = readl(prcmu_base + clk_mgt[clock].offset);  in request_clock()
1333 		val |= (PRCM_CLK_MGT_CLKEN | clk_mgt[clock].pllsw);  in request_clock()
1335 		clk_mgt[clock].pllsw = (val & PRCM_CLK_MGT_CLKPLLSW_MASK);  in request_clock()
1338 	writel(val, prcmu_base + clk_mgt[clock].offset);  in request_clock()
1514 	val = readl(prcmu_base + clk_mgt[clock].offset);  in clock_rate()
1517 		if (clk_mgt[clock].clk38div && (val & PRCM_CLK_MGT_CLK38DIV))  in clock_rate()
1522 	val |= clk_mgt[clock].pllsw;  in clock_rate()
1526 		rate = pll_rate(PRCM_PLLSOC0_FREQ, rate, clk_mgt[clock].branch);  in clock_rate()
1528 		rate = pll_rate(PRCM_PLLSOC1_FREQ, rate, clk_mgt[clock].branch);  in clock_rate()
1530 		rate = pll_rate(PRCM_PLLDDR_FREQ, rate, clk_mgt[clock].branch);  in clock_rate()
1674 	val = readl(prcmu_base + clk_mgt[clock].offset);  in round_clock_rate()
1675 	src_rate = clock_source_rate((val | clk_mgt[clock].pllsw),  in round_clock_rate()
1676 		clk_mgt[clock].branch);  in round_clock_rate()
1679 		if (clk_mgt[clock].clk38div) {  in round_clock_rate()
1836 	val = readl(prcmu_base + clk_mgt[clock].offset);  in set_clock_rate()
1837 	src_rate = clock_source_rate((val | clk_mgt[clock].pllsw),  in set_clock_rate()
1838 		clk_mgt[clock].branch);  in set_clock_rate()
1841 		if (clk_mgt[clock].clk38div) {  in set_clock_rate()
1864 	writel(val, prcmu_base + clk_mgt[clock].offset);  in set_clock_rate()