Lines Matching refs:TEGRA114_MC_RESET
938 #define TEGRA114_MC_RESET(_name, _control, _status, _bit) \ macro
948 TEGRA114_MC_RESET(AVPC, 0x200, 0x204, 1),
949 TEGRA114_MC_RESET(DC, 0x200, 0x204, 2),
950 TEGRA114_MC_RESET(DCB, 0x200, 0x204, 3),
951 TEGRA114_MC_RESET(EPP, 0x200, 0x204, 4),
952 TEGRA114_MC_RESET(2D, 0x200, 0x204, 5),
953 TEGRA114_MC_RESET(HC, 0x200, 0x204, 6),
954 TEGRA114_MC_RESET(HDA, 0x200, 0x204, 7),
955 TEGRA114_MC_RESET(ISP, 0x200, 0x204, 8),
956 TEGRA114_MC_RESET(MPCORE, 0x200, 0x204, 9),
957 TEGRA114_MC_RESET(MPCORELP, 0x200, 0x204, 10),
958 TEGRA114_MC_RESET(MPE, 0x200, 0x204, 11),
959 TEGRA114_MC_RESET(3D, 0x200, 0x204, 12),
960 TEGRA114_MC_RESET(3D2, 0x200, 0x204, 13),
961 TEGRA114_MC_RESET(PPCS, 0x200, 0x204, 14),
962 TEGRA114_MC_RESET(VDE, 0x200, 0x204, 16),
963 TEGRA114_MC_RESET(VI, 0x200, 0x204, 17),