Lines Matching refs:smcr
160 uint32_t smcr, val, cycles; in jz4780_nemc_configure_bank() local
185 smcr = readl(nemc->base + NEMC_SMCRn(bank)); in jz4780_nemc_configure_bank()
186 smcr &= ~NEMC_SMCR_SMT; in jz4780_nemc_configure_bank()
189 smcr &= ~NEMC_SMCR_BW_MASK; in jz4780_nemc_configure_bank()
192 smcr |= NEMC_SMCR_BW_8; in jz4780_nemc_configure_bank()
205 smcr &= ~NEMC_SMCR_TAS_MASK; in jz4780_nemc_configure_bank()
213 smcr |= cycles << NEMC_SMCR_TAS_SHIFT; in jz4780_nemc_configure_bank()
217 smcr &= ~NEMC_SMCR_TAH_MASK; in jz4780_nemc_configure_bank()
225 smcr |= cycles << NEMC_SMCR_TAH_SHIFT; in jz4780_nemc_configure_bank()
229 smcr &= ~NEMC_SMCR_TBP_MASK; in jz4780_nemc_configure_bank()
237 smcr |= convert_tBP_tAW[cycles] << NEMC_SMCR_TBP_SHIFT; in jz4780_nemc_configure_bank()
241 smcr &= ~NEMC_SMCR_TAW_MASK; in jz4780_nemc_configure_bank()
249 smcr |= convert_tBP_tAW[cycles] << NEMC_SMCR_TAW_SHIFT; in jz4780_nemc_configure_bank()
253 smcr &= ~NEMC_SMCR_TSTRV_MASK; in jz4780_nemc_configure_bank()
261 smcr |= cycles << NEMC_SMCR_TSTRV_SHIFT; in jz4780_nemc_configure_bank()
264 writel(smcr, nemc->base + NEMC_SMCRn(bank)); in jz4780_nemc_configure_bank()