Lines Matching refs:dev

46 static int verve_write_byte(struct cx231xx *dev, u8 saddr, u8 data)  in verve_write_byte()  argument
48 return cx231xx_write_i2c_data(dev, VERVE_I2C_ADDRESS, in verve_write_byte()
52 static int verve_read_byte(struct cx231xx *dev, u8 saddr, u8 *data) in verve_read_byte() argument
57 status = cx231xx_read_i2c_data(dev, VERVE_I2C_ADDRESS, in verve_read_byte()
62 void initGPIO(struct cx231xx *dev) in initGPIO() argument
70 cx231xx_send_gpio_cmd(dev, _gpio_direction, (u8 *)&value, 4, 0, 0); in initGPIO()
72 verve_read_byte(dev, 0x07, &val); in initGPIO()
73 dev_dbg(dev->dev, "verve_read_byte address0x07=0x%x\n", val); in initGPIO()
74 verve_write_byte(dev, 0x07, 0xF4); in initGPIO()
75 verve_read_byte(dev, 0x07, &val); in initGPIO()
76 dev_dbg(dev->dev, "verve_read_byte address0x07=0x%x\n", val); in initGPIO()
78 cx231xx_capture_start(dev, 1, Vbi); in initGPIO()
80 cx231xx_mode_register(dev, EP_MODE_SET, 0x0500FE00); in initGPIO()
81 cx231xx_mode_register(dev, GBULK_BIT_EN, 0xFFFDFFFF); in initGPIO()
84 void uninitGPIO(struct cx231xx *dev) in uninitGPIO() argument
88 cx231xx_capture_start(dev, 0, Vbi); in uninitGPIO()
89 verve_write_byte(dev, 0x07, 0x14); in uninitGPIO()
90 cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, in uninitGPIO()
98 static int afe_write_byte(struct cx231xx *dev, u16 saddr, u8 data) in afe_write_byte() argument
100 return cx231xx_write_i2c_data(dev, AFE_DEVICE_ADDRESS, in afe_write_byte()
104 static int afe_read_byte(struct cx231xx *dev, u16 saddr, u8 *data) in afe_read_byte() argument
109 status = cx231xx_read_i2c_data(dev, AFE_DEVICE_ADDRESS, in afe_read_byte()
115 int cx231xx_afe_init_super_block(struct cx231xx *dev, u32 ref_count) in cx231xx_afe_init_super_block() argument
124 status = afe_write_byte(dev, SUP_BLK_TUNE2, temp); in cx231xx_afe_init_super_block()
128 status = afe_read_byte(dev, SUP_BLK_TUNE2, &afe_power_status); in cx231xx_afe_init_super_block()
134 status = afe_write_byte(dev, SUP_BLK_TUNE1, temp); in cx231xx_afe_init_super_block()
138 status = afe_write_byte(dev, SUP_BLK_PLL2, 0x0f); in cx231xx_afe_init_super_block()
144 status = afe_write_byte(dev, SUP_BLK_PWRDN, 0x18); in cx231xx_afe_init_super_block()
146 dev_dbg(dev->dev, in cx231xx_afe_init_super_block()
152 status = afe_read_byte(dev, SUP_BLK_PWRDN, &afe_power_status); in cx231xx_afe_init_super_block()
155 dev_dbg(dev->dev, in cx231xx_afe_init_super_block()
162 dev_dbg(dev->dev, in cx231xx_afe_init_super_block()
174 status = afe_write_byte(dev, SUP_BLK_TUNE3, 0x40); in cx231xx_afe_init_super_block()
181 status = afe_write_byte(dev, SUP_BLK_TUNE3, 0x00); in cx231xx_afe_init_super_block()
186 int cx231xx_afe_init_channels(struct cx231xx *dev) in cx231xx_afe_init_channels() argument
191 status = afe_write_byte(dev, ADC_PWRDN_CLAMP_CH1, 0x00); in cx231xx_afe_init_channels()
192 status = afe_write_byte(dev, ADC_PWRDN_CLAMP_CH2, 0x00); in cx231xx_afe_init_channels()
193 status = afe_write_byte(dev, ADC_PWRDN_CLAMP_CH3, 0x00); in cx231xx_afe_init_channels()
196 status = afe_write_byte(dev, ADC_COM_QUANT, 0x02); in cx231xx_afe_init_channels()
199 status = afe_write_byte(dev, ADC_FB_FRCRST_CH1, 0x17); in cx231xx_afe_init_channels()
200 status = afe_write_byte(dev, ADC_FB_FRCRST_CH2, 0x17); in cx231xx_afe_init_channels()
201 status = afe_write_byte(dev, ADC_FB_FRCRST_CH3, 0x17); in cx231xx_afe_init_channels()
204 status = afe_write_byte(dev, ADC_CAL_ATEST_CH1, 0x10); in cx231xx_afe_init_channels()
205 status = afe_write_byte(dev, ADC_CAL_ATEST_CH2, 0x10); in cx231xx_afe_init_channels()
206 status = afe_write_byte(dev, ADC_CAL_ATEST_CH3, 0x10); in cx231xx_afe_init_channels()
210 status = afe_write_byte(dev, ADC_FB_FRCRST_CH1, 0x07); in cx231xx_afe_init_channels()
211 status = afe_write_byte(dev, ADC_FB_FRCRST_CH2, 0x07); in cx231xx_afe_init_channels()
212 status = afe_write_byte(dev, ADC_FB_FRCRST_CH3, 0x07); in cx231xx_afe_init_channels()
215 status = afe_write_byte(dev, ADC_NTF_PRECLMP_EN_CH1, 0xf0); in cx231xx_afe_init_channels()
216 status = afe_write_byte(dev, ADC_NTF_PRECLMP_EN_CH2, 0xf0); in cx231xx_afe_init_channels()
217 status = afe_write_byte(dev, ADC_NTF_PRECLMP_EN_CH3, 0xf0); in cx231xx_afe_init_channels()
220 status = cx231xx_reg_mask_write(dev, AFE_DEVICE_ADDRESS, 8, in cx231xx_afe_init_channels()
222 status = cx231xx_reg_mask_write(dev, AFE_DEVICE_ADDRESS, 8, in cx231xx_afe_init_channels()
224 status = cx231xx_reg_mask_write(dev, AFE_DEVICE_ADDRESS, 8, in cx231xx_afe_init_channels()
228 status = afe_write_byte(dev, ADC_DCSERVO_DEM_CH1, 0x03); in cx231xx_afe_init_channels()
229 status = afe_write_byte(dev, ADC_DCSERVO_DEM_CH2, 0x03); in cx231xx_afe_init_channels()
230 status = afe_write_byte(dev, ADC_DCSERVO_DEM_CH3, 0x03); in cx231xx_afe_init_channels()
235 int cx231xx_afe_setup_AFE_for_baseband(struct cx231xx *dev) in cx231xx_afe_setup_AFE_for_baseband() argument
240 status = afe_read_byte(dev, ADC_PWRDN_CLAMP_CH2, &c_value); in cx231xx_afe_setup_AFE_for_baseband()
242 status = afe_write_byte(dev, ADC_PWRDN_CLAMP_CH2, c_value); in cx231xx_afe_setup_AFE_for_baseband()
256 int cx231xx_afe_set_input_mux(struct cx231xx *dev, u32 input_mux) in cx231xx_afe_set_input_mux() argument
265 status = afe_read_byte(dev, ADC_INPUT_CH1, &value); in cx231xx_afe_set_input_mux()
269 status = afe_write_byte(dev, ADC_INPUT_CH1, value); in cx231xx_afe_set_input_mux()
273 status = afe_read_byte(dev, ADC_INPUT_CH2, &value); in cx231xx_afe_set_input_mux()
277 status = afe_write_byte(dev, ADC_INPUT_CH2, value); in cx231xx_afe_set_input_mux()
283 status = afe_read_byte(dev, ADC_INPUT_CH3, &value); in cx231xx_afe_set_input_mux()
287 status = afe_write_byte(dev, ADC_INPUT_CH3, value); in cx231xx_afe_set_input_mux()
293 int cx231xx_afe_set_mode(struct cx231xx *dev, enum AFE_MODE mode) in cx231xx_afe_set_mode() argument
304 cx231xx_Setup_AFE_for_LowIF(dev); in cx231xx_afe_set_mode()
307 status = cx231xx_afe_setup_AFE_for_baseband(dev); in cx231xx_afe_set_mode()
320 if ((mode != dev->afe_mode) && in cx231xx_afe_set_mode()
321 (dev->video_input == CX231XX_VMUX_TELEVISION)) in cx231xx_afe_set_mode()
322 status = cx231xx_afe_adjust_ref_count(dev, in cx231xx_afe_set_mode()
325 dev->afe_mode = mode; in cx231xx_afe_set_mode()
330 int cx231xx_afe_update_power_control(struct cx231xx *dev, in cx231xx_afe_update_power_control() argument
336 switch (dev->model) { in cx231xx_afe_update_power_control()
354 status = afe_write_byte(dev, SUP_BLK_PWRDN, in cx231xx_afe_update_power_control()
357 status |= afe_read_byte(dev, SUP_BLK_PWRDN, in cx231xx_afe_update_power_control()
363 status = afe_write_byte(dev, ADC_PWRDN_CLAMP_CH1, in cx231xx_afe_update_power_control()
365 status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH2, in cx231xx_afe_update_power_control()
367 status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH3, in cx231xx_afe_update_power_control()
370 status = afe_write_byte(dev, ADC_PWRDN_CLAMP_CH1, in cx231xx_afe_update_power_control()
372 status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH2, in cx231xx_afe_update_power_control()
374 status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH3, in cx231xx_afe_update_power_control()
377 status |= afe_read_byte(dev, SUP_BLK_PWRDN, in cx231xx_afe_update_power_control()
382 status |= afe_write_byte(dev, SUP_BLK_PWRDN, in cx231xx_afe_update_power_control()
387 status = afe_write_byte(dev, SUP_BLK_PWRDN, in cx231xx_afe_update_power_control()
390 status |= afe_read_byte(dev, SUP_BLK_PWRDN, in cx231xx_afe_update_power_control()
396 status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH1, in cx231xx_afe_update_power_control()
398 status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH2, in cx231xx_afe_update_power_control()
400 status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH3, in cx231xx_afe_update_power_control()
403 dev_dbg(dev->dev, "Invalid AV mode input\n"); in cx231xx_afe_update_power_control()
411 status = afe_write_byte(dev, SUP_BLK_PWRDN, in cx231xx_afe_update_power_control()
414 status |= afe_read_byte(dev, SUP_BLK_PWRDN, in cx231xx_afe_update_power_control()
420 status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH1, in cx231xx_afe_update_power_control()
422 status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH2, in cx231xx_afe_update_power_control()
424 status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH3, in cx231xx_afe_update_power_control()
427 status = afe_write_byte(dev, ADC_PWRDN_CLAMP_CH1, in cx231xx_afe_update_power_control()
429 status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH2, in cx231xx_afe_update_power_control()
431 status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH3, in cx231xx_afe_update_power_control()
434 status |= afe_read_byte(dev, SUP_BLK_PWRDN, in cx231xx_afe_update_power_control()
439 status |= afe_write_byte(dev, SUP_BLK_PWRDN, in cx231xx_afe_update_power_control()
444 status = afe_write_byte(dev, SUP_BLK_PWRDN, in cx231xx_afe_update_power_control()
447 status |= afe_read_byte(dev, SUP_BLK_PWRDN, in cx231xx_afe_update_power_control()
453 status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH1, in cx231xx_afe_update_power_control()
455 status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH2, in cx231xx_afe_update_power_control()
457 status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH3, in cx231xx_afe_update_power_control()
460 dev_dbg(dev->dev, "Invalid AV mode input\n"); in cx231xx_afe_update_power_control()
468 int cx231xx_afe_adjust_ref_count(struct cx231xx *dev, u32 video_input) in cx231xx_afe_adjust_ref_count() argument
474 dev->video_input = video_input; in cx231xx_afe_adjust_ref_count()
477 status = afe_read_byte(dev, ADC_INPUT_CH3, &input_mode); in cx231xx_afe_adjust_ref_count()
478 status = afe_read_byte(dev, ADC_NTF_PRECLMP_EN_CH3, in cx231xx_afe_adjust_ref_count()
481 status = afe_read_byte(dev, ADC_INPUT_CH1, &input_mode); in cx231xx_afe_adjust_ref_count()
482 status = afe_read_byte(dev, ADC_NTF_PRECLMP_EN_CH1, in cx231xx_afe_adjust_ref_count()
490 dev->afe_ref_count = 0x23C; in cx231xx_afe_adjust_ref_count()
493 dev->afe_ref_count = 0x24C; in cx231xx_afe_adjust_ref_count()
496 dev->afe_ref_count = 0x258; in cx231xx_afe_adjust_ref_count()
499 dev->afe_ref_count = 0x260; in cx231xx_afe_adjust_ref_count()
505 status = cx231xx_afe_init_super_block(dev, dev->afe_ref_count); in cx231xx_afe_adjust_ref_count()
513 static int vid_blk_write_byte(struct cx231xx *dev, u16 saddr, u8 data) in vid_blk_write_byte() argument
515 return cx231xx_write_i2c_data(dev, VID_BLK_I2C_ADDRESS, in vid_blk_write_byte()
519 static int vid_blk_read_byte(struct cx231xx *dev, u16 saddr, u8 *data) in vid_blk_read_byte() argument
524 status = cx231xx_read_i2c_data(dev, VID_BLK_I2C_ADDRESS, in vid_blk_read_byte()
530 static int vid_blk_write_word(struct cx231xx *dev, u16 saddr, u32 data) in vid_blk_write_word() argument
532 return cx231xx_write_i2c_data(dev, VID_BLK_I2C_ADDRESS, in vid_blk_write_word()
536 static int vid_blk_read_word(struct cx231xx *dev, u16 saddr, u32 *data) in vid_blk_read_word() argument
538 return cx231xx_read_i2c_data(dev, VID_BLK_I2C_ADDRESS, in vid_blk_read_word()
541 int cx231xx_check_fw(struct cx231xx *dev) in cx231xx_check_fw() argument
545 status = vid_blk_read_byte(dev, DL_CTL_ADDRESS_LOW, &temp); in cx231xx_check_fw()
553 int cx231xx_set_video_input_mux(struct cx231xx *dev, u8 input) in cx231xx_set_video_input_mux() argument
560 if ((dev->current_pcb_config.type == USB_BUS_POWER) && in cx231xx_set_video_input_mux()
561 (dev->power_mode != POLARIS_AVMODE_ENXTERNAL_AV)) { in cx231xx_set_video_input_mux()
563 status = cx231xx_set_power_mode(dev, in cx231xx_set_video_input_mux()
566 dev_err(dev->dev, in cx231xx_set_video_input_mux()
572 status = cx231xx_set_decoder_video_input(dev, in cx231xx_set_video_input_mux()
578 if ((dev->current_pcb_config.type == USB_BUS_POWER) && in cx231xx_set_video_input_mux()
579 (dev->power_mode != POLARIS_AVMODE_ANALOGT_TV)) { in cx231xx_set_video_input_mux()
581 status = cx231xx_set_power_mode(dev, in cx231xx_set_video_input_mux()
584 dev_err(dev->dev, in cx231xx_set_video_input_mux()
590 if (dev->tuner_type == TUNER_NXP_TDA18271) in cx231xx_set_video_input_mux()
591 status = cx231xx_set_decoder_video_input(dev, in cx231xx_set_video_input_mux()
595 status = cx231xx_set_decoder_video_input(dev, in cx231xx_set_video_input_mux()
601 dev_err(dev->dev, "%s: Unknown Input %d !\n", in cx231xx_set_video_input_mux()
607 dev->video_input = input; in cx231xx_set_video_input_mux()
612 int cx231xx_set_decoder_video_input(struct cx231xx *dev, in cx231xx_set_decoder_video_input() argument
618 if (pin_type != dev->video_input) { in cx231xx_set_decoder_video_input()
619 status = cx231xx_afe_adjust_ref_count(dev, pin_type); in cx231xx_set_decoder_video_input()
621 dev_err(dev->dev, in cx231xx_set_decoder_video_input()
629 status = cx231xx_afe_set_input_mux(dev, input); in cx231xx_set_decoder_video_input()
631 dev_err(dev->dev, in cx231xx_set_decoder_video_input()
639 status = vid_blk_read_word(dev, AFE_CTRL, &value); in cx231xx_set_decoder_video_input()
647 status = vid_blk_write_word(dev, AFE_CTRL, value); in cx231xx_set_decoder_video_input()
649 status = vid_blk_read_word(dev, OUT_CTRL1, &value); in cx231xx_set_decoder_video_input()
651 status = vid_blk_write_word(dev, OUT_CTRL1, value); in cx231xx_set_decoder_video_input()
654 status = cx231xx_read_modify_write_i2c_dword(dev, in cx231xx_set_decoder_video_input()
658 dev->board.output_mode); in cx231xx_set_decoder_video_input()
661 status = cx231xx_dif_set_standard(dev, DIF_USE_BASEBAND); in cx231xx_set_decoder_video_input()
663 dev_err(dev->dev, in cx231xx_set_decoder_video_input()
670 status = vid_blk_read_word(dev, DFE_CTRL1, &value); in cx231xx_set_decoder_video_input()
679 status = vid_blk_write_word(dev, DFE_CTRL1, value); in cx231xx_set_decoder_video_input()
682 status = cx231xx_read_modify_write_i2c_dword(dev, in cx231xx_set_decoder_video_input()
688 status = cx231xx_read_modify_write_i2c_dword(dev, in cx231xx_set_decoder_video_input()
696 status = vid_blk_read_word(dev, AFE_CTRL, &value); in cx231xx_set_decoder_video_input()
703 status = vid_blk_write_word(dev, AFE_CTRL, value); in cx231xx_set_decoder_video_input()
706 status = cx231xx_dif_set_standard(dev, DIF_USE_BASEBAND); in cx231xx_set_decoder_video_input()
708 dev_err(dev->dev, in cx231xx_set_decoder_video_input()
715 status = vid_blk_read_word(dev, DFE_CTRL1, &value); in cx231xx_set_decoder_video_input()
724 status = vid_blk_write_word(dev, DFE_CTRL1, value); in cx231xx_set_decoder_video_input()
727 status = cx231xx_read_modify_write_i2c_dword(dev, in cx231xx_set_decoder_video_input()
733 status = cx231xx_read_modify_write_i2c_dword(dev, in cx231xx_set_decoder_video_input()
740 status = vid_blk_read_word(dev, AFE_CTRL, &value); in cx231xx_set_decoder_video_input()
748 status = vid_blk_write_word(dev, AFE_CTRL, value); in cx231xx_set_decoder_video_input()
750 status = cx231xx_afe_set_mode(dev, AFE_MODE_BASEBAND); in cx231xx_set_decoder_video_input()
756 if (dev->board.tuner_type == TUNER_XC5000) { in cx231xx_set_decoder_video_input()
759 status = vid_blk_read_word(dev, AFE_CTRL, &value); in cx231xx_set_decoder_video_input()
767 status = vid_blk_write_word(dev, AFE_CTRL, value); in cx231xx_set_decoder_video_input()
769 status = vid_blk_read_word(dev, OUT_CTRL1, &value); in cx231xx_set_decoder_video_input()
771 status = vid_blk_write_word(dev, OUT_CTRL1, value); in cx231xx_set_decoder_video_input()
774 status = cx231xx_read_modify_write_i2c_dword(dev, in cx231xx_set_decoder_video_input()
777 dev->board.output_mode); in cx231xx_set_decoder_video_input()
780 status = cx231xx_dif_set_standard(dev, in cx231xx_set_decoder_video_input()
783 dev_err(dev->dev, in cx231xx_set_decoder_video_input()
790 status = vid_blk_read_word(dev, DFE_CTRL1, &value); in cx231xx_set_decoder_video_input()
799 status = vid_blk_write_word(dev, DFE_CTRL1, value); in cx231xx_set_decoder_video_input()
802 status = cx231xx_read_modify_write_i2c_dword(dev, in cx231xx_set_decoder_video_input()
808 status = cx231xx_read_modify_write_i2c_dword(dev, in cx231xx_set_decoder_video_input()
817 status = cx231xx_dif_set_standard(dev, dev->norm); in cx231xx_set_decoder_video_input()
819 dev_err(dev->dev, in cx231xx_set_decoder_video_input()
826 status = vid_blk_read_word(dev, DIF_MISC_CTRL, &value); in cx231xx_set_decoder_video_input()
832 status = vid_blk_write_word(dev, DIF_MISC_CTRL, value); in cx231xx_set_decoder_video_input()
835 status = vid_blk_read_word(dev, DFE_CTRL1, &value); in cx231xx_set_decoder_video_input()
845 status = vid_blk_write_word(dev, DFE_CTRL1, value); in cx231xx_set_decoder_video_input()
854 status = vid_blk_write_word(dev, DFE_CTRL1, value); in cx231xx_set_decoder_video_input()
857 status = vid_blk_read_word(dev, PIN_CTRL, &value); in cx231xx_set_decoder_video_input()
861 status = vid_blk_write_word(dev, PIN_CTRL, value); in cx231xx_set_decoder_video_input()
864 status = cx231xx_read_modify_write_i2c_dword(dev, in cx231xx_set_decoder_video_input()
867 dev->board.output_mode); in cx231xx_set_decoder_video_input()
870 status = cx231xx_read_modify_write_i2c_dword(dev, in cx231xx_set_decoder_video_input()
876 status = cx231xx_read_modify_write_i2c_dword(dev, in cx231xx_set_decoder_video_input()
887 status = vid_blk_read_word(dev, AFE_CTRL, &value); in cx231xx_set_decoder_video_input()
895 status = vid_blk_write_word(dev, AFE_CTRL, value); in cx231xx_set_decoder_video_input()
897 if (dev->tuner_type == TUNER_NXP_TDA18271) { in cx231xx_set_decoder_video_input()
898 status = vid_blk_read_word(dev, PIN_CTRL, in cx231xx_set_decoder_video_input()
900 status = vid_blk_write_word(dev, PIN_CTRL, in cx231xx_set_decoder_video_input()
911 status = cx231xx_read_modify_write_i2c_dword(dev, in cx231xx_set_decoder_video_input()
916 status = vid_blk_read_word(dev, OUT_CTRL1, &value); in cx231xx_set_decoder_video_input()
919 status = vid_blk_write_word(dev, OUT_CTRL1, value); in cx231xx_set_decoder_video_input()
925 void cx231xx_enable656(struct cx231xx *dev) in cx231xx_enable656() argument
930 vid_blk_write_byte(dev, TS1_PIN_CTL0, 0xFF); in cx231xx_enable656()
934 vid_blk_read_byte(dev, TS1_PIN_CTL1, &temp); in cx231xx_enable656()
937 vid_blk_write_byte(dev, TS1_PIN_CTL1, temp); in cx231xx_enable656()
941 void cx231xx_disable656(struct cx231xx *dev) in cx231xx_disable656() argument
945 vid_blk_write_byte(dev, TS1_PIN_CTL0, 0x00); in cx231xx_disable656()
947 vid_blk_read_byte(dev, TS1_PIN_CTL1, &temp); in cx231xx_disable656()
950 vid_blk_write_byte(dev, TS1_PIN_CTL1, temp); in cx231xx_disable656()
959 int cx231xx_do_mode_ctrl_overrides(struct cx231xx *dev) in cx231xx_do_mode_ctrl_overrides() argument
963 dev_dbg(dev->dev, "%s: 0x%x\n", in cx231xx_do_mode_ctrl_overrides()
964 __func__, (unsigned int)dev->norm); in cx231xx_do_mode_ctrl_overrides()
967 status = vid_blk_write_word(dev, DFE_CTRL3, 0xCD3F0280); in cx231xx_do_mode_ctrl_overrides()
969 if (dev->norm & (V4L2_STD_NTSC | V4L2_STD_PAL_M)) { in cx231xx_do_mode_ctrl_overrides()
970 dev_dbg(dev->dev, "%s: NTSC\n", __func__); in cx231xx_do_mode_ctrl_overrides()
974 status = cx231xx_read_modify_write_i2c_dword(dev, in cx231xx_do_mode_ctrl_overrides()
978 status = cx231xx_read_modify_write_i2c_dword(dev, in cx231xx_do_mode_ctrl_overrides()
983 status = cx231xx_read_modify_write_i2c_dword(dev, in cx231xx_do_mode_ctrl_overrides()
989 status = cx231xx_read_modify_write_i2c_dword(dev, in cx231xx_do_mode_ctrl_overrides()
996 } else if (dev->norm & V4L2_STD_SECAM) { in cx231xx_do_mode_ctrl_overrides()
997 dev_dbg(dev->dev, "%s: SECAM\n", __func__); in cx231xx_do_mode_ctrl_overrides()
998 status = cx231xx_read_modify_write_i2c_dword(dev, in cx231xx_do_mode_ctrl_overrides()
1002 status = cx231xx_read_modify_write_i2c_dword(dev, in cx231xx_do_mode_ctrl_overrides()
1009 status = cx231xx_read_modify_write_i2c_dword(dev, in cx231xx_do_mode_ctrl_overrides()
1017 status = cx231xx_read_modify_write_i2c_dword(dev, in cx231xx_do_mode_ctrl_overrides()
1024 dev_dbg(dev->dev, "%s: PAL\n", __func__); in cx231xx_do_mode_ctrl_overrides()
1025 status = cx231xx_read_modify_write_i2c_dword(dev, in cx231xx_do_mode_ctrl_overrides()
1029 status = cx231xx_read_modify_write_i2c_dword(dev, in cx231xx_do_mode_ctrl_overrides()
1036 status = cx231xx_read_modify_write_i2c_dword(dev, in cx231xx_do_mode_ctrl_overrides()
1044 status = cx231xx_read_modify_write_i2c_dword(dev, in cx231xx_do_mode_ctrl_overrides()
1056 int cx231xx_unmute_audio(struct cx231xx *dev) in cx231xx_unmute_audio() argument
1058 return vid_blk_write_byte(dev, PATH1_VOL_CTL, 0x24); in cx231xx_unmute_audio()
1062 static int stopAudioFirmware(struct cx231xx *dev) in stopAudioFirmware() argument
1064 return vid_blk_write_byte(dev, DL_CTL_CONTROL, 0x03); in stopAudioFirmware()
1067 static int restartAudioFirmware(struct cx231xx *dev) in restartAudioFirmware() argument
1069 return vid_blk_write_byte(dev, DL_CTL_CONTROL, 0x13); in restartAudioFirmware()
1072 int cx231xx_set_audio_input(struct cx231xx *dev, u8 input) in cx231xx_set_audio_input() argument
1082 status = cx231xx_i2s_blk_set_audio_input(dev, input); in cx231xx_set_audio_input()
1089 status = cx231xx_set_audio_decoder_input(dev, ainput); in cx231xx_set_audio_input()
1094 int cx231xx_set_audio_decoder_input(struct cx231xx *dev, in cx231xx_set_audio_decoder_input() argument
1103 status = vid_blk_read_byte(dev, GENERAL_CTL, &gen_ctrl); in cx231xx_set_audio_decoder_input()
1105 status = vid_blk_write_byte(dev, GENERAL_CTL, gen_ctrl); in cx231xx_set_audio_decoder_input()
1112 status = vid_blk_write_word(dev, AUD_IO_CTRL, value); in cx231xx_set_audio_decoder_input()
1117 status = vid_blk_read_word(dev, AC97_CTL, &dwval); in cx231xx_set_audio_decoder_input()
1119 status = vid_blk_write_word(dev, AC97_CTL, in cx231xx_set_audio_decoder_input()
1123 status = vid_blk_write_word(dev, BAND_OUT_SEL, in cx231xx_set_audio_decoder_input()
1130 status = vid_blk_write_word(dev, DL_CTL, 0x3000001); in cx231xx_set_audio_decoder_input()
1131 status = vid_blk_write_word(dev, PATH1_CTL1, 0x00063073); in cx231xx_set_audio_decoder_input()
1134 status = vid_blk_read_word(dev, PATH1_VOL_CTL, &dwval); in cx231xx_set_audio_decoder_input()
1135 status = vid_blk_write_word(dev, PATH1_VOL_CTL, in cx231xx_set_audio_decoder_input()
1139 status = vid_blk_read_word(dev, PATH1_SC_CTL, &dwval); in cx231xx_set_audio_decoder_input()
1140 status = vid_blk_write_word(dev, PATH1_SC_CTL, in cx231xx_set_audio_decoder_input()
1146 status = stopAudioFirmware(dev); in cx231xx_set_audio_decoder_input()
1148 status = vid_blk_write_word(dev, BAND_OUT_SEL, in cx231xx_set_audio_decoder_input()
1164 status = vid_blk_write_word(dev, AUD_IO_CTRL, in cx231xx_set_audio_decoder_input()
1171 status = vid_blk_write_word(dev, PATH1_CTL1, 0x1F063870); in cx231xx_set_audio_decoder_input()
1174 status = vid_blk_write_word(dev, PATH1_CTL1, 0x00063870); in cx231xx_set_audio_decoder_input()
1176 status = restartAudioFirmware(dev); in cx231xx_set_audio_decoder_input()
1178 switch (dev->board.tuner_type) { in cx231xx_set_audio_decoder_input()
1181 status = cx231xx_read_modify_write_i2c_dword(dev, in cx231xx_set_audio_decoder_input()
1189 status = cx231xx_read_modify_write_i2c_dword(dev, in cx231xx_set_audio_decoder_input()
1199 dev_info(dev->dev, in cx231xx_set_audio_decoder_input()
1213 status = vid_blk_write_word(dev, PATH1_CTL1, 0x1F011012); in cx231xx_set_audio_decoder_input()
1218 status = vid_blk_read_byte(dev, GENERAL_CTL, &gen_ctrl); in cx231xx_set_audio_decoder_input()
1220 status = vid_blk_write_byte(dev, GENERAL_CTL, gen_ctrl); in cx231xx_set_audio_decoder_input()
1228 int cx231xx_init_ctrl_pin_status(struct cx231xx *dev) in cx231xx_init_ctrl_pin_status() argument
1233 status = vid_blk_read_word(dev, PIN_CTRL, &value); in cx231xx_init_ctrl_pin_status()
1234 value |= (~dev->board.ctl_pin_status_mask); in cx231xx_init_ctrl_pin_status()
1235 status = vid_blk_write_word(dev, PIN_CTRL, value); in cx231xx_init_ctrl_pin_status()
1240 int cx231xx_set_agc_analog_digital_mux_select(struct cx231xx *dev, in cx231xx_set_agc_analog_digital_mux_select() argument
1246 status = cx231xx_set_gpio_direction(dev, in cx231xx_set_agc_analog_digital_mux_select()
1247 dev->board. in cx231xx_set_agc_analog_digital_mux_select()
1251 status = cx231xx_set_gpio_value(dev, in cx231xx_set_agc_analog_digital_mux_select()
1252 dev->board.agc_analog_digital_select_gpio, in cx231xx_set_agc_analog_digital_mux_select()
1261 int cx231xx_enable_i2c_port_3(struct cx231xx *dev, bool is_port_3) in cx231xx_enable_i2c_port_3() argument
1274 status = cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, in cx231xx_enable_i2c_port_3()
1290 status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, in cx231xx_enable_i2c_port_3()
1295 dev->port_3_switch_enabled = is_port_3; in cx231xx_enable_i2c_port_3()
1302 void update_HH_register_after_set_DIF(struct cx231xx *dev) in update_HH_register_after_set_DIF() argument
1318 void cx231xx_dump_HH_reg(struct cx231xx *dev) in cx231xx_dump_HH_reg() argument
1324 vid_blk_write_word(dev, 0x104, value); in cx231xx_dump_HH_reg()
1327 vid_blk_read_word(dev, i, &value); in cx231xx_dump_HH_reg()
1328 dev_dbg(dev->dev, "reg0x%x=0x%x\n", i, value); in cx231xx_dump_HH_reg()
1333 vid_blk_read_word(dev, i, &value); in cx231xx_dump_HH_reg()
1334 dev_dbg(dev->dev, "reg0x%x=0x%x\n", i, value); in cx231xx_dump_HH_reg()
1339 vid_blk_read_word(dev, i, &value); in cx231xx_dump_HH_reg()
1340 dev_dbg(dev->dev, "reg0x%x=0x%x\n", i, value); in cx231xx_dump_HH_reg()
1344 vid_blk_read_word(dev, AFE_CTRL_C2HH_SRC_CTRL, &value); in cx231xx_dump_HH_reg()
1345 dev_dbg(dev->dev, "AFE_CTRL_C2HH_SRC_CTRL=0x%x\n", value); in cx231xx_dump_HH_reg()
1346 vid_blk_write_word(dev, AFE_CTRL_C2HH_SRC_CTRL, 0x4485D390); in cx231xx_dump_HH_reg()
1347 vid_blk_read_word(dev, AFE_CTRL_C2HH_SRC_CTRL, &value); in cx231xx_dump_HH_reg()
1348 dev_dbg(dev->dev, "AFE_CTRL_C2HH_SRC_CTRL=0x%x\n", value); in cx231xx_dump_HH_reg()
1352 static void cx231xx_dump_SC_reg(struct cx231xx *dev)
1355 dev_dbg(dev->dev, "%s!\n", __func__);
1357 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, BOARD_CFG_STAT,
1359 dev_dbg(dev->dev,
1362 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, TS_MODE_REG,
1364 dev_dbg(dev->dev,
1367 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, TS1_CFG_REG,
1369 dev_dbg(dev->dev,
1372 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, TS1_LENGTH_REG,
1374 dev_dbg(dev->dev,
1378 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, TS2_CFG_REG,
1380 dev_dbg(dev->dev,
1383 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, TS2_LENGTH_REG,
1385 dev_dbg(dev->dev,
1388 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, EP_MODE_SET,
1390 dev_dbg(dev->dev,
1393 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_PWR_PTN1,
1395 dev_dbg(dev->dev,
1399 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_PWR_PTN2,
1401 dev_dbg(dev->dev,
1404 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_PWR_PTN3,
1406 dev_dbg(dev->dev,
1409 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_PWR_MASK0,
1411 dev_dbg(dev->dev,
1414 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_PWR_MASK1,
1416 dev_dbg(dev->dev,
1420 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_PWR_MASK2,
1422 dev_dbg(dev->dev,
1425 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_GAIN,
1427 dev_dbg(dev->dev,
1430 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_CAR_REG,
1432 dev_dbg(dev->dev,
1435 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_OT_CFG1,
1437 dev_dbg(dev->dev,
1441 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_OT_CFG2,
1443 dev_dbg(dev->dev,
1446 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, PWR_CTL_EN,
1448 dev_dbg(dev->dev,
1454 void cx231xx_Setup_AFE_for_LowIF(struct cx231xx *dev) in cx231xx_Setup_AFE_for_LowIF() argument
1459 afe_read_byte(dev, ADC_STATUS2_CH3, &value); in cx231xx_Setup_AFE_for_LowIF()
1461 afe_write_byte(dev, ADC_STATUS2_CH3, value); in cx231xx_Setup_AFE_for_LowIF()
1463 afe_read_byte(dev, ADC_STATUS2_CH3, &value); in cx231xx_Setup_AFE_for_LowIF()
1465 afe_write_byte(dev, ADC_STATUS2_CH3, value); in cx231xx_Setup_AFE_for_LowIF()
1477 afe_read_byte(dev, ADC_NTF_PRECLMP_EN_CH3, &value); in cx231xx_Setup_AFE_for_LowIF()
1479 afe_write_byte(dev, ADC_NTF_PRECLMP_EN_CH3, value); in cx231xx_Setup_AFE_for_LowIF()
1481 afe_read_byte(dev, ADC_INPUT_CH3, &value); in cx231xx_Setup_AFE_for_LowIF()
1483 afe_write_byte(dev, ADC_INPUT_CH3, value); in cx231xx_Setup_AFE_for_LowIF()
1485 afe_read_byte(dev, ADC_FB_FRCRST_CH3, &value); in cx231xx_Setup_AFE_for_LowIF()
1487 afe_write_byte(dev, ADC_FB_FRCRST_CH3, value); in cx231xx_Setup_AFE_for_LowIF()
1489 afe_read_byte(dev, ADC_DCSERVO_DEM_CH3, &value); in cx231xx_Setup_AFE_for_LowIF()
1491 afe_write_byte(dev, ADC_DCSERVO_DEM_CH3, value); in cx231xx_Setup_AFE_for_LowIF()
1493 afe_read_byte(dev, ADC_CTRL_DAC1_CH3, &value); in cx231xx_Setup_AFE_for_LowIF()
1495 afe_write_byte(dev, ADC_CTRL_DAC1_CH3, value); in cx231xx_Setup_AFE_for_LowIF()
1497 afe_read_byte(dev, ADC_CTRL_DAC23_CH3, &value); in cx231xx_Setup_AFE_for_LowIF()
1499 afe_write_byte(dev, ADC_CTRL_DAC23_CH3, value); in cx231xx_Setup_AFE_for_LowIF()
1501 afe_read_byte(dev, ADC_CTRL_DAC23_CH3, &value); in cx231xx_Setup_AFE_for_LowIF()
1503 afe_write_byte(dev, ADC_CTRL_DAC23_CH3, value); in cx231xx_Setup_AFE_for_LowIF()
1505 afe_read_byte(dev, ADC_PWRDN_CLAMP_CH3, &value); in cx231xx_Setup_AFE_for_LowIF()
1507 afe_write_byte(dev, ADC_PWRDN_CLAMP_CH3, value); in cx231xx_Setup_AFE_for_LowIF()
1510 void cx231xx_set_Colibri_For_LowIF(struct cx231xx *dev, u32 if_freq, in cx231xx_set_Colibri_For_LowIF() argument
1518 dev_dbg(dev->dev, "Enter cx231xx_set_Colibri_For_LowIF()\n"); in cx231xx_set_Colibri_For_LowIF()
1523 cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, in cx231xx_set_Colibri_For_LowIF()
1527 cx231xx_afe_set_mode(dev, AFE_MODE_LOW_IF); in cx231xx_set_Colibri_For_LowIF()
1530 standard = dev->norm; in cx231xx_set_Colibri_For_LowIF()
1531 cx231xx_dif_configure_C2HH_for_low_IF(dev, dev->active_mode, in cx231xx_set_Colibri_For_LowIF()
1538 dev_dbg(dev->dev, "colibri_carrier_offset=%d, standard=0x%x\n", in cx231xx_set_Colibri_For_LowIF()
1542 cx231xx_set_DIF_bandpass(dev, (if_freq+colibri_carrier_offset), in cx231xx_set_Colibri_For_LowIF()
1564 void cx231xx_set_DIF_bandpass(struct cx231xx *dev, u32 if_freq, in cx231xx_set_DIF_bandpass() argument
1572 dev_dbg(dev->dev, "if_freq=%d;spectral_invert=0x%x;mode=0x%x\n", in cx231xx_set_DIF_bandpass()
1578 vid_blk_write_word(dev, DIF_PLL_FREQ_WORD, pll_freq_word); in cx231xx_set_DIF_bandpass()
1587 vid_blk_write_word(dev, DIF_PLL_FREQ_WORD, pll_freq_word); in cx231xx_set_DIF_bandpass()
1592 vid_blk_read_word(dev, DIF_MISC_CTRL, in cx231xx_set_DIF_bandpass()
1595 vid_blk_write_word(dev, DIF_MISC_CTRL, in cx231xx_set_DIF_bandpass()
1600 vid_blk_read_word(dev, DIF_MISC_CTRL, in cx231xx_set_DIF_bandpass()
1603 vid_blk_write_word(dev, DIF_MISC_CTRL, in cx231xx_set_DIF_bandpass()
1616 dev_dbg(dev->dev, "Enter IF=%zu\n", ARRAY_SIZE(Dif_set_array)); in cx231xx_set_DIF_bandpass()
1619 vid_blk_write_word(dev, in cx231xx_set_DIF_bandpass()
1628 int cx231xx_dif_configure_C2HH_for_low_IF(struct cx231xx *dev, u32 mode, in cx231xx_dif_configure_C2HH_for_low_IF() argument
1637 status = cx231xx_reg_mask_write(dev, in cx231xx_dif_configure_C2HH_for_low_IF()
1641 status = cx231xx_reg_mask_write(dev, in cx231xx_dif_configure_C2HH_for_low_IF()
1645 status = cx231xx_reg_mask_write(dev, in cx231xx_dif_configure_C2HH_for_low_IF()
1649 status = cx231xx_reg_mask_write(dev, in cx231xx_dif_configure_C2HH_for_low_IF()
1655 status = cx231xx_reg_mask_write(dev, in cx231xx_dif_configure_C2HH_for_low_IF()
1659 status = cx231xx_reg_mask_write(dev, in cx231xx_dif_configure_C2HH_for_low_IF()
1664 status = cx231xx_reg_mask_write(dev, in cx231xx_dif_configure_C2HH_for_low_IF()
1668 status = cx231xx_reg_mask_write(dev, in cx231xx_dif_configure_C2HH_for_low_IF()
1672 status = cx231xx_reg_mask_write(dev, in cx231xx_dif_configure_C2HH_for_low_IF()
1680 status = cx231xx_reg_mask_write(dev, in cx231xx_dif_configure_C2HH_for_low_IF()
1684 status = cx231xx_reg_mask_write(dev, in cx231xx_dif_configure_C2HH_for_low_IF()
1689 status = cx231xx_reg_mask_write(dev, in cx231xx_dif_configure_C2HH_for_low_IF()
1693 status = cx231xx_reg_mask_write(dev, in cx231xx_dif_configure_C2HH_for_low_IF()
1700 status = cx231xx_reg_mask_write(dev, in cx231xx_dif_configure_C2HH_for_low_IF()
1704 status = cx231xx_reg_mask_write(dev, in cx231xx_dif_configure_C2HH_for_low_IF()
1709 status = cx231xx_reg_mask_write(dev, in cx231xx_dif_configure_C2HH_for_low_IF()
1713 status = cx231xx_reg_mask_write(dev, in cx231xx_dif_configure_C2HH_for_low_IF()
1722 int cx231xx_dif_set_standard(struct cx231xx *dev, u32 standard) in cx231xx_dif_set_standard() argument
1728 dev_dbg(dev->dev, "%s: setStandard to %x\n", __func__, standard); in cx231xx_dif_set_standard()
1730 status = vid_blk_read_word(dev, DIF_MISC_CTRL, &dif_misc_ctrl_value); in cx231xx_dif_set_standard()
1732 dev->norm = standard; in cx231xx_dif_set_standard()
1734 switch (dev->model) { in cx231xx_dif_set_standard()
1754 status = cx231xx_dif_configure_C2HH_for_low_IF(dev, dev->active_mode, in cx231xx_dif_set_standard()
1760 status = vid_blk_write_word(dev, DIF_SRC_PHASE_INC, 0xDF7DF83); in cx231xx_dif_set_standard()
1761 status = vid_blk_read_word(dev, DIF_MISC_CTRL, in cx231xx_dif_set_standard()
1764 status = vid_blk_write_word(dev, DIF_MISC_CTRL, in cx231xx_dif_set_standard()
1767 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1769 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1771 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1773 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1775 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1777 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1779 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1781 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1783 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1786 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1789 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1792 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1795 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1797 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1800 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1803 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1806 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1812 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1814 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1816 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1818 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1820 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1822 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1824 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1826 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1828 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1831 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1834 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1837 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1840 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1842 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1845 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1848 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1851 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1858 status = vid_blk_write_word(dev, DIF_PLL_CTRL, 0xFF01FF0C); in cx231xx_dif_set_standard()
1859 status = vid_blk_write_word(dev, DIF_PLL_CTRL1, 0xbd038c85); in cx231xx_dif_set_standard()
1860 status = vid_blk_write_word(dev, DIF_PLL_CTRL2, 0x1db4640a); in cx231xx_dif_set_standard()
1861 status = vid_blk_write_word(dev, DIF_PLL_CTRL3, 0x00008800); in cx231xx_dif_set_standard()
1862 status = vid_blk_write_word(dev, DIF_AGC_IF_REF, 0x444C1380); in cx231xx_dif_set_standard()
1863 status = vid_blk_write_word(dev, DIF_AGC_IF_INT_CURRENT, in cx231xx_dif_set_standard()
1865 status = vid_blk_write_word(dev, DIF_AGC_RF_CURRENT, in cx231xx_dif_set_standard()
1867 status = vid_blk_write_word(dev, DIF_VIDEO_AGC_CTRL, in cx231xx_dif_set_standard()
1869 status = vid_blk_write_word(dev, DIF_VID_AUD_OVERRIDE, in cx231xx_dif_set_standard()
1871 status = vid_blk_write_word(dev, DIF_AV_SEP_CTRL, 0x012c405d); in cx231xx_dif_set_standard()
1872 status = vid_blk_write_word(dev, DIF_COMP_FLT_CTRL, in cx231xx_dif_set_standard()
1874 status = vid_blk_write_word(dev, DIF_SRC_PHASE_INC, in cx231xx_dif_set_standard()
1876 status = vid_blk_write_word(dev, DIF_SRC_GAIN_CONTROL, in cx231xx_dif_set_standard()
1878 status = vid_blk_write_word(dev, DIF_SOFT_RST_CTRL_REVB, in cx231xx_dif_set_standard()
1885 status = vid_blk_write_word(dev, DIF_PLL_CTRL, 0xFF01FF0C); in cx231xx_dif_set_standard()
1886 status = vid_blk_write_word(dev, DIF_PLL_CTRL1, 0xbd038c85); in cx231xx_dif_set_standard()
1887 status = vid_blk_write_word(dev, DIF_PLL_CTRL2, 0x1db4640a); in cx231xx_dif_set_standard()
1888 status = vid_blk_write_word(dev, DIF_PLL_CTRL3, 0x00008800); in cx231xx_dif_set_standard()
1889 status = vid_blk_write_word(dev, DIF_AGC_IF_REF, 0x444C1380); in cx231xx_dif_set_standard()
1890 status = vid_blk_write_word(dev, DIF_AGC_IF_INT_CURRENT, in cx231xx_dif_set_standard()
1892 status = vid_blk_write_word(dev, DIF_AGC_RF_CURRENT, in cx231xx_dif_set_standard()
1894 status = vid_blk_write_word(dev, DIF_VIDEO_AGC_CTRL, in cx231xx_dif_set_standard()
1896 status = vid_blk_write_word(dev, DIF_VID_AUD_OVERRIDE, in cx231xx_dif_set_standard()
1898 status = vid_blk_write_word(dev, DIF_AV_SEP_CTRL, in cx231xx_dif_set_standard()
1900 status = vid_blk_write_word(dev, DIF_COMP_FLT_CTRL, in cx231xx_dif_set_standard()
1902 status = vid_blk_write_word(dev, DIF_SRC_PHASE_INC, in cx231xx_dif_set_standard()
1904 status = vid_blk_write_word(dev, DIF_SRC_GAIN_CONTROL, in cx231xx_dif_set_standard()
1906 status = vid_blk_write_word(dev, DIF_SOFT_RST_CTRL_REVB, in cx231xx_dif_set_standard()
1915 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1917 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1919 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1921 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1923 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1925 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1927 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1929 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1931 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1934 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1937 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1940 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1942 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1945 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1948 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1951 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1953 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1962 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1964 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1966 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1968 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1970 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1972 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1974 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1976 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1978 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1981 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1984 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1987 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1989 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1992 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1995 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1998 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
2000 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
2018 status = vid_blk_write_word(dev, DIF_PLL_CTRL, 0x6503BC0C); in cx231xx_dif_set_standard()
2019 status = vid_blk_write_word(dev, DIF_PLL_CTRL1, 0xBD038C85); in cx231xx_dif_set_standard()
2020 status = vid_blk_write_word(dev, DIF_PLL_CTRL2, 0x1DB4640A); in cx231xx_dif_set_standard()
2021 status = vid_blk_write_word(dev, DIF_PLL_CTRL3, 0x00008800); in cx231xx_dif_set_standard()
2022 status = vid_blk_write_word(dev, DIF_AGC_IF_REF, 0x444C0380); in cx231xx_dif_set_standard()
2023 status = vid_blk_write_word(dev, DIF_AGC_IF_INT_CURRENT, in cx231xx_dif_set_standard()
2025 status = vid_blk_write_word(dev, DIF_AGC_RF_CURRENT, in cx231xx_dif_set_standard()
2027 status = vid_blk_write_word(dev, DIF_VIDEO_AGC_CTRL, in cx231xx_dif_set_standard()
2029 status = vid_blk_write_word(dev, DIF_VID_AUD_OVERRIDE, in cx231xx_dif_set_standard()
2031 status = vid_blk_write_word(dev, DIF_AV_SEP_CTRL, 0x01296e1f); in cx231xx_dif_set_standard()
2033 status = vid_blk_write_word(dev, DIF_COMP_FLT_CTRL, in cx231xx_dif_set_standard()
2035 status = vid_blk_write_word(dev, DIF_SRC_PHASE_INC, in cx231xx_dif_set_standard()
2037 status = vid_blk_write_word(dev, DIF_SRC_GAIN_CONTROL, in cx231xx_dif_set_standard()
2040 status = vid_blk_write_word(dev, DIF_AGC_CTRL_IF, 0xC2262600); in cx231xx_dif_set_standard()
2041 status = vid_blk_write_word(dev, DIF_AGC_CTRL_INT, in cx231xx_dif_set_standard()
2043 status = vid_blk_write_word(dev, DIF_AGC_CTRL_RF, 0xC2262600); in cx231xx_dif_set_standard()
2050 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
2052 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
2054 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
2056 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
2058 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
2060 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
2062 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
2064 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
2066 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
2069 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
2072 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
2075 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
2078 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
2080 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
2083 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
2086 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
2089 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
2103 if (dev->active_mode == V4L2_TUNER_RADIO) in cx231xx_dif_set_standard()
2107 status = vid_blk_write_word(dev, DIF_MISC_CTRL, dif_misc_ctrl_value); in cx231xx_dif_set_standard()
2112 int cx231xx_tuner_pre_channel_change(struct cx231xx *dev) in cx231xx_tuner_pre_channel_change() argument
2118 status = vid_blk_read_word(dev, DIF_AGC_IF_REF, &dwval); in cx231xx_tuner_pre_channel_change()
2122 status = vid_blk_write_word(dev, DIF_AGC_IF_REF, dwval); in cx231xx_tuner_pre_channel_change()
2127 int cx231xx_tuner_post_channel_change(struct cx231xx *dev) in cx231xx_tuner_post_channel_change() argument
2131 dev_dbg(dev->dev, "%s: dev->tuner_type =0%d\n", in cx231xx_tuner_post_channel_change()
2132 __func__, dev->tuner_type); in cx231xx_tuner_post_channel_change()
2135 status = vid_blk_read_word(dev, DIF_AGC_IF_REF, &dwval); in cx231xx_tuner_post_channel_change()
2138 if (dev->norm & (V4L2_STD_SECAM_L | V4L2_STD_SECAM_B | in cx231xx_tuner_post_channel_change()
2140 if (dev->tuner_type == TUNER_NXP_TDA18271) { in cx231xx_tuner_post_channel_change()
2146 if (dev->tuner_type == TUNER_NXP_TDA18271) { in cx231xx_tuner_post_channel_change()
2153 status = vid_blk_write_word(dev, DIF_AGC_IF_REF, dwval); in cx231xx_tuner_post_channel_change()
2161 int cx231xx_i2s_blk_initialize(struct cx231xx *dev) in cx231xx_i2s_blk_initialize() argument
2166 status = cx231xx_read_i2c_data(dev, I2S_BLK_DEVICE_ADDRESS, in cx231xx_i2s_blk_initialize()
2170 status = cx231xx_write_i2c_data(dev, I2S_BLK_DEVICE_ADDRESS, in cx231xx_i2s_blk_initialize()
2173 status = cx231xx_write_i2c_data(dev, I2S_BLK_DEVICE_ADDRESS, in cx231xx_i2s_blk_initialize()
2179 int cx231xx_i2s_blk_update_power_control(struct cx231xx *dev, in cx231xx_i2s_blk_update_power_control() argument
2186 status = cx231xx_read_i2c_data(dev, I2S_BLK_DEVICE_ADDRESS, in cx231xx_i2s_blk_update_power_control()
2189 status = cx231xx_write_i2c_data(dev, I2S_BLK_DEVICE_ADDRESS, in cx231xx_i2s_blk_update_power_control()
2192 status = cx231xx_write_i2c_data(dev, I2S_BLK_DEVICE_ADDRESS, in cx231xx_i2s_blk_update_power_control()
2200 int cx231xx_i2s_blk_set_audio_input(struct cx231xx *dev, u8 audio_input) in cx231xx_i2s_blk_set_audio_input() argument
2206 status = cx231xx_write_i2c_data(dev, I2S_BLK_DEVICE_ADDRESS, in cx231xx_i2s_blk_set_audio_input()
2208 status = cx231xx_write_i2c_data(dev, I2S_BLK_DEVICE_ADDRESS, in cx231xx_i2s_blk_set_audio_input()
2216 dev->ctl_ainput = audio_input; in cx231xx_i2s_blk_set_audio_input()
2224 int cx231xx_set_power_mode(struct cx231xx *dev, enum AV_MODE mode) in cx231xx_set_power_mode() argument
2230 if (dev->power_mode != mode) in cx231xx_set_power_mode()
2231 dev->power_mode = mode; in cx231xx_set_power_mode()
2233 dev_dbg(dev->dev, "%s: mode = %d, No Change req.\n", in cx231xx_set_power_mode()
2238 status = cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, PWR_CTL_EN, value, in cx231xx_set_power_mode()
2255 status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, in cx231xx_set_power_mode()
2265 cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, PWR_CTL_EN, in cx231xx_set_power_mode()
2274 status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, in cx231xx_set_power_mode()
2278 dev->xc_fw_load_done = 0; in cx231xx_set_power_mode()
2288 status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, in cx231xx_set_power_mode()
2298 status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, in cx231xx_set_power_mode()
2309 status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, in cx231xx_set_power_mode()
2319 status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, in cx231xx_set_power_mode()
2330 status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, in cx231xx_set_power_mode()
2335 if (dev->board.tuner_type != TUNER_ABSENT) { in cx231xx_set_power_mode()
2337 if (dev->board.tuner_gpio) in cx231xx_set_power_mode()
2338 cx231xx_gpio_set(dev, dev->board.tuner_gpio); in cx231xx_set_power_mode()
2340 if (dev->cx231xx_reset_analog_tuner) in cx231xx_set_power_mode()
2341 dev->cx231xx_reset_analog_tuner(dev); in cx231xx_set_power_mode()
2353 status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, in cx231xx_set_power_mode()
2363 status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, in cx231xx_set_power_mode()
2373 status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, in cx231xx_set_power_mode()
2384 status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, in cx231xx_set_power_mode()
2394 status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, in cx231xx_set_power_mode()
2399 if (dev->board.tuner_type != TUNER_ABSENT) { in cx231xx_set_power_mode()
2401 if (dev->board.tuner_gpio) in cx231xx_set_power_mode()
2402 cx231xx_gpio_set(dev, dev->board.tuner_gpio); in cx231xx_set_power_mode()
2404 if (dev->cx231xx_reset_analog_tuner) in cx231xx_set_power_mode()
2405 dev->cx231xx_reset_analog_tuner(dev); in cx231xx_set_power_mode()
2423 status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, in cx231xx_set_power_mode()
2429 status = cx231xx_afe_update_power_control(dev, mode); in cx231xx_set_power_mode()
2432 status = cx231xx_i2s_blk_update_power_control(dev, mode); in cx231xx_set_power_mode()
2434 status = cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, PWR_CTL_EN, value, in cx231xx_set_power_mode()
2440 int cx231xx_power_suspend(struct cx231xx *dev) in cx231xx_power_suspend() argument
2446 status = cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, PWR_CTL_EN, in cx231xx_power_suspend()
2458 status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, PWR_CTL_EN, in cx231xx_power_suspend()
2467 int cx231xx_start_stream(struct cx231xx *dev, u32 ep_mask) in cx231xx_start_stream() argument
2473 dev_dbg(dev->dev, "%s: ep_mask = %x\n", __func__, ep_mask); in cx231xx_start_stream()
2474 status = cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, EP_MODE_SET, in cx231xx_start_stream()
2486 status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, EP_MODE_SET, in cx231xx_start_stream()
2492 int cx231xx_stop_stream(struct cx231xx *dev, u32 ep_mask) in cx231xx_stop_stream() argument
2498 dev_dbg(dev->dev, "%s: ep_mask = %x\n", __func__, ep_mask); in cx231xx_stop_stream()
2500 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, EP_MODE_SET, value, 4); in cx231xx_stop_stream()
2511 status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, EP_MODE_SET, in cx231xx_stop_stream()
2517 int cx231xx_initialize_stream_xfer(struct cx231xx *dev, u32 media_type) in cx231xx_initialize_stream_xfer() argument
2523 if (dev->udev->speed == USB_SPEED_HIGH) { in cx231xx_initialize_stream_xfer()
2526 dev_dbg(dev->dev, in cx231xx_initialize_stream_xfer()
2529 cx231xx_mode_register(dev, TS_MODE_REG, 0x9300); in cx231xx_initialize_stream_xfer()
2533 dev_dbg(dev->dev, in cx231xx_initialize_stream_xfer()
2535 status = cx231xx_mode_register(dev, TS_MODE_REG, 0x300); in cx231xx_initialize_stream_xfer()
2539 dev_dbg(dev->dev, in cx231xx_initialize_stream_xfer()
2542 cx231xx_mode_register(dev, TS_MODE_REG, 0x1300); in cx231xx_initialize_stream_xfer()
2546 dev_dbg(dev->dev, in cx231xx_initialize_stream_xfer()
2548 status = cx231xx_mode_register(dev, TS_MODE_REG, 0x100); in cx231xx_initialize_stream_xfer()
2552 dev_dbg(dev->dev, in cx231xx_initialize_stream_xfer()
2555 if (dev->board.has_417) { in cx231xx_initialize_stream_xfer()
2556 dev_dbg(dev->dev, in cx231xx_initialize_stream_xfer()
2561 status = cx231xx_mode_register(dev, in cx231xx_initialize_stream_xfer()
2568 status = cx231xx_write_ctrl_reg(dev, in cx231xx_initialize_stream_xfer()
2576 status = cx231xx_write_ctrl_reg(dev, in cx231xx_initialize_stream_xfer()
2580 dev_dbg(dev->dev, "%s: BDA\n", __func__); in cx231xx_initialize_stream_xfer()
2581 status = cx231xx_mode_register(dev, in cx231xx_initialize_stream_xfer()
2583 status = cx231xx_mode_register(dev, in cx231xx_initialize_stream_xfer()
2589 dev_dbg(dev->dev, in cx231xx_initialize_stream_xfer()
2592 status = cx231xx_mode_register(dev, TS_MODE_REG, 0x100); in cx231xx_initialize_stream_xfer()
2593 status = cx231xx_mode_register(dev, TS1_CFG_REG, 0x400); in cx231xx_initialize_stream_xfer()
2597 status = cx231xx_mode_register(dev, TS_MODE_REG, 0x101); in cx231xx_initialize_stream_xfer()
2603 int cx231xx_capture_start(struct cx231xx *dev, int start, u8 media_type) in cx231xx_capture_start() argument
2610 pcb_config = (struct pcb_config *)&dev->current_pcb_config; in cx231xx_capture_start()
2637 rc = cx231xx_initialize_stream_xfer(dev, media_type); in cx231xx_capture_start()
2644 rc = cx231xx_start_stream(dev, ep_mask); in cx231xx_capture_start()
2648 rc = cx231xx_stop_stream(dev, ep_mask); in cx231xx_capture_start()
2658 static int cx231xx_set_gpio_bit(struct cx231xx *dev, u32 gpio_bit, u32 gpio_val) in cx231xx_set_gpio_bit() argument
2663 status = cx231xx_send_gpio_cmd(dev, gpio_bit, (u8 *)&gpio_val, 4, 0, 0); in cx231xx_set_gpio_bit()
2668 static int cx231xx_get_gpio_bit(struct cx231xx *dev, u32 gpio_bit, u32 *gpio_val) in cx231xx_get_gpio_bit() argument
2673 status = cx231xx_send_gpio_cmd(dev, gpio_bit, (u8 *)&tmp, 4, 0, 1); in cx231xx_get_gpio_bit()
2690 int cx231xx_set_gpio_direction(struct cx231xx *dev, in cx231xx_set_gpio_direction() argument
2702 value = dev->gpio_dir & (~(1 << pin_number)); /* clear */ in cx231xx_set_gpio_direction()
2704 value = dev->gpio_dir | (1 << pin_number); in cx231xx_set_gpio_direction()
2706 status = cx231xx_set_gpio_bit(dev, value, dev->gpio_val); in cx231xx_set_gpio_direction()
2709 dev->gpio_dir = value; in cx231xx_set_gpio_direction()
2725 int cx231xx_set_gpio_value(struct cx231xx *dev, int pin_number, int pin_value) in cx231xx_set_gpio_value() argument
2735 if ((dev->gpio_dir & (1 << pin_number)) == 0x00) { in cx231xx_set_gpio_value()
2737 value = dev->gpio_dir | (1 << pin_number); in cx231xx_set_gpio_value()
2738 dev->gpio_dir = value; in cx231xx_set_gpio_value()
2739 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, in cx231xx_set_gpio_value()
2740 dev->gpio_val); in cx231xx_set_gpio_value()
2745 value = dev->gpio_val & (~(1 << pin_number)); in cx231xx_set_gpio_value()
2747 value = dev->gpio_val | (1 << pin_number); in cx231xx_set_gpio_value()
2750 dev->gpio_val = value; in cx231xx_set_gpio_value()
2753 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val); in cx231xx_set_gpio_value()
2761 int cx231xx_gpio_i2c_start(struct cx231xx *dev) in cx231xx_gpio_i2c_start() argument
2766 dev->gpio_dir |= 1 << dev->board.tuner_scl_gpio; in cx231xx_gpio_i2c_start()
2767 dev->gpio_dir |= 1 << dev->board.tuner_sda_gpio; in cx231xx_gpio_i2c_start()
2768 dev->gpio_val |= 1 << dev->board.tuner_scl_gpio; in cx231xx_gpio_i2c_start()
2769 dev->gpio_val |= 1 << dev->board.tuner_sda_gpio; in cx231xx_gpio_i2c_start()
2771 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val); in cx231xx_gpio_i2c_start()
2776 dev->gpio_val |= 1 << dev->board.tuner_scl_gpio; in cx231xx_gpio_i2c_start()
2777 dev->gpio_val &= ~(1 << dev->board.tuner_sda_gpio); in cx231xx_gpio_i2c_start()
2779 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val); in cx231xx_gpio_i2c_start()
2784 dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio); in cx231xx_gpio_i2c_start()
2785 dev->gpio_val &= ~(1 << dev->board.tuner_sda_gpio); in cx231xx_gpio_i2c_start()
2787 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val); in cx231xx_gpio_i2c_start()
2794 int cx231xx_gpio_i2c_end(struct cx231xx *dev) in cx231xx_gpio_i2c_end() argument
2799 dev->gpio_dir |= 1 << dev->board.tuner_scl_gpio; in cx231xx_gpio_i2c_end()
2800 dev->gpio_dir |= 1 << dev->board.tuner_sda_gpio; in cx231xx_gpio_i2c_end()
2802 dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio); in cx231xx_gpio_i2c_end()
2803 dev->gpio_val &= ~(1 << dev->board.tuner_sda_gpio); in cx231xx_gpio_i2c_end()
2805 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val); in cx231xx_gpio_i2c_end()
2810 dev->gpio_val |= 1 << dev->board.tuner_scl_gpio; in cx231xx_gpio_i2c_end()
2811 dev->gpio_val &= ~(1 << dev->board.tuner_sda_gpio); in cx231xx_gpio_i2c_end()
2813 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val); in cx231xx_gpio_i2c_end()
2819 dev->gpio_dir &= ~(1 << dev->board.tuner_scl_gpio); in cx231xx_gpio_i2c_end()
2820 dev->gpio_dir &= ~(1 << dev->board.tuner_sda_gpio); in cx231xx_gpio_i2c_end()
2823 cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val); in cx231xx_gpio_i2c_end()
2830 int cx231xx_gpio_i2c_write_byte(struct cx231xx *dev, u8 data) in cx231xx_gpio_i2c_write_byte() argument
2836 dev->gpio_dir |= 1 << dev->board.tuner_scl_gpio; in cx231xx_gpio_i2c_write_byte()
2837 dev->gpio_dir |= 1 << dev->board.tuner_sda_gpio; in cx231xx_gpio_i2c_write_byte()
2842 dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio); in cx231xx_gpio_i2c_write_byte()
2843 dev->gpio_val &= ~(1 << dev->board.tuner_sda_gpio); in cx231xx_gpio_i2c_write_byte()
2844 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, in cx231xx_gpio_i2c_write_byte()
2845 dev->gpio_val); in cx231xx_gpio_i2c_write_byte()
2848 dev->gpio_val |= 1 << dev->board.tuner_scl_gpio; in cx231xx_gpio_i2c_write_byte()
2849 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, in cx231xx_gpio_i2c_write_byte()
2850 dev->gpio_val); in cx231xx_gpio_i2c_write_byte()
2853 dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio); in cx231xx_gpio_i2c_write_byte()
2854 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, in cx231xx_gpio_i2c_write_byte()
2855 dev->gpio_val); in cx231xx_gpio_i2c_write_byte()
2858 dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio); in cx231xx_gpio_i2c_write_byte()
2859 dev->gpio_val |= 1 << dev->board.tuner_sda_gpio; in cx231xx_gpio_i2c_write_byte()
2860 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, in cx231xx_gpio_i2c_write_byte()
2861 dev->gpio_val); in cx231xx_gpio_i2c_write_byte()
2864 dev->gpio_val |= 1 << dev->board.tuner_scl_gpio; in cx231xx_gpio_i2c_write_byte()
2865 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, in cx231xx_gpio_i2c_write_byte()
2866 dev->gpio_val); in cx231xx_gpio_i2c_write_byte()
2869 dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio); in cx231xx_gpio_i2c_write_byte()
2870 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, in cx231xx_gpio_i2c_write_byte()
2871 dev->gpio_val); in cx231xx_gpio_i2c_write_byte()
2877 int cx231xx_gpio_i2c_read_byte(struct cx231xx *dev, u8 *buf) in cx231xx_gpio_i2c_read_byte() argument
2888 dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio); in cx231xx_gpio_i2c_read_byte()
2889 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, in cx231xx_gpio_i2c_read_byte()
2890 dev->gpio_val); in cx231xx_gpio_i2c_read_byte()
2893 dev->gpio_val |= 1 << dev->board.tuner_scl_gpio; in cx231xx_gpio_i2c_read_byte()
2894 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, in cx231xx_gpio_i2c_read_byte()
2895 dev->gpio_val); in cx231xx_gpio_i2c_read_byte()
2898 gpio_logic_value = dev->gpio_val; in cx231xx_gpio_i2c_read_byte()
2899 status = cx231xx_get_gpio_bit(dev, dev->gpio_dir, in cx231xx_gpio_i2c_read_byte()
2900 &dev->gpio_val); in cx231xx_gpio_i2c_read_byte()
2901 if ((dev->gpio_val & (1 << dev->board.tuner_sda_gpio)) != 0) in cx231xx_gpio_i2c_read_byte()
2904 dev->gpio_val = gpio_logic_value; in cx231xx_gpio_i2c_read_byte()
2910 dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio); in cx231xx_gpio_i2c_read_byte()
2911 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val); in cx231xx_gpio_i2c_read_byte()
2919 int cx231xx_gpio_i2c_read_ack(struct cx231xx *dev) in cx231xx_gpio_i2c_read_ack() argument
2928 dev->gpio_dir &= ~(1 << dev->board.tuner_sda_gpio); in cx231xx_gpio_i2c_read_ack()
2929 dev->gpio_dir &= ~(1 << dev->board.tuner_scl_gpio); in cx231xx_gpio_i2c_read_ack()
2931 gpio_logic_value = dev->gpio_val; in cx231xx_gpio_i2c_read_ack()
2932 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val); in cx231xx_gpio_i2c_read_ack()
2936 status = cx231xx_get_gpio_bit(dev, dev->gpio_dir, in cx231xx_gpio_i2c_read_ack()
2937 &dev->gpio_val); in cx231xx_gpio_i2c_read_ack()
2939 } while (((dev->gpio_val & in cx231xx_gpio_i2c_read_ack()
2940 (1 << dev->board.tuner_scl_gpio)) == 0) && in cx231xx_gpio_i2c_read_ack()
2944 dev_dbg(dev->dev, in cx231xx_gpio_i2c_read_ack()
2953 status = cx231xx_get_gpio_bit(dev, dev->gpio_dir, &dev->gpio_val); in cx231xx_gpio_i2c_read_ack()
2955 if ((dev->gpio_val & 1 << dev->board.tuner_sda_gpio) == 0) { in cx231xx_gpio_i2c_read_ack()
2956 dev->gpio_val = gpio_logic_value; in cx231xx_gpio_i2c_read_ack()
2957 dev->gpio_val &= ~(1 << dev->board.tuner_sda_gpio); in cx231xx_gpio_i2c_read_ack()
2960 dev->gpio_val = gpio_logic_value; in cx231xx_gpio_i2c_read_ack()
2961 dev->gpio_val |= (1 << dev->board.tuner_sda_gpio); in cx231xx_gpio_i2c_read_ack()
2966 dev->gpio_val = gpio_logic_value; in cx231xx_gpio_i2c_read_ack()
2967 dev->gpio_dir |= (1 << dev->board.tuner_scl_gpio); in cx231xx_gpio_i2c_read_ack()
2968 dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio); in cx231xx_gpio_i2c_read_ack()
2969 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val); in cx231xx_gpio_i2c_read_ack()
2974 int cx231xx_gpio_i2c_write_ack(struct cx231xx *dev) in cx231xx_gpio_i2c_write_ack() argument
2979 dev->gpio_dir |= 1 << dev->board.tuner_sda_gpio; in cx231xx_gpio_i2c_write_ack()
2980 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val); in cx231xx_gpio_i2c_write_ack()
2983 dev->gpio_val &= ~(1 << dev->board.tuner_sda_gpio); in cx231xx_gpio_i2c_write_ack()
2984 dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio); in cx231xx_gpio_i2c_write_ack()
2985 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val); in cx231xx_gpio_i2c_write_ack()
2988 dev->gpio_val |= 1 << dev->board.tuner_scl_gpio; in cx231xx_gpio_i2c_write_ack()
2989 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val); in cx231xx_gpio_i2c_write_ack()
2992 dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio); in cx231xx_gpio_i2c_write_ack()
2993 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val); in cx231xx_gpio_i2c_write_ack()
2996 dev->gpio_dir &= ~(1 << dev->board.tuner_sda_gpio); in cx231xx_gpio_i2c_write_ack()
2997 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val); in cx231xx_gpio_i2c_write_ack()
3002 int cx231xx_gpio_i2c_write_nak(struct cx231xx *dev) in cx231xx_gpio_i2c_write_nak() argument
3007 dev->gpio_dir |= 1 << dev->board.tuner_scl_gpio; in cx231xx_gpio_i2c_write_nak()
3008 dev->gpio_dir &= ~(1 << dev->board.tuner_sda_gpio); in cx231xx_gpio_i2c_write_nak()
3009 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val); in cx231xx_gpio_i2c_write_nak()
3012 dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio); in cx231xx_gpio_i2c_write_nak()
3013 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val); in cx231xx_gpio_i2c_write_nak()
3016 dev->gpio_val |= 1 << dev->board.tuner_scl_gpio; in cx231xx_gpio_i2c_write_nak()
3017 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val); in cx231xx_gpio_i2c_write_nak()
3028 int cx231xx_gpio_i2c_read(struct cx231xx *dev, u8 dev_addr, u8 *buf, u8 len) in cx231xx_gpio_i2c_read() argument
3034 mutex_lock(&dev->gpio_i2c_lock); in cx231xx_gpio_i2c_read()
3037 status = cx231xx_gpio_i2c_start(dev); in cx231xx_gpio_i2c_read()
3040 status = cx231xx_gpio_i2c_write_byte(dev, (dev_addr << 1) + 1); in cx231xx_gpio_i2c_read()
3043 status = cx231xx_gpio_i2c_read_ack(dev); in cx231xx_gpio_i2c_read()
3049 status = cx231xx_gpio_i2c_read_byte(dev, &buf[i]); in cx231xx_gpio_i2c_read()
3053 status = cx231xx_gpio_i2c_write_ack(dev); in cx231xx_gpio_i2c_read()
3058 status = cx231xx_gpio_i2c_write_nak(dev); in cx231xx_gpio_i2c_read()
3061 status = cx231xx_gpio_i2c_end(dev); in cx231xx_gpio_i2c_read()
3064 mutex_unlock(&dev->gpio_i2c_lock); in cx231xx_gpio_i2c_read()
3072 int cx231xx_gpio_i2c_write(struct cx231xx *dev, u8 dev_addr, u8 *buf, u8 len) in cx231xx_gpio_i2c_write() argument
3077 mutex_lock(&dev->gpio_i2c_lock); in cx231xx_gpio_i2c_write()
3080 cx231xx_gpio_i2c_start(dev); in cx231xx_gpio_i2c_write()
3083 cx231xx_gpio_i2c_write_byte(dev, dev_addr << 1); in cx231xx_gpio_i2c_write()
3086 cx231xx_gpio_i2c_read_ack(dev); in cx231xx_gpio_i2c_write()
3090 cx231xx_gpio_i2c_write_byte(dev, buf[i]); in cx231xx_gpio_i2c_write()
3093 cx231xx_gpio_i2c_read_ack(dev); in cx231xx_gpio_i2c_write()
3097 cx231xx_gpio_i2c_end(dev); in cx231xx_gpio_i2c_write()
3100 mutex_unlock(&dev->gpio_i2c_lock); in cx231xx_gpio_i2c_write()